risc-v/k230: fix k230_hart_is_big issue

This patch fixes the issue that k230_hart_is_big() doesn't work in
S-mode. It also adds convenient debug macros to ease debugging process

Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>

arch/risc-v/src/k230/chip.h

@@ -73,5 +73,11 @@
 #endif /* !defined(CONFIG_SMP) && defined(CONFIG_ARCH_USE_S_MODE) */
 #endif /* CONFIG_ARCH_INTERRUPTSTACK > 15 */
 
+#else  /* ! __ASSEMBLY__ */
+
+/* always show on uart0 */
+
+#define k230_putc(c)  (*(volatile uint32_t*)0x91400000 = c)
+
 #endif /* __ASSEMBLY__ */
 #endif /* __ARCH_RISCV_SRC_K230_CHIP_H */

arch/risc-v/src/k230/k230_hart.c

@@ -87,7 +87,7 @@
 
 #if !defined(CONFIG_BUILD_KERNEL) || defined(CONFIG_NUTTSBI)
 
-static volatile uint64_t g_misa = 0;
+static volatile uint64_t g_misa locate_data(".data");
 
 /****************************************************************************
  * Private Functions
@@ -127,21 +127,23 @@ static void k230_hart_cleanup(void)
 
 void k230_hart_init(void)
 {
+  bool big;
+
+  while (!(g_misa = READ_CSR(CSR_MISA)));
+  big = g_misa & (1 << 21);
+
   k230_hart_cleanup();
 
   WRITE_CSR(CSR_MXSTATUS, XSTATUS);
   WRITE_CSR(CSR_MHCR,  MHCR);
   WRITE_CSR(CSR_MCOR,  MCOR);
   WRITE_CSR(CSR_MSMPR, MSMPR);
-  WRITE_CSR(CSR_MCCR2, MCCR2);
+  WRITE_CSR(CSR_MCCR2, big ? MCCR2_BIG : MCCR2);
-  WRITE_CSR(CSR_MHINT, MHINT);
+  WRITE_CSR(CSR_MHINT, big ? MHINT_BIG : MHINT);
 
 #ifdef RISCV_PBMT
   SET_CSR(CSR_MENVCFG, MENVCFG_PBMT);
 #endif
-  /* TODO: why 0 when reading from NuttSBI S-mode? */
-
-  while (!(g_misa = READ_CSR(CSR_MISA)));
 }
 
 /****************************************************************************
@@ -151,7 +153,6 @@ void k230_hart_init(void)
 
 bool k230_hart_is_big(void)
 {
-  sinfo("g_misa=%lx\n", g_misa);
   return g_misa & (1 << 21);
 }