diff --git a/boards/arm/stm32/fire-stm32v2/src/stm32_selectlcd.c b/boards/arm/stm32/fire-stm32v2/src/stm32_selectlcd.c
index 5c6af948193..6a385dcf0c7 100644
--- a/boards/arm/stm32/fire-stm32v2/src/stm32_selectlcd.c
+++ b/boards/arm/stm32/fire-stm32v2/src/stm32_selectlcd.c
@@ -165,7 +165,7 @@ void stm32_selectlcd(void)
 
   putreg32(FSMC_BTR_ADDSET(1) | FSMC_BTR_ADDHLD(0) |
            FSMC_BTR_DATAST(2) | FSMC_BTR_BUSTURN(0) |
-           FSMC_BTR_CLKDIV(0) | FSMC_BTR_DATLAT(0) |
+           FSMC_BTR_CLKDIV(1) | FSMC_BTR_DATLAT(2) |
            FSMC_BTR_ACCMODA, STM32_FSMC_BTR1);
 
   putreg32(0xffffffff, STM32_FSMC_BWTR4);
diff --git a/boards/arm/stm32/hymini-stm32v/src/stm32_r61505u.c b/boards/arm/stm32/hymini-stm32v/src/stm32_r61505u.c
index c89d49748e6..f034f124c04 100644
--- a/boards/arm/stm32/hymini-stm32v/src/stm32_r61505u.c
+++ b/boards/arm/stm32/hymini-stm32v/src/stm32_r61505u.c
@@ -296,7 +296,7 @@ static void stm32_selectlcd(void)
   /* Bank1 NOR/SRAM timing register configuration */
 
   putreg32(FSMC_BTR_ADDSET(2)  | FSMC_BTR_ADDHLD(0) | FSMC_BTR_DATAST(2) |
-           FSMC_BTR_BUSTURN(0) | FSMC_BTR_CLKDIV(0) | FSMC_BTR_DATLAT(0) |
+           FSMC_BTR_BUSTURN(0) | FSMC_BTR_CLKDIV(1) | FSMC_BTR_DATLAT(2) |
            FSMC_BTR_ACCMODA,
            STM32_FSMC_BTR1);
 
diff --git a/boards/arm/stm32/hymini-stm32v/src/stm32_ssd1289.c b/boards/arm/stm32/hymini-stm32v/src/stm32_ssd1289.c
index 9ef75ac7018..46875308cf8 100644
--- a/boards/arm/stm32/hymini-stm32v/src/stm32_ssd1289.c
+++ b/boards/arm/stm32/hymini-stm32v/src/stm32_ssd1289.c
@@ -375,7 +375,7 @@ static void stm32_selectlcd(void)
   /* Bank1 NOR/SRAM timing register configuration */
 
   putreg32(FSMC_BTR_ADDSET(1)  | FSMC_BTR_ADDHLD(0) | FSMC_BTR_DATAST(2) |
-           FSMC_BTR_BUSTURN(0) | FSMC_BTR_CLKDIV(0) | FSMC_BTR_DATLAT(0) |
+           FSMC_BTR_BUSTURN(0) | FSMC_BTR_CLKDIV(1) | FSMC_BTR_DATLAT(2) |
            FSMC_BTR_ACCMODA,
            STM32_FSMC_BTR1);
 
diff --git a/boards/arm/stm32/stm3210e-eval/src/stm32_selectlcd.c b/boards/arm/stm32/stm3210e-eval/src/stm32_selectlcd.c
index 5db4ecc61fd..ad624819739 100644
--- a/boards/arm/stm32/stm3210e-eval/src/stm32_selectlcd.c
+++ b/boards/arm/stm32/stm3210e-eval/src/stm32_selectlcd.c
@@ -117,7 +117,7 @@ void stm32_selectlcd(void)
 
   putreg32(FSMC_BTR_ADDSET(1) | FSMC_BTR_ADDHLD(0) |
            FSMC_BTR_DATAST(2) | FSMC_BTR_BUSTURN(0) |
-           FSMC_BTR_CLKDIV(0) | FSMC_BTR_DATLAT(0) |
+           FSMC_BTR_CLKDIV(1) | FSMC_BTR_DATLAT(2) |
            FSMC_BTR_ACCMODA, STM32_FSMC_BTR4);
 
   putreg32(0xffffffff, STM32_FSMC_BWTR4);
diff --git a/boards/arm/stm32/stm3220g-eval/src/stm32_selectlcd.c b/boards/arm/stm32/stm3220g-eval/src/stm32_selectlcd.c
index 92bfc0c6d6c..3af64fdc59c 100644
--- a/boards/arm/stm32/stm3220g-eval/src/stm32_selectlcd.c
+++ b/boards/arm/stm32/stm3220g-eval/src/stm32_selectlcd.c
@@ -136,9 +136,9 @@ void stm32_selectlcd(void)
 
   /* Bank3 NOR/SRAM timing register configuration */
 
-  putreg32(FSMC_BTR_ADDSET(5) | FSMC_BTR_ADDHLD(0) |
-           FSMC_BTR_DATAST(9) | FSMC_BTR_BUSTURN(0) |
-           FSMC_BTR_CLKDIV(0) | FSMC_BTR_DATLAT(0) |
+  putreg32(FSMC_BTR_ADDSET(5) | FSMC_BTR_ADDHLD(1) |
+           FSMC_BTR_DATAST(9) | FSMC_BTR_BUSTURN(1) |
+           FSMC_BTR_CLKDIV(1) | FSMC_BTR_DATLAT(2) |
            FSMC_BTR_ACCMODA, STM32_FSMC_BTR3);
 
   putreg32(0xffffffff, STM32_FSMC_BWTR3);
diff --git a/boards/arm/stm32/stm3240g-eval/src/stm32_selectlcd.c b/boards/arm/stm32/stm3240g-eval/src/stm32_selectlcd.c
index 23c1f085e35..b33852077d9 100644
--- a/boards/arm/stm32/stm3240g-eval/src/stm32_selectlcd.c
+++ b/boards/arm/stm32/stm3240g-eval/src/stm32_selectlcd.c
@@ -136,9 +136,9 @@ void stm32_selectlcd(void)
 
   /* Bank3 NOR/SRAM timing register configuration */
 
-  putreg32(FSMC_BTR_ADDSET(5) | FSMC_BTR_ADDHLD(0) |
-           FSMC_BTR_DATAST(9) | FSMC_BTR_BUSTURN(0) |
-           FSMC_BTR_CLKDIV(0) | FSMC_BTR_DATLAT(0) |
+  putreg32(FSMC_BTR_ADDSET(5) | FSMC_BTR_ADDHLD(1) |
+           FSMC_BTR_DATAST(9) | FSMC_BTR_BUSTURN(1) |
+           FSMC_BTR_CLKDIV(1) | FSMC_BTR_DATLAT(2) |
            FSMC_BTR_ACCMODA, STM32_FSMC_BTR3);
 
   putreg32(0xffffffff, STM32_FSMC_BWTR3);
diff --git a/boards/arm/stm32/stm32f4discovery/src/stm32_ssd1289.c b/boards/arm/stm32/stm32f4discovery/src/stm32_ssd1289.c
index c436e24183b..7d8623e50c2 100644
--- a/boards/arm/stm32/stm32f4discovery/src/stm32_ssd1289.c
+++ b/boards/arm/stm32/stm32f4discovery/src/stm32_ssd1289.c
@@ -287,9 +287,9 @@ void stm32_selectlcd(void)
 
   /* Bank1 NOR/SRAM timing register configuration */
 
-  putreg32(FSMC_BTR_ADDSET(5) | FSMC_BTR_ADDHLD(0) |
-           FSMC_BTR_DATAST(9) | FSMC_BTR_BUSTURN(0) |
-           FSMC_BTR_CLKDIV(0) | FSMC_BTR_DATLAT(0) |
+  putreg32(FSMC_BTR_ADDSET(5) | FSMC_BTR_ADDHLD(1) |
+           FSMC_BTR_DATAST(9) | FSMC_BTR_BUSTURN(1) |
+           FSMC_BTR_CLKDIV(1) | FSMC_BTR_DATLAT(2) |
            FSMC_BTR_ACCMODA, STM32_FSMC_BTR1);
 
   putreg32(0xffffffff, STM32_FSMC_BWTR1);
diff --git a/boards/arm/stm32/viewtool-stm32f107/src/stm32_ssd1289.c b/boards/arm/stm32/viewtool-stm32f107/src/stm32_ssd1289.c
index ffb940a5586..6732cd65556 100644
--- a/boards/arm/stm32/viewtool-stm32f107/src/stm32_ssd1289.c
+++ b/boards/arm/stm32/viewtool-stm32f107/src/stm32_ssd1289.c
@@ -445,7 +445,7 @@ static void stm32_selectlcd(void)
   putreg32(
       FSMC_BTR_ADDSET(1) | FSMC_BTR_ADDHLD(0) |
       FSMC_BTR_DATAST(2) | FSMC_BTR_BUSTURN(0) |
-      FSMC_BTR_CLKDIV(0) | FSMC_BTR_DATLAT(0) |
+      FSMC_BTR_CLKDIV(1) | FSMC_BTR_DATLAT(2) |
       FSMC_BTR_ACCMODA,
       STM32_FSMC_BTR1);