Merge remote-tracking branch 'origin/master' into ieee802154

arch/arm/src/efm32/efm32_i2c.c

@@ -220,7 +220,6 @@ struct efm32_i2c_config_s
   uint32_t scl_pin;           /* GPIO configuration for SCL as SCL */
   uint32_t sda_pin;           /* GPIO configuration for SDA as SDA */
 #ifndef CONFIG_I2C_POLLED
-  int (*isr) (int, void *, void *);   /* Interrupt handler */
   uint32_t irq;               /* Event IRQ */
 #endif
 };
@@ -294,15 +293,10 @@ static void efm32_i2c_tracedump(FAR struct efm32_i2c_priv_s *priv);
 static void efm32_i2c_setclock(FAR struct efm32_i2c_priv_s *priv,
                                uint32_t frequency);
 
-static int efm32_i2c_isr(struct efm32_i2c_priv_s *priv);
+static int efm32_i2c_isr_process(struct efm32_i2c_priv_s *priv);
 
 #ifndef CONFIG_I2C_POLLED
-#ifdef CONFIG_EFM32_I2C0
+static int efm32_i2c_isr(int irq, void *context, FAR void *arg);
-static int efm32_i2c0_isr(int irq, void *context, FAR void *arg);
-#endif
-#ifdef CONFIG_EFM32_I2C1
-static int efm32_i2c1_isr(int irq, void *context, FAR void *arg);
-#endif
 #endif /* !CONFIG_I2C_POLLED */
 
 static void efm32_i2c_hwreset(FAR struct efm32_i2c_priv_s *priv);
@@ -343,7 +337,6 @@ static const struct efm32_i2c_config_s efm32_i2c0_config =
   .scl_pin = BOARD_I2C0_SCL,
   .sda_pin = BOARD_I2C0_SDA,
 #ifndef CONFIG_I2C_POLLED
-  .isr = efm32_i2c0_isr,
   .irq = EFM32_IRQ_I2C0
 #endif
 };
@@ -371,7 +364,6 @@ static const struct efm32_i2c_config_s efm32_i2c1_config =
   .scl_pin = BOARD_I2C1_SCL,
   .sda_pin = BOARD_I2C1_SDA,
 #ifndef CONFIG_I2C_POLLED
-  .isr = efm32_i2c1_isr,
   .irq = EFM32_IRQ_I2C1
 #endif
 };
@@ -632,7 +624,7 @@ static inline int efm32_i2c_sem_waitdone(FAR struct efm32_i2c_priv_s *priv)
        * that it is done.
        */
 
-      efm32_i2c_isr(priv);
+      efm32_i2c_isr_process(priv);
 
       /* Calculate the elapsed time */
 
@@ -869,14 +861,14 @@ static void efm32_i2c_setclock(FAR struct efm32_i2c_priv_s *priv,
 }
 
 /****************************************************************************
- * Name: efm32_i2c_isr
+ * Name: efm32_i2c_isr_process
  *
  * Description:
  *  Common Interrupt Service Routine
  *
  ****************************************************************************/
 
-static int efm32_i2c_isr(struct efm32_i2c_priv_s *priv)
+static int efm32_i2c_isr_process(struct efm32_i2c_priv_s *priv)
 {
   for (; ; )
     {
@@ -1279,44 +1271,24 @@ done:
   return OK;
 }
 
+/****************************************************************************
+ * Name: efm32_i2c_isr
+ *
+ * Description:
+ *   Common I2C interrupt service routine
+ *
+ ****************************************************************************/
+
 #ifndef CONFIG_I2C_POLLED
-
+static int efm32_i2c_isr(int irq, void *context, FAR void *arg)
-/****************************************************************************
- * Name: efm32_i2c0_isr
- *
- * Description:
- *   I2C0 interrupt service routine
- *
- ****************************************************************************/
-
-#ifdef CONFIG_EFM32_I2C0
-static int efm32_i2c0_isr(int irq, void *context, FAR void *arg)
 {
-  return efm32_i2c_isr(&efm32_i2c0_priv);
+  struct efm32_i2c_priv_s *priv = (struct efm32_i2c_priv_s *)arg;
+
+  DEBUGASSERT(priv != NULL);
+  return efm32_i2c_isr_process(priv);
 }
 #endif
 
-/****************************************************************************
- * Name: efm32_i2c1_isr
- *
- * Description:
- *   I2C1 interrupt service routine
- *
- ****************************************************************************/
-
-#ifdef CONFIG_EFM32_I2C1
-static int efm32_i2c1_isr(int irq, void *context, FAR void *arg)
-{
-  return efm32_i2c_isr(&efm32_i2c1_priv);
-}
-#endif
-
-#endif
-
-/****************************************************************************
- * Private Initialization and Deinitialization
- ****************************************************************************/
-
 /****************************************************************************
  * Name: efm32_i2c_hwreset
  *
@@ -1389,7 +1361,7 @@ static int efm32_i2c_init(FAR struct efm32_i2c_priv_s *priv)
   /* Attach ISRs */
 
 #ifndef CONFIG_I2C_POLLED
-  irq_attach(priv->config->irq, priv->config->isr, NULL);
+  irq_attach(priv->config->irq, efm32_i2c_isr, priv);
   up_enable_irq(priv->config->irq);
 #endif
 
@@ -1523,7 +1495,7 @@ static int efm32_i2c_transfer(FAR struct i2c_master_s *dev,
    * be enabled in efm32_i2c_sem_waitdone if CONFIG_I2C_POLLED is NOT defined
    */
 
-  efm32_i2c_isr(priv);
+  efm32_i2c_isr_process(priv);
 
   /* Wait for an ISR, if there was a timeout, fetch latest status to get the
    * BUSY flag.

arch/arm/src/stm32/stm32_i2c.c

@@ -230,7 +230,6 @@ struct stm32_i2c_config_s
   uint32_t scl_pin;           /* GPIO configuration for SCL as SCL */
   uint32_t sda_pin;           /* GPIO configuration for SDA as SDA */
 #ifndef CONFIG_I2C_POLLED
-  int (*isr)(int, void *, void *);    /* Interrupt handler */
   uint32_t ev_irq;            /* Event IRQ */
   uint32_t er_irq;            /* Error IRQ */
 #endif
@@ -313,18 +312,10 @@ static inline uint32_t stm32_i2c_disablefsmc(FAR struct stm32_i2c_priv_s *priv);
 static inline void stm32_i2c_enablefsmc(uint32_t ahbenr);
 #endif /* I2C1_FSMC_CONFLICT */
 
-static int stm32_i2c_isr(struct stm32_i2c_priv_s * priv);
+static int stm32_i2c_isr_process(struct stm32_i2c_priv_s * priv);
 
 #ifndef CONFIG_I2C_POLLED
-#ifdef CONFIG_STM32_I2C1
+static int stm32_i2c_isr(int irq, void *context, FAR void *arg);
-static int stm32_i2c1_isr(int irq, void *context, FAR void *arg);
-#endif
-#ifdef CONFIG_STM32_I2C2
-static int stm32_i2c2_isr(int irq, void *context, FAR void *arg);
-#endif
-#ifdef CONFIG_STM32_I2C3
-static int stm32_i2c3_isr(int irq, void *context, FAR void *arg);
-#endif
 #endif /* !CONFIG_I2C_POLLED */
 
 static int stm32_i2c_init(FAR struct stm32_i2c_priv_s *priv);
@@ -379,7 +370,6 @@ static const struct stm32_i2c_config_s stm32_i2c1_config =
   .scl_pin    = GPIO_I2C1_SCL,
   .sda_pin    = GPIO_I2C1_SDA,
 #ifndef CONFIG_I2C_POLLED
-  .isr        = stm32_i2c1_isr,
   .ev_irq     = STM32_IRQ_I2C1EV,
   .er_irq     = STM32_IRQ_I2C1ER
 #endif
@@ -409,7 +399,6 @@ static const struct stm32_i2c_config_s stm32_i2c2_config =
   .scl_pin    = GPIO_I2C2_SCL,
   .sda_pin    = GPIO_I2C2_SDA,
 #ifndef CONFIG_I2C_POLLED
-  .isr        = stm32_i2c2_isr,
   .ev_irq     = STM32_IRQ_I2C2EV,
   .er_irq     = STM32_IRQ_I2C2ER
 #endif
@@ -439,7 +428,6 @@ static const struct stm32_i2c_config_s stm32_i2c3_config =
   .scl_pin    = GPIO_I2C3_SCL,
   .sda_pin    = GPIO_I2C3_SDA,
 #ifndef CONFIG_I2C_POLLED
-  .isr        = stm32_i2c3_isr,
   .ev_irq     = STM32_IRQ_I2C3EV,
   .er_irq     = STM32_IRQ_I2C3ER
 #endif
@@ -678,7 +666,7 @@ static inline int stm32_i2c_sem_waitdone(FAR struct stm32_i2c_priv_s *priv)
        * reports that it is done.
        */
 
-      stm32_i2c_isr(priv);
+      stm32_i2c_isr_process(priv);
     }
 
   /* Loop until the transfer is complete. */
@@ -1172,14 +1160,14 @@ static inline void stm32_i2c_enablefsmc(uint32_t ahbenr)
 #endif /* I2C1_FSMC_CONFLICT */
 
 /************************************************************************************
- * Name: stm32_i2c_isr
+ * Name: stm32_i2c_isr_process
  *
  * Description:
  *  Common Interrupt Service Routine
  *
  ************************************************************************************/
 
-static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv)
+static int stm32_i2c_isr_process(struct stm32_i2c_priv_s *priv)
 {
   uint32_t status = stm32_i2c_getstatus(priv);
 
@@ -1459,56 +1447,23 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv)
 }
 
 /************************************************************************************
- * Name: stm32_i2c1_isr
+ * Name: stm32_i2c_isr
  *
  * Description:
- *   I2C1 interrupt service routine
+ *   Common I2C interrupt service routine
  *
  ************************************************************************************/
 
-#ifndef CONFIG_I2C_POLLED
+#ifdef CONFIG_I2C_POLLED
-#ifdef CONFIG_STM32_I2C1
-static int stm32_i2c1_isr(int irq, void *context, FAR void *arg)
-{
-  return stm32_i2c_isr(&stm32_i2c1_priv);
-}
-#endif
-
-/************************************************************************************
- * Name: stm32_i2c2_isr
- *
- * Description:
- *   I2C2 interrupt service routine
- *
- ************************************************************************************/
-
-#ifdef CONFIG_STM32_I2C2
 static int stm32_i2c2_isr(int irq, void *context, FAR void *arg)
 {
-  return stm32_i2c_isr(&stm32_i2c2_priv);
+  struct stm32_i2c_priv_s *priv = (struct stm32_i2c_priv_s *)arg;
+
+  DEBUGASSERT(priv != NULL);
+  return stm32_i2c_isr_process(priv);
 }
 #endif
 
-/************************************************************************************
- * Name: stm32_i2c3_isr
- *
- * Description:
- *   I2C2 interrupt service routine
- *
- ************************************************************************************/
-
-#ifdef CONFIG_STM32_I2C3
-static int stm32_i2c3_isr(int irq, void *context, FAR void *arg)
-{
-  return stm32_i2c_isr(&stm32_i2c3_priv);
-}
-#endif
-#endif
-
-/************************************************************************************
- * Private Initialization and Deinitialization
- ************************************************************************************/
-
 /************************************************************************************
  * Name: stm32_i2c_init
  *
@@ -1543,8 +1498,8 @@ static int stm32_i2c_init(FAR struct stm32_i2c_priv_s *priv)
   /* Attach ISRs */
 
 #ifndef CONFIG_I2C_POLLED
-  irq_attach(priv->config->ev_irq, priv->config->isr, NULL);
+  irq_attach(priv->config->ev_irq, stm32_i2c_isr, priv);
-  irq_attach(priv->config->er_irq, priv->config->isr, NULL);
+  irq_attach(priv->config->er_irq, stm32_i2c_isr, priv);
   up_enable_irq(priv->config->ev_irq);
   up_enable_irq(priv->config->er_irq);
 #endif

arch/arm/src/stm32/stm32_i2c_alt.c

@@ -257,7 +257,6 @@ struct stm32_i2c_config_s
   uint32_t scl_pin;            /* GPIO configuration for SCL as SCL */
   uint32_t sda_pin;            /* GPIO configuration for SDA as SDA */
 #ifndef CONFIG_I2C_POLLED
-  int (*isr)(int, void *, void *);     /* Interrupt handler */
   uint32_t ev_irq;             /* Event IRQ */
   uint32_t er_irq;             /* Error IRQ */
 #endif
@@ -342,18 +341,10 @@ static inline uint32_t stm32_i2c_disablefsmc(FAR struct stm32_i2c_priv_s *priv);
 static inline void stm32_i2c_enablefsmc(uint32_t ahbenr);
 #endif /* I2C1_FSMC_CONFLICT */
 
-static int stm32_i2c_isr(struct stm32_i2c_priv_s * priv);
+static int stm32_i2c_isr_process(struct stm32_i2c_priv_s * priv);
 
 #ifndef CONFIG_I2C_POLLED
-#ifdef CONFIG_STM32_I2C1
+static int stm32_i2c_isr(int irq, void *context, FAR void *arg);
-static int stm32_i2c1_isr(int irq, void *context, FAR void *arg);
-#endif
-#ifdef CONFIG_STM32_I2C2
-static int stm32_i2c2_isr(int irq, void *context, FAR void *arg);
-#endif
-#ifdef CONFIG_STM32_I2C3
-static int stm32_i2c3_isr(int irq, void *context, FAR void *arg);
-#endif
 #endif /* !CONFIG_I2C_POLLED */
 
 static int stm32_i2c_init(FAR struct stm32_i2c_priv_s *priv);
@@ -387,7 +378,6 @@ static const struct stm32_i2c_config_s stm32_i2c1_config =
   .scl_pin    = GPIO_I2C1_SCL,
   .sda_pin    = GPIO_I2C1_SDA,
 #ifndef CONFIG_I2C_POLLED
-  .isr        = stm32_i2c1_isr,
   .ev_irq     = STM32_IRQ_I2C1EV,
   .er_irq     = STM32_IRQ_I2C1ER
 #endif
@@ -417,7 +407,6 @@ static const struct stm32_i2c_config_s stm32_i2c2_config =
   .scl_pin    = GPIO_I2C2_SCL,
   .sda_pin    = GPIO_I2C2_SDA,
 #ifndef CONFIG_I2C_POLLED
-  .isr        = stm32_i2c2_isr,
   .ev_irq     = STM32_IRQ_I2C2EV,
   .er_irq     = STM32_IRQ_I2C2ER
 #endif
@@ -447,7 +436,6 @@ static const struct stm32_i2c_config_s stm32_i2c3_config =
   .scl_pin    = GPIO_I2C3_SCL,
   .sda_pin    = GPIO_I2C3_SDA,
 #ifndef CONFIG_I2C_POLLED
-  .isr        = stm32_i2c3_isr,
   .ev_irq     = STM32_IRQ_I2C3EV,
   .er_irq     = STM32_IRQ_I2C3ER
 #endif
@@ -686,7 +674,7 @@ static int stm32_i2c_sem_waitdone(FAR struct stm32_i2c_priv_s *priv)
        * reports that it is done.
        */
 
-      stm32_i2c_isr(priv);
+      stm32_i2c_isr_process(priv);
     }
 
   /* Loop until the transfer is complete. */
@@ -1180,7 +1168,7 @@ static inline void stm32_i2c_enablefsmc(uint32_t ahbenr)
 #endif /* I2C1_FSMC_CONFLICT */
 
 /************************************************************************************
- * Name: stm32_i2c_isr
+ * Name: stm32_i2c_isr_process
  *
  * Description:
  *  Common interrupt service routine (ISR) that handles I2C protocol logic.
@@ -1202,7 +1190,7 @@ static inline void stm32_i2c_enablefsmc(uint32_t ahbenr)
  *
  ************************************************************************************/
 
-static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv)
+static int stm32_i2c_isr_process(struct stm32_i2c_priv_s *priv)
 {
 #ifndef CONFIG_I2C_POLLED
   uint32_t regval;
@@ -1892,56 +1880,23 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv)
 }
 
 /************************************************************************************
- * Name: stm32_i2c1_isr
+ * Name: stm32_i2c_isr
  *
  * Description:
- *   I2C1 interrupt service routine
+ *   Common I2C interrupt service routine
  *
  ************************************************************************************/
 
 #ifndef CONFIG_I2C_POLLED
-#ifdef CONFIG_STM32_I2C1
+static int stm32_i2c_isr(int irq, void *context, FAR void *arg)
-static int stm32_i2c1_isr(int irq, void *context, FAR void *arg)
 {
-  return stm32_i2c_isr(&stm32_i2c1_priv);
+  struct stm32_i2c_priv_s *priv = (struct stm32_i2c_priv_s *)arg;
+
+  DEBUGASSERT(priv != NULL);
+  return stm32_i2c_isr_process(priv);
 }
 #endif
 
-/************************************************************************************
- * Name: stm32_i2c2_isr
- *
- * Description:
- *   I2C2 interrupt service routine
- *
- ************************************************************************************/
-
-#ifdef CONFIG_STM32_I2C2
-static int stm32_i2c2_isr(int irq, void *context, FAR void *arg)
-{
-  return stm32_i2c_isr(&stm32_i2c2_priv);
-}
-#endif
-
-/************************************************************************************
- * Name: stm32_i2c3_isr
- *
- * Description:
- *   I2C2 interrupt service routine
- *
- ************************************************************************************/
-
-#ifdef CONFIG_STM32_I2C3
-static int stm32_i2c3_isr(int irq, void *context, FAR void *arg)
-{
-  return stm32_i2c_isr(&stm32_i2c3_priv);
-}
-#endif
-#endif
-
-/************************************************************************************
- * Private Initialization and Deinitialization
- ************************************************************************************/
-
 /************************************************************************************
  * Name: stm32_i2c_init
  *
@@ -1976,8 +1931,8 @@ static int stm32_i2c_init(FAR struct stm32_i2c_priv_s *priv)
   /* Attach ISRs */
 
 #ifndef CONFIG_I2C_POLLED
-  irq_attach(priv->config->ev_irq, priv->config->isr, NULL);
+  irq_attach(priv->config->ev_irq, stm32_i2c_isr, priv);
-  irq_attach(priv->config->er_irq, priv->config->isr, NULL);
+  irq_attach(priv->config->er_irq, stm32_i2c_isr, priv);
   up_enable_irq(priv->config->ev_irq);
   up_enable_irq(priv->config->er_irq);
 #endif

arch/arm/src/stm32/stm32f30xxx_i2c.c

@@ -222,7 +222,6 @@ struct stm32_i2c_config_s
   uint32_t scl_pin;           /* GPIO configuration for SCL as SCL */
   uint32_t sda_pin;           /* GPIO configuration for SDA as SDA */
 #ifndef CONFIG_I2C_POLLED
-  int (*isr)(int, void *, void *);    /* Interrupt handler */
   uint32_t ev_irq;            /* Event IRQ */
   uint32_t er_irq;            /* Error IRQ */
 #endif
@@ -301,17 +300,9 @@ static inline void stm32_i2c_sendstart(FAR struct stm32_i2c_priv_s *priv);
 static inline void stm32_i2c_clrstart(FAR struct stm32_i2c_priv_s *priv);
 static inline void stm32_i2c_sendstop(FAR struct stm32_i2c_priv_s *priv);
 static inline uint32_t stm32_i2c_getstatus(FAR struct stm32_i2c_priv_s *priv);
-static int stm32_i2c_isr(struct stm32_i2c_priv_s * priv);
+static int stm32_i2c_isr_process(struct stm32_i2c_priv_s * priv);
 #ifndef CONFIG_I2C_POLLED
-#ifdef CONFIG_STM32_I2C1
+static int stm32_i2c_isr(int irq, void *context, FAR void *arg);
-static int stm32_i2c1_isr(int irq, void *context, FAR void *arg);
-#endif
-#ifdef CONFIG_STM32_I2C2
-static int stm32_i2c2_isr(int irq, void *context, FAR void *arg);
-#endif
-#ifdef CONFIG_STM32_I2C3
-static int stm32_i2c3_isr(int irq, void *context, FAR void *arg);
-#endif
 #endif
 static int stm32_i2c_init(FAR struct stm32_i2c_priv_s *priv);
 static int stm32_i2c_deinit(FAR struct stm32_i2c_priv_s *priv);
@@ -344,7 +335,6 @@ static const struct stm32_i2c_config_s stm32_i2c1_config =
   .scl_pin    = GPIO_I2C1_SCL,
   .sda_pin    = GPIO_I2C1_SDA,
 #ifndef CONFIG_I2C_POLLED
-  .isr        = stm32_i2c1_isr,
   .ev_irq     = STM32_IRQ_I2C1EV,
   .er_irq     = STM32_IRQ_I2C1ER
 #endif
@@ -374,7 +364,6 @@ static const struct stm32_i2c_config_s stm32_i2c2_config =
   .scl_pin    = GPIO_I2C2_SCL,
   .sda_pin    = GPIO_I2C2_SDA,
 #ifndef CONFIG_I2C_POLLED
-  .isr        = stm32_i2c2_isr,
   .ev_irq     = STM32_IRQ_I2C2EV,
   .er_irq     = STM32_IRQ_I2C2ER
 #endif
@@ -404,7 +393,6 @@ static const struct stm32_i2c_config_s stm32_i2c3_config =
   .scl_pin    = GPIO_I2C3_SCL,
   .sda_pin    = GPIO_I2C3_SDA,
 #ifndef CONFIG_I2C_POLLED
-  .isr        = stm32_i2c3_isr,
   .ev_irq     = STM32_IRQ_I2C3EV,
   .er_irq     = STM32_IRQ_I2C3ER
 #endif
@@ -712,7 +700,7 @@ static inline int stm32_i2c_sem_waitdone(FAR struct stm32_i2c_priv_s *priv)
        * reports that it is done.
        */
 
-      stm32_i2c_isr(priv);
+      stm32_i2c_isr_process(priv);
     }
 
   /* Loop until the transfer is complete. */
@@ -1243,7 +1231,7 @@ static inline uint32_t stm32_i2c_getstatus(FAR struct stm32_i2c_priv_s *priv)
 }
 
 /************************************************************************************
- * Name: stm32_i2c_isr
+ * Name: stm32_i2c_isr_startmessage
  *
  * Description:
  *   Common logic when a message is started.  Just adds the even to the trace buffer
@@ -1276,14 +1264,14 @@ static inline void stm32_i2c_clearinterrupts(struct stm32_i2c_priv_s *priv)
 }
 
 /************************************************************************************
- * Name: stm32_i2c_isr
+ * Name: stm32_i2c_isr_process
  *
  * Description:
  *  Common Interrupt Service Routine
  *
  ************************************************************************************/
 
-static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv)
+static int stm32_i2c_isr_process(struct stm32_i2c_priv_s *priv)
 {
   uint32_t status = stm32_i2c_getstatus(priv);
 
@@ -1485,56 +1473,23 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv)
 }
 
 /************************************************************************************
- * Name: stm32_i2c1_isr
+ * Name: stm32_i2c_isr
  *
  * Description:
- *   I2C1 interrupt service routine
+ *   Common I2C interrupt service routine
  *
  ************************************************************************************/
 
 #ifndef CONFIG_I2C_POLLED
-#ifdef CONFIG_STM32_I2C1
+static int stm32_i2c_isr(int irq, void *context, FAR void *arg)
-static int stm32_i2c1_isr(int irq, void *context, FAR void *arg)
 {
-  return stm32_i2c_isr(&stm32_i2c1_priv);
+  struct stm32_i2c_priv_s *priv = (struct stm32_i2c_priv_s *)arg;
+
+  DEBUGASSERT(priv != NULL);
+  return stm32_i2c_isr_process(priv);
 }
 #endif
 
-/************************************************************************************
- * Name: stm32_i2c2_isr
- *
- * Description:
- *   I2C2 interrupt service routine
- *
- ************************************************************************************/
-
-#ifdef CONFIG_STM32_I2C2
-static int stm32_i2c2_isr(int irq, void *context, FAR void *arg)
-{
-  return stm32_i2c_isr(&stm32_i2c2_priv);
-}
-#endif
-
-/************************************************************************************
- * Name: stm32_i2c3_isr
- *
- * Description:
- *   I2C2 interrupt service routine
- *
- ************************************************************************************/
-
-#ifdef CONFIG_STM32_I2C3
-static int stm32_i2c3_isr(int irq, void *context, FAR void *arg)
-{
-  return stm32_i2c_isr(&stm32_i2c3_priv);
-}
-#endif
-#endif
-
-/************************************************************************************
- * Private Initialization and Deinitialization
- ************************************************************************************/
-
 /************************************************************************************
  * Name: stm32_i2c_init
  *
@@ -1569,8 +1524,8 @@ static int stm32_i2c_init(FAR struct stm32_i2c_priv_s *priv)
   /* Attach ISRs */
 
 #ifndef CONFIG_I2C_POLLED
-  irq_attach(priv->config->ev_irq, priv->config->isr, NULL);
+  irq_attach(priv->config->ev_irq, stm32_i2c_isr, priv);
-  irq_attach(priv->config->er_irq, priv->config->isr, NULL);
+  irq_attach(priv->config->er_irq, stm32_i2c_isr, priv);
   up_enable_irq(priv->config->ev_irq);
   up_enable_irq(priv->config->er_irq);
 #endif

arch/arm/src/stm32/stm32f40xxx_i2c.c

@@ -245,7 +245,6 @@ struct stm32_i2c_config_s
   uint32_t scl_pin;           /* GPIO configuration for SCL as SCL */
   uint32_t sda_pin;           /* GPIO configuration for SDA as SDA */
 #ifndef CONFIG_I2C_POLLED
-  int (*isr)(int, void *, void *);    /* Interrupt handler */
   uint32_t ev_irq;            /* Event IRQ */
   uint32_t er_irq;            /* Error IRQ */
 #endif
@@ -339,18 +338,10 @@ static inline uint32_t stm32_i2c_disablefsmc(FAR struct stm32_i2c_priv_s *priv);
 static inline void stm32_i2c_enablefsmc(uint32_t ahbenr);
 #endif /* I2C1_FSMC_CONFLICT */
 
-static int stm32_i2c_isr(struct stm32_i2c_priv_s * priv);
+static int stm32_i2c_isr_process(struct stm32_i2c_priv_s *priv);
 
 #ifndef CONFIG_I2C_POLLED
-#ifdef CONFIG_STM32_I2C1
+static int stm32_i2c_isr(int irq, void *context, FAR void *arg);
-static int stm32_i2c1_isr(int irq, void *context, FAR void *arg);
-#endif
-#ifdef CONFIG_STM32_I2C2
-static int stm32_i2c2_isr(int irq, void *context, FAR void *arg);
-#endif
-#ifdef CONFIG_STM32_I2C3
-static int stm32_i2c3_isr(int irq, void *context, FAR void *arg);
-#endif
 #endif /* !CONFIG_I2C_POLLED */
 
 static int stm32_i2c_init(FAR struct stm32_i2c_priv_s *priv);
@@ -364,8 +355,8 @@ static int stm32_i2c_reset(FAR struct i2c_master_s *dev);
 /* DMA support */
 
 #ifdef CONFIG_STM32_I2C_DMA
-static void stm32_i2c_dmarxcallback(DMA_HANDLE handle, uint8_t isr, void *arg);
+static void stm32_i2c_dmarxcallback(DMA_HANDLE handle, uint8_t status, void *arg);
-static void stm32_i2c_dmatxcallback(DMA_HANDLE handle, uint8_t isr, void *arg);
+static void stm32_i2c_dmatxcallback(DMA_HANDLE handle, uint8_t status, void *arg);
 #endif
 
 /************************************************************************************
@@ -412,7 +403,6 @@ static const struct stm32_i2c_config_s stm32_i2c1_config =
   .scl_pin    = GPIO_I2C1_SCL,
   .sda_pin    = GPIO_I2C1_SDA,
 #ifndef CONFIG_I2C_POLLED
-  .isr        = stm32_i2c1_isr,
   .ev_irq     = STM32_IRQ_I2C1EV,
   .er_irq     = STM32_IRQ_I2C1ER
 #endif
@@ -451,7 +441,6 @@ static const struct stm32_i2c_config_s stm32_i2c2_config =
   .scl_pin    = GPIO_I2C2_SCL,
   .sda_pin    = GPIO_I2C2_SDA,
 #ifndef CONFIG_I2C_POLLED
-  .isr        = stm32_i2c2_isr,
   .ev_irq     = STM32_IRQ_I2C2EV,
   .er_irq     = STM32_IRQ_I2C2ER
 #endif
@@ -488,7 +477,6 @@ static const struct stm32_i2c_config_s stm32_i2c3_config =
   .scl_pin    = GPIO_I2C3_SCL,
   .sda_pin    = GPIO_I2C3_SDA,
 #ifndef CONFIG_I2C_POLLED
-  .isr        = stm32_i2c3_isr,
   .ev_irq     = STM32_IRQ_I2C3EV,
   .er_irq     = STM32_IRQ_I2C3ER
 #endif
@@ -734,7 +722,7 @@ static inline int stm32_i2c_sem_waitdone(FAR struct stm32_i2c_priv_s *priv)
        * reports that it is done.
        */
 
-      stm32_i2c_isr(priv);
+      stm32_i2c_isr_process(priv);
     }
 
   /* Loop until the transfer is complete. */
@@ -1229,14 +1217,14 @@ static inline void stm32_i2c_enablefsmc(uint32_t ahbenr)
 #endif /* I2C1_FSMC_CONFLICT */
 
 /************************************************************************************
- * Name: stm32_i2c_isr
+ * Name: stm32_i2c_isr_process
  *
  * Description:
  *  Common Interrupt Service Routine
  *
  ************************************************************************************/
 
-static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv)
+static int stm32_i2c_isr_process(struct stm32_i2c_priv_s *priv)
 {
   uint32_t status;
 #ifndef CONFIG_I2C_POLLED
@@ -2069,6 +2057,24 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv)
   return OK;
 }
 
+/************************************************************************************
+ * Name: stm32_i2c_isr
+ *
+ * Description:
+ *   Common I2C interrupt service routine
+ *
+ ************************************************************************************/
+
+#ifndef CONFIG_I2C_POLLED
+static int stm32_i2c_isr(int irq, void *context, FAR void *arg)
+{
+  struct stm32_i2c_priv_s *priv = (struct stm32_i2c_priv_s *)arg;
+
+  DEBUGASSERT(priv != NULL);
+  return stm32_i2c_isr_process(priv);
+}
+#endif
+
 /*****************************************************************************
  * Name: stm32_i2c_dmarxcallback
  *
@@ -2119,7 +2125,7 @@ static void stm32_i2c_dmarxcallback(DMA_HANDLE handle, uint8_t status, void *arg
 
   /* let the ISR routine take care of shutting down or switching to next msg */
 
-  stm32_i2c_isr(priv);
+  stm32_i2c_isr_process(priv);
 }
 #endif /* ifdef CONFIG_STM32_I2C_DMA */
 
@@ -2158,57 +2164,6 @@ static void stm32_i2c_dmatxcallback(DMA_HANDLE handle, uint8_t status, void *arg
 }
 #endif /* ifdef CONFIG_STM32_I2C_DMA */
 
-/************************************************************************************
- * Name: stm32_i2c1_isr
- *
- * Description:
- *   I2C1 interrupt service routine
- *
- ************************************************************************************/
-
-#ifndef CONFIG_I2C_POLLED
-#ifdef CONFIG_STM32_I2C1
-static int stm32_i2c1_isr(int irq, void *context, FAR void *arg)
-{
-  return stm32_i2c_isr(&stm32_i2c1_priv);
-}
-#endif
-
-/************************************************************************************
- * Name: stm32_i2c2_isr
- *
- * Description:
- *   I2C2 interrupt service routine
- *
- ************************************************************************************/
-
-#ifdef CONFIG_STM32_I2C2
-static int stm32_i2c2_isr(int irq, void *context, FAR void *arg)
-{
-  return stm32_i2c_isr(&stm32_i2c2_priv);
-}
-#endif
-
-/************************************************************************************
- * Name: stm32_i2c3_isr
- *
- * Description:
- *   I2C2 interrupt service routine
- *
- ************************************************************************************/
-
-#ifdef CONFIG_STM32_I2C3
-static int stm32_i2c3_isr(int irq, void *context, FAR void *arg)
-{
-  return stm32_i2c_isr(&stm32_i2c3_priv);
-}
-#endif
-#endif /* CONFIG_I2C_POLLED */
-
-/************************************************************************************
- * Private Initialization and Deinitialization
- ************************************************************************************/
-
 /************************************************************************************
  * Name: stm32_i2c_init
  *
@@ -2243,8 +2198,8 @@ static int stm32_i2c_init(FAR struct stm32_i2c_priv_s *priv)
   /* Attach ISRs */
 
 #ifndef CONFIG_I2C_POLLED
-  irq_attach(priv->config->ev_irq, priv->config->isr, NULL);
+  irq_attach(priv->config->ev_irq, stm32_i2c_isr, priv);
-  irq_attach(priv->config->er_irq, priv->config->isr, NULL);
+  irq_attach(priv->config->er_irq, stm32_i2c_isr, priv);
   up_enable_irq(priv->config->ev_irq);
   up_enable_irq(priv->config->er_irq);
 #endif

arch/arm/src/stm32f0/Make.defs

@@ -95,6 +95,10 @@ ifeq ($(CONFIG_STM32F0_USB),y)
 CHIP_CSRCS += stm32f0_usbdev.c
 endif
 
+ifeq ($(CONFIG_STM32F0_I2C),y)
+CHIP_CSRCS += stm32f0_i2c.c
+endif
+
 ifeq ($(CONFIG_STM32F0_SPI0),y)
 CHIP_CSRCS += stm32f0_spi.c
 else

arch/arm/src/stm32f0/chip/stm32f05x_pinmap.h

@@ -124,13 +124,13 @@
 
 /* I2C */
 
-#define GPIO_I2C1_SCL_1     (GPIO_ALT|GPIO_AF1|GPIO_PORTB|GPIO_PIN6)
+#define GPIO_I2C1_SCL_1     (GPIO_ALT | GPIO_AF1 | GPIO_OPENDRAIN | GPIO_SPEED_50MHz | GPIO_PORTB | GPIO_PIN6)
-#define GPIO_I2C1_SCL_2     (GPIO_ALT|GPIO_AF1|GPIO_PORTB|GPIO_PIN8)
+#define GPIO_I2C1_SCL_2     (GPIO_ALT | GPIO_AF1 | GPIO_OPENDRAIN | GPIO_SPEED_50MHz | GPIO_PORTB | GPIO_PIN8)
-#define GPIO_I2C1_SDA_1     (GPIO_ALT|GPIO_AF1|GPIO_PORTB|GPIO_PIN7)
+#define GPIO_I2C1_SDA_1     (GPIO_ALT | GPIO_AF1 | GPIO_OPENDRAIN | GPIO_SPEED_50MHz | GPIO_PORTB | GPIO_PIN7)
-#define GPIO_I2C1_SDA_2     (GPIO_ALT|GPIO_AF1|GPIO_PORTB|GPIO_PIN9)
+#define GPIO_I2C1_SDA_2     (GPIO_ALT | GPIO_AF1 | GPIO_OPENDRAIN | GPIO_SPEED_50MHz | GPIO_PORTB | GPIO_PIN9)
-#define GPIO_I2C1_SMBA      (GPIO_ALT|GPIO_AF3|GPIO_PORTB|GPIO_PIN5)
+#define GPIO_I2C1_SMBA      (GPIO_ALT | GPIO_AF3 | GPIO_FLOAT | GPIO_SPEED_50MHz | GPIO_PORTB | GPIO_PIN5)
 
-#define GPIO_I2C2_SCL       (GPIO_ALT|GPIO_AF1|GPIO_PORTB|GPIO_PIN10)
+#define GPIO_I2C2_SCL       (GPIO_ALT | GPIO_AF1 | GPIO_OPENDRAIN | GPIO_SPEED_50MHz | GPIO_PORTB | GPIO_PIN10)
-#define GPIO_I2C2_SDA       (GPIO_ALT|GPIO_AF1|GPIO_PORTB|GPIO_PIN11)
+#define GPIO_I2C2_SDA       (GPIO_ALT | GPIO_AF1 | GPIO_OPENDRAIN | GPIO_SPEED_50MHz | GPIO_PORTB | GPIO_PIN11)
 
 #endif /* __ARCH_ARM_SRC_STM32F0_CHIP_STM32F05X_PINMAP_H */

arch/arm/src/stm32f0/chip/stm32f07x_pinmap.h

@@ -144,16 +144,16 @@
 
 /* I2C */
 
-#define GPIO_I2C1_SCL_1          (GPIO_ALT | GPIO_AF1 | GPIO_PORTB | GPIO_PIN6)
+#define GPIO_I2C1_SCL_1          (GPIO_ALT | GPIO_AF1 | GPIO_OPENDRAIN | GPIO_SPEED_50MHz | GPIO_PORTB | GPIO_PIN6)
-#define GPIO_I2C1_SCL_2          (GPIO_ALT | GPIO_AF1 | GPIO_PORTB | GPIO_PIN8)
+#define GPIO_I2C1_SCL_2          (GPIO_ALT | GPIO_AF1 | GPIO_OPENDRAIN | GPIO_SPEED_50MHz | GPIO_PORTB | GPIO_PIN8)
-#define GPIO_I2C1_SDA_1          (GPIO_ALT | GPIO_AF1 | GPIO_PORTB | GPIO_PIN7)
+#define GPIO_I2C1_SDA_1          (GPIO_ALT | GPIO_AF1 | GPIO_OPENDRAIN | GPIO_SPEED_50MHz | GPIO_PORTB | GPIO_PIN7)
-#define GPIO_I2C1_SDA_2          (GPIO_ALT | GPIO_AF1 | GPIO_PORTB | GPIO_PIN9)
+#define GPIO_I2C1_SDA_2          (GPIO_ALT | GPIO_AF1 | GPIO_OPENDRAIN | GPIO_SPEED_50MHz | GPIO_PORTB | GPIO_PIN9)
-#define GPIO_I2C1_SMBA           (GPIO_ALT | GPIO_AF3 | GPIO_PORTB | GPIO_PIN5)
+#define GPIO_I2C1_SMBA           (GPIO_ALT | GPIO_AF3 | GPIO_FLOAT | GPIO_SPEED_50MHz | GPIO_PORTB | GPIO_PIN5)
 
-#define GPIO_I2C2_SCL_1          (GPIO_ALT | GPIO_AF1 | GPIO_PORTB | GPIO_PIN10)
+#define GPIO_I2C2_SCL_1          (GPIO_ALT | GPIO_AF1 | GPIO_OPENDRAIN | GPIO_SPEED_50MHz | GPIO_PORTB | GPIO_PIN10)
-#define GPIO_I2C2_SCL_2          (GPIO_ALT | GPIO_AF5 | GPIO_PORTB | GPIO_PIN13)
+#define GPIO_I2C2_SCL_2          (GPIO_ALT | GPIO_AF5 | GPIO_OPENDRAIN | GPIO_SPEED_50MHz | GPIO_PORTB | GPIO_PIN13)
-#define GPIO_I2C2_SDA_1          (GPIO_ALT | GPIO_AF1 | GPIO_PORTB | GPIO_PIN11)
+#define GPIO_I2C2_SDA_1          (GPIO_ALT | GPIO_AF1 | GPIO_OPENDRAIN | GPIO_SPEED_50MHz | GPIO_PORTB | GPIO_PIN11)
-#define GPIO_I2C2_SDA_2          (GPIO_ALT | GPIO_AF5 | GPIO_PORTB | GPIO_PIN14)
+#define GPIO_I2C2_SDA_2          (GPIO_ALT | GPIO_AF5 | GPIO_OPENDRAIN | GPIO_SPEED_50MHz | GPIO_PORTB | GPIO_PIN14)
 
 /* I2S */
 

arch/arm/src/stm32f0/stm32f0_i2c.h

@@ -0,0 +1,104 @@
+/****************************************************************************
+ * arch/arm/src/stm32f0/stm32f0_i2c.h
+ *
+ *   Copyright (C) 2009, 2011, 2013 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <gnutt@nuttx.org>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_STM32F0_STM32F0_I2C_H
+#define __ARCH_ARM_SRC_STM32F0_STM32F0_I2C_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+#include <nuttx/i2c/i2c_master.h>
+
+#include "chip.h"
+#include "chip/stm32f0_i2c.h"
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* If a dynamic timeout is selected, then a non-negative, non-zero micro-
+ * seconds per byte value must be provided as well.
+ */
+
+#ifdef CONFIG_STM32F0_I2C_DYNTIMEO
+#  if CONFIG_STM32F0_I2C_DYNTIMEO_USECPERBYTE < 1
+#    warning "Ignoring CONFIG_STM32F0_I2C_DYNTIMEO because of CONFIG_STM32F0_I2C_DYNTIMEO_USECPERBYTE"
+#    undef CONFIG_STM32F0_I2C_DYNTIMEO
+#  endif
+#endif
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32f0_i2cbus_initialize
+ *
+ * Description:
+ *   Initialize the selected I2C port. And return a unique instance of struct
+ *   struct i2c_master_s.  This function may be called to obtain multiple
+ *   instances of the interface, each of which may be set up with a
+ *   different frequency and slave address.
+ *
+ * Input Parameter:
+ *   Port number (for hardware that has multiple I2C interfaces)
+ *
+ * Returned Value:
+ *   Valid I2C device structure reference on succcess; a NULL on failure
+ *
+ ****************************************************************************/
+
+FAR struct i2c_master_s *stm32f0_i2cbus_initialize(int port);
+
+/****************************************************************************
+ * Name: stm32f0_i2cbus_uninitialize
+ *
+ * Description:
+ *   De-initialize the selected I2C port, and power down the device.
+ *
+ * Input Parameter:
+ *   Device structure as returned by the stm32f0_i2cbus_initialize()
+ *
+ * Returned Value:
+ *   OK on success, ERROR when internal reference count mismatch or dev
+ *   points to invalid hardware device.
+ *
+ ****************************************************************************/
+
+int stm32f0_i2cbus_uninitialize(FAR struct i2c_master_s *dev);
+
+#endif /* __ARCH_ARM_SRC_STM32F0_STM32F0_I2C_H */

arch/arm/src/stm32f0/stm32f0_uart.h

@@ -79,11 +79,40 @@
 #  undef CONFIG_STM32F0_USART1
 #endif
 
+/* USART 3-8 are multiplexed to the same interrupt.  Current interrupt
+ * handling logic will support only one USART in that range.  That is
+ * not an issue for currently supported chips but could become an
+ * issue in the future.
+ */
+
+#if defined(CONFIG_STM32F0_USART3)
+#  undef CONFIG_STM32F0_USART4
+#  undef CONFIG_STM32F0_USART5
+#  undef CONFIG_STM32F0_USART6
+#  undef CONFIG_STM32F0_USART7
+#  undef CONFIG_STM32F0_USART8
+#elif defined(CONFIG_STM32F0_USART4)
+#  undef CONFIG_STM32F0_USART5
+#  undef CONFIG_STM32F0_USART6
+#  undef CONFIG_STM32F0_USART7
+#  undef CONFIG_STM32F0_USART8
+#elif defined(CONFIG_STM32F0_USART5)
+#  undef CONFIG_STM32F0_USART6
+#  undef CONFIG_STM32F0_USART7
+#  undef CONFIG_STM32F0_USART8
+#elif defined(CONFIG_STM32F0_USART6)
+#  undef CONFIG_STM32F0_USART7
+#  undef CONFIG_STM32F0_USART8
+#elif defined(CONFIG_STM32F0_USART7)
+#  undef CONFIG_STM32F0_USART8
+#endif
+
 /* Is there a USART enabled? */
 
 #if defined(CONFIG_STM32F0_USART1) || defined(CONFIG_STM32F0_USART2) || \
     defined(CONFIG_STM32F0_USART3) || defined(CONFIG_STM32F0_USART4) || \
-    defined(CONFIG_STM32F0_USART5)
+    defined(CONFIG_STM32F0_USART5) || defined(CONFIG_STM32F0_USART6) || \
+    defined(CONFIG_STM32F0_USART7) || defined(CONFIG_STM32F0_USART8)
 #  define HAVE_USART 1
 #endif
 

arch/arm/src/stm32f7/stm32_i2c.c

@@ -402,7 +402,6 @@ struct stm32_i2c_config_s
   uint32_t scl_pin;           /* GPIO configuration for SCL as SCL */
   uint32_t sda_pin;           /* GPIO configuration for SDA as SDA */
 #ifndef CONFIG_I2C_POLLED
-  int (*isr)(int, void *, void *);    /* Interrupt handler */
   uint32_t ev_irq;            /* Event IRQ */
   uint32_t er_irq;            /* Error IRQ */
 #endif
@@ -484,20 +483,9 @@ static void stm32_i2c_setclock(FAR struct stm32_i2c_priv_s *priv,
 static inline void stm32_i2c_sendstart(FAR struct stm32_i2c_priv_s *priv);
 static inline void stm32_i2c_sendstop(FAR struct stm32_i2c_priv_s *priv);
 static inline uint32_t stm32_i2c_getstatus(FAR struct stm32_i2c_priv_s *priv);
-static int stm32_i2c_isr(struct stm32_i2c_priv_s * priv);
+static int stm32_i2c_isr_process(struct stm32_i2c_priv_s * priv);
 #ifndef CONFIG_I2C_POLLED
-#  ifdef CONFIG_STM32F7_I2C1
+static int stm32_i2c_isr(int irq, void *context, FAR void *arg);
-static int stm32_i2c1_isr(int irq, void *context, FAR void *arg);
-#  endif
-#  ifdef CONFIG_STM32F7_I2C2
-static int stm32_i2c2_isr(int irq, void *context, FAR void *arg);
-#  endif
-#  ifdef CONFIG_STM32F7_I2C3
-static int stm32_i2c3_isr(int irq, void *context, FAR void *arg);
-#  endif
-#  ifdef CONFIG_STM32F7_I2C4
-static int stm32_i2c4_isr(int irq, void *context, FAR void *arg);
-#  endif
 #endif
 static int stm32_i2c_init(FAR struct stm32_i2c_priv_s *priv);
 static int stm32_i2c_deinit(FAR struct stm32_i2c_priv_s *priv);
@@ -523,7 +511,6 @@ static const struct stm32_i2c_config_s stm32_i2c1_config =
   .scl_pin    = GPIO_I2C1_SCL,
   .sda_pin    = GPIO_I2C1_SDA,
 #ifndef CONFIG_I2C_POLLED
-  .isr        = stm32_i2c1_isr,
   .ev_irq     = STM32_IRQ_I2C1EV,
   .er_irq     = STM32_IRQ_I2C1ER
 #endif
@@ -553,7 +540,6 @@ static const struct stm32_i2c_config_s stm32_i2c2_config =
   .scl_pin    = GPIO_I2C2_SCL,
   .sda_pin    = GPIO_I2C2_SDA,
 #ifndef CONFIG_I2C_POLLED
-  .isr        = stm32_i2c2_isr,
   .ev_irq     = STM32_IRQ_I2C2EV,
   .er_irq     = STM32_IRQ_I2C2ER
 #endif
@@ -583,7 +569,6 @@ static const struct stm32_i2c_config_s stm32_i2c3_config =
   .scl_pin    = GPIO_I2C3_SCL,
   .sda_pin    = GPIO_I2C3_SDA,
 #ifndef CONFIG_I2C_POLLED
-  .isr        = stm32_i2c3_isr,
   .ev_irq     = STM32_IRQ_I2C3EV,
   .er_irq     = STM32_IRQ_I2C3ER
 #endif
@@ -613,7 +598,6 @@ static const struct stm32_i2c_config_s stm32_i2c4_config =
   .scl_pin    = GPIO_I2C4_SCL,
   .sda_pin    = GPIO_I2C4_SDA,
 #ifndef CONFIG_I2C_POLLED
-  .isr        = stm32_i2c4_isr,
   .ev_irq     = STM32_IRQ_I2C4EV,
   .er_irq     = STM32_IRQ_I2C4ER
 #endif
@@ -905,7 +889,7 @@ static inline int stm32_i2c_sem_waitdone(FAR struct stm32_i2c_priv_s *priv)
        * reports that it is done.
        */
 
-      stm32_i2c_isr(priv);
+      stm32_i2c_isr_process(priv);
     }
 
   /* Loop until the transfer is complete. */
@@ -1538,7 +1522,7 @@ static inline void stm32_i2c_clearinterrupts(struct stm32_i2c_priv_s *priv)
 }
 
 /************************************************************************************
- * Name: stm32_i2c_isr
+ * Name: stm32_i2c_isr_process
  *
  * Description:
  *  Common interrupt service routine (ISR) that handles I2C protocol logic.
@@ -1555,7 +1539,7 @@ static inline void stm32_i2c_clearinterrupts(struct stm32_i2c_priv_s *priv)
  *
  ************************************************************************************/
 
-static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv)
+static int stm32_i2c_isr_process(struct stm32_i2c_priv_s *priv)
 {
   uint32_t status;
 
@@ -2144,71 +2128,23 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv)
 }
 
 /************************************************************************************
- * Name: stm32_i2c1_isr
+ * Name: stm32_i2c_isr
  *
  * Description:
- *   I2C1 interrupt service routine
+ *   Common I2C interrupt service routine
  *
  ************************************************************************************/
 
 #ifndef CONFIG_I2C_POLLED
-#  ifdef CONFIG_STM32F7_I2C1
+static int stm32_i2c_isr(int irq, void *context, FAR void *arg)
-static int stm32_i2c1_isr(int irq, void *context, FAR void *arg)
 {
-  return stm32_i2c_isr(&stm32_i2c1_priv);
+  struct stm32_i2c_priv_s *priv = (struct stm32_i2c_priv_s *)arg;
+
+  DEBUGASSERT(priv != NULL);
+  return stm32_i2c_isr_process(&stm32_i2c1_priv);
 }
 #endif
 
-/************************************************************************************
- * Name: stm32_i2c2_isr
- *
- * Description:
- *   I2C2 interrupt service routine
- *
- ************************************************************************************/
-
-# ifdef CONFIG_STM32F7_I2C2
-static int stm32_i2c2_isr(int irq, void *context, FAR void *arg)
-{
-  return stm32_i2c_isr(&stm32_i2c2_priv);
-}
-#  endif
-
-/************************************************************************************
- * Name: stm32_i2c3_isr
- *
- * Description:
- *   I2C2 interrupt service routine
- *
- ************************************************************************************/
-
-#  ifdef CONFIG_STM32F7_I2C3
-static int stm32_i2c3_isr(int irq, void *context, FAR void *arg)
-{
-  return stm32_i2c_isr(&stm32_i2c3_priv);
-}
-#  endif
-
-/************************************************************************************
- * Name: stm32_i2c4_isr
- *
- * Description:
- *   I2C2 interrupt service routine
- *
- ************************************************************************************/
-
-#  ifdef CONFIG_STM32F7_I2C4
-static int stm32_i2c4_isr(int irq, void *context, FAR void *arg)
-{
-  return stm32_i2c_isr(&stm32_i2c4_priv);
-}
-#  endif
-#endif
-
-/************************************************************************************
- * Private Initialization and Deinitialization
- ************************************************************************************/
-
 /************************************************************************************
  * Name: stm32_i2c_init
  *
@@ -2243,8 +2179,8 @@ static int stm32_i2c_init(FAR struct stm32_i2c_priv_s *priv)
 #ifndef CONFIG_I2C_POLLED
   /* Attach error and event interrupts to the ISRs */
 
-  irq_attach(priv->config->ev_irq, priv->config->isr, NULL);
+  irq_attach(priv->config->ev_irq, stm32_i2c_isr, priv);
-  irq_attach(priv->config->er_irq, priv->config->isr, NULL);
+  irq_attach(priv->config->er_irq, stm32_i2c_isr, priv);
   up_enable_irq(priv->config->ev_irq);
   up_enable_irq(priv->config->er_irq);
 #endif

arch/arm/src/tiva/tiva_i2c.c

@@ -195,7 +195,6 @@ struct tiva_i2c_config_s
   uint32_t scl_pin;           /* GPIO configuration for SCL as SCL */
   uint32_t sda_pin;           /* GPIO configuration for SDA as SDA */
 #ifndef CONFIG_I2C_POLLED
-  int (*isr)(int, void *, void *);    /* Interrupt handler */
   uint8_t irq;                /* IRQ number */
 #endif
   uint8_t devno;              /* I2Cn where n = devno */
@@ -282,39 +281,10 @@ static void tiva_i2c_tracedump(struct tiva_i2c_priv_s *priv);
 
 static void tiva_i2c_startxfr(struct tiva_i2c_priv_s *priv);
 static void tiva_i2c_nextxfr(struct tiva_i2c_priv_s *priv, uint32_t cmd);
-static int tiva_i2c_interrupt(struct tiva_i2c_priv_s * priv, uint32_t status);
+static int tiva_i2c_process(struct tiva_i2c_priv_s * priv, uint32_t status);
 
 #ifndef CONFIG_I2C_POLLED
-#ifdef CONFIG_TIVA_I2C0
+static int tiva_i2c_interrupt(int irq, void *context, FAR void *arg);
-static int tiva_i2c0_interrupt(int irq, void *context, FAR void *arg);
-#endif
-#ifdef CONFIG_TIVA_I2C1
-static int tiva_i2c1_interrupt(int irq, void *context, FAR void *arg);
-#endif
-#ifdef CONFIG_TIVA_I2C2
-static int tiva_i2c2_interrupt(int irq, void *context, FAR void *arg);
-#endif
-#ifdef CONFIG_TIVA_I2C3
-static int tiva_i2c3_interrupt(int irq, void *context, FAR void *arg);
-#endif
-#ifdef CONFIG_TIVA_I2C4
-static int tiva_i2c4_interrupt(int irq, void *context, FAR void *arg);
-#endif
-#ifdef CONFIG_TIVA_I2C5
-static int tiva_i2c5_interrupt(int irq, void *context, FAR void *arg);
-#endif
-#ifdef CONFIG_TIVA_I2C6
-static int tiva_i2c6_interrupt(int irq, void *context, FAR void *arg);
-#endif
-#ifdef CONFIG_TIVA_I2C7
-static int tiva_i2c7_interrupt(int irq, void *context, FAR void *arg);
-#endif
-#ifdef CONFIG_TIVA_I2C8
-static int tiva_i2c8_interrupt(int irq, void *context, FAR void *arg);
-#endif
-#ifdef CONFIG_TIVA_I2C9
-static int tiva_i2c9_interrupt(int irq, void *context, FAR void *arg);
-#endif
 #endif /* !CONFIG_I2C_POLLED */
 
 static int tiva_i2c_initialize(struct tiva_i2c_priv_s *priv, uint32_t frequency);
@@ -353,7 +323,6 @@ static const struct tiva_i2c_config_s tiva_i2c0_config =
   .scl_pin    = GPIO_I2C0_SCL,
   .sda_pin    = GPIO_I2C0_SDA,
 #ifndef CONFIG_I2C_POLLED
-  .isr        = tiva_i2c0_interrupt,
   .irq        = TIVA_IRQ_I2C0,
 #endif
   .devno      = 0,
@@ -375,7 +344,6 @@ static const struct tiva_i2c_config_s tiva_i2c1_config =
   .scl_pin    = GPIO_I2C1_SCL,
   .sda_pin    = GPIO_I2C1_SDA,
 #ifndef CONFIG_I2C_POLLED
-  .isr        = tiva_i2c1_interrupt,
   .irq        = TIVA_IRQ_I2C1,
 #endif
   .devno      = 1,
@@ -397,7 +365,6 @@ static const struct tiva_i2c_config_s tiva_i2c2_config =
   .scl_pin    = GPIO_I2C2_SCL,
   .sda_pin    = GPIO_I2C2_SDA,
 #ifndef CONFIG_I2C_POLLED
-  .isr        = tiva_i2c2_interrupt,
   .irq        = TIVA_IRQ_I2C2,
 #endif
   .devno      = 2,
@@ -419,7 +386,6 @@ static const struct tiva_i2c_config_s tiva_i2c3_config =
   .scl_pin    = GPIO_I2C3_SCL,
   .sda_pin    = GPIO_I2C3_SDA,
 #ifndef CONFIG_I2C_POLLED
-  .isr        = tiva_i2c3_interrupt,
   .irq        = TIVA_IRQ_I2C3,
 #endif
   .devno      = 3,
@@ -441,7 +407,6 @@ static const struct tiva_i2c_config_s tiva_i2c4_config =
   .scl_pin    = GPIO_I2C4_SCL,
   .sda_pin    = GPIO_I2C4_SDA,
 #ifndef CONFIG_I2C_POLLED
-  .isr        = tiva_i2c4_interrupt,
   .irq        = TIVA_IRQ_I2C4,
 #endif
   .devno      = 4,
@@ -463,7 +428,6 @@ static const struct tiva_i2c_config_s tiva_i2c5_config =
   .scl_pin    = GPIO_I2C5_SCL,
   .sda_pin    = GPIO_I2C5_SDA,
 #ifndef CONFIG_I2C_POLLED
-  .isr        = tiva_i2c5_interrupt,
   .irq        = TIVA_IRQ_I2C5,
 #endif
   .devno      = 5,
@@ -485,7 +449,6 @@ static const struct tiva_i2c_config_s tiva_i2c6_config =
   .scl_pin    = GPIO_I2C6_SCL,
   .sda_pin    = GPIO_I2C6_SDA,
 #ifndef CONFIG_I2C_POLLED
-  .isr        = tiva_i2c6_interrupt,
   .irq        = TIVA_IRQ_I2C6,
 #endif
   .devno      = 6,
@@ -507,7 +470,6 @@ static const struct tiva_i2c_config_s tiva_i2c7_config =
   .scl_pin    = GPIO_I2C7_SCL,
   .sda_pin    = GPIO_I2C7_SDA,
 #ifndef CONFIG_I2C_POLLED
-  .isr        = tiva_i2c7_interrupt,
   .irq        = TIVA_IRQ_I2C7,
 #endif
   .devno      = 7,
@@ -529,7 +491,6 @@ static const struct tiva_i2c_config_s tiva_i2c8_config =
   .scl_pin    = GPIO_I2C8_SCL,
   .sda_pin    = GPIO_I2C8_SDA,
 #ifndef CONFIG_I2C_POLLED
-  .isr        = tiva_i2c8_interrupt,
   .irq        = TIVA_IRQ_I2C8,
 #endif
   .devno      = 8,
@@ -551,7 +512,6 @@ static const struct tiva_i2c_config_s tiva_i2c9_config =
   .scl_pin    = GPIO_I2C9_SCL,
   .sda_pin    = GPIO_I2C9_SDA,
 #ifndef CONFIG_I2C_POLLED
-  .isr        = tiva_i2c9_interrupt,
   .irq        = TIVA_IRQ_I2C9,
 #endif
   .devno      = 9,
@@ -846,7 +806,7 @@ static inline int tiva_i2c_sem_waitdone(struct tiva_i2c_priv_s *priv)
        * interrupt status until it reports that it is done.
        */
 
-      tiva_i2c_interrupt(priv, status);
+      tiva_i2c_process(priv, status);
 
       /* Calculate the elapsed time */
 
@@ -1186,14 +1146,14 @@ static void tiva_i2c_nextxfr(struct tiva_i2c_priv_s *priv, uint32_t cmd)
 }
 
 /************************************************************************************
- * Name: tiva_i2c_interrupt
+ * Name: tiva_i2c_process
  *
  * Description:
  *  Common Interrupt Service Routine
  *
  ************************************************************************************/
 
-static int tiva_i2c_interrupt(struct tiva_i2c_priv_s *priv, uint32_t status)
+static int tiva_i2c_process(struct tiva_i2c_priv_s *priv, uint32_t status)
 {
   /* Check for new trace setup */
 
@@ -1411,252 +1371,28 @@ static int tiva_i2c_interrupt(struct tiva_i2c_priv_s *priv, uint32_t status)
 }
 
 /************************************************************************************
- * Name: tiva_i2c0_interrupt
+ * Name: tiva_i2c_interrupt
  *
  * Description:
- *   I2C0 interrupt service routine
+ *   Common I2C interrupt service routine
  *
  ************************************************************************************/
 
 #if !defined(CONFIG_I2C_POLLED) && defined(CONFIG_TIVA_I2C0)
-static int tiva_i2c0_interrupt(int irq, void *context, void *arg)
+static int tiva_i2c_interrupt(int irq, void *context, void *arg)
 {
-  struct tiva_i2c_priv_s *priv;
+  struct tiva_i2c_priv_s *priv = (struct tiva_i2c_priv_s *)arg;
   uint32_t status;
 
+  DEBUGASSERT(priv != NULL);
+
   /* Read the masked interrupt status */
 
-  priv   = &tiva_i2c0_priv;
   status = tiva_i2c_getreg(priv, TIVA_I2CM_MIS_OFFSET);
 
   /* Let the common interrupt handler do the rest of the work */
 
-  return tiva_i2c_interrupt(priv, status);
+  return tiva_i2c_process(priv, status);
-}
-#endif
-
-/************************************************************************************
- * Name: tiva_i2c1_interrupt
- *
- * Description:
- *   I2C1 interrupt service routine
- *
- ************************************************************************************/
-
-#if !defined(CONFIG_I2C_POLLED) && defined(CONFIG_TIVA_I2C1)
-static int tiva_i2c1_interrupt(int irq, void *context, FAR void *arg)
-{
-  struct tiva_i2c_priv_s *priv;
-  uint32_t status;
-
-  /* Read the masked interrupt status */
-
-  priv   = &tiva_i2c1_priv;
-  status = tiva_i2c_getreg(priv, TIVA_I2CM_MIS_OFFSET);
-
-  /* Let the common interrupt handler do the rest of the work */
-
-  return tiva_i2c_interrupt(priv, status);
-}
-#endif
-
-/************************************************************************************
- * Name: tiva_i2c2_interrupt
- *
- * Description:
- *   I2C2 interrupt service routine
- *
- ************************************************************************************/
-
-#if !defined(CONFIG_I2C_POLLED) && defined(CONFIG_TIVA_I2C2)
-static int tiva_i2c2_interrupt(int irq, void *context, FAR void *arg)
-{
-  struct tiva_i2c_priv_s *priv;
-  uint32_t status;
-
-  /* Read the masked interrupt status */
-
-  priv   = &tiva_i2c2_priv;
-  status = tiva_i2c_getreg(priv, TIVA_I2CM_MIS_OFFSET);
-
-  /* Let the common interrupt handler do the rest of the work */
-
-  return tiva_i2c_interrupt(priv, status);
-}
-#endif
-
-/************************************************************************************
- * Name: tiva_i2c3_interrupt
- *
- * Description:
- *   I2C2 interrupt service routine
- *
- ************************************************************************************/
-
-#if !defined(CONFIG_I2C_POLLED) && defined(CONFIG_TIVA_I2C3)
-static int tiva_i2c3_interrupt(int irq, void *context, FAR void *arg)
-{
-  struct tiva_i2c_priv_s *priv;
-  uint32_t status;
-
-  /* Read the masked interrupt status */
-
-  priv   = &tiva_i2c3_priv;
-  status = tiva_i2c_getreg(priv, TIVA_I2CM_MIS_OFFSET);
-
-  /* Let the common interrupt handler do the rest of the work */
-
-  return tiva_i2c_interrupt(priv, status);
-}
-#endif
-
-/************************************************************************************
- * Name: tiva_i2c4_interrupt
- *
- * Description:
- *   I2C4 interrupt service routine
- *
- ************************************************************************************/
-
-#if !defined(CONFIG_I2C_POLLED) && defined(CONFIG_TIVA_I2C4)
-static int tiva_i2c4_interrupt(int irq, void *context, FAR void *arg)
-{
-  struct tiva_i2c_priv_s *priv;
-  uint32_t status;
-
-  /* Read the masked interrupt status */
-
-  priv   = &tiva_i2c4_priv;
-  status = tiva_i2c_getreg(priv, TIVA_I2CM_MIS_OFFSET);
-
-  /* Let the common interrupt handler do the rest of the work */
-
-  return tiva_i2c_interrupt(priv, status);
-}
-#endif
-
-/************************************************************************************
- * Name: tiva_i2c5_interrupt
- *
- * Description:
- *   I2C5 interrupt service routine
- *
- ************************************************************************************/
-
-#if !defined(CONFIG_I2C_POLLED) && defined(CONFIG_TIVA_I2C5)
-static int tiva_i2c5_interrupt(int irq, void *context, FAR void *arg)
-{
-  struct tiva_i2c_priv_s *priv;
-  uint32_t status;
-
-  /* Read the masked interrupt status */
-
-  priv   = &tiva_i2c5_priv;
-  status = tiva_i2c_getreg(priv, TIVA_I2CM_MIS_OFFSET);
-
-  /* Let the common interrupt handler do the rest of the work */
-
-  return tiva_i2c_interrupt(priv, status);
-}
-#endif
-
-/************************************************************************************
- * Name: tiva_i2c6_interrupt
- *
- * Description:
- *   I2C6 interrupt service routine
- *
- ************************************************************************************/
-
-#if !defined(CONFIG_I2C_POLLED) && defined(CONFIG_TIVA_I2C6)
-static int tiva_i2c6_interrupt(int irq, void *context, FAR void *arg)
-{
-  struct tiva_i2c_priv_s *priv;
-  uint32_t status;
-
-  /* Read the masked interrupt status */
-
-  priv   = &tiva_i2c6_priv;
-  status = tiva_i2c_getreg(priv, TIVA_I2CM_MIS_OFFSET);
-
-  /* Let the common interrupt handler do the rest of the work */
-
-  return tiva_i2c_interrupt(priv, status);
-}
-#endif
-
-/************************************************************************************
- * Name: tiva_i2c7_interrupt
- *
- * Description:
- *   I2C7 interrupt service routine
- *
- ************************************************************************************/
-
-#if !defined(CONFIG_I2C_POLLED) && defined(CONFIG_TIVA_I2C7)
-static int tiva_i2c7_interrupt(int irq, void *context, FAR void *arg)
-{
-  struct tiva_i2c_priv_s *priv;
-  uint32_t status;
-
-  /* Read the masked interrupt status */
-
-  priv   = &tiva_i2c7_priv;
-  status = tiva_i2c_getreg(priv, TIVA_I2CM_MIS_OFFSET);
-
-  /* Let the common interrupt handler do the rest of the work */
-
-  return tiva_i2c_interrupt(priv, status);
-}
-#endif
-
-/************************************************************************************
- * Name: tiva_i2c8_interrupt
- *
- * Description:
- *   I2C8 interrupt service routine
- *
- ************************************************************************************/
-
-#if !defined(CONFIG_I2C_POLLED) && defined(CONFIG_TIVA_I2C8)
-static int tiva_i2c8_interrupt(int irq, void *context, FAR void *arg)
-{
-  struct tiva_i2c_priv_s *priv;
-  uint32_t status;
-
-  /* Read the masked interrupt status */
-
-  priv   = &tiva_i2c8_priv;
-  status = tiva_i2c_getreg(priv, TIVA_I2CM_MIS_OFFSET);
-
-  /* Let the common interrupt handler do the rest of the work */
-
-  return tiva_i2c_interrupt(priv, status);
-}
-#endif
-
-/************************************************************************************
- * Name: tiva_i2c9_interrupt
- *
- * Description:
- *   I2C9 interrupt service routine
- *
- ************************************************************************************/
-
-#if !defined(CONFIG_I2C_POLLED) && defined(CONFIG_TIVA_I2C9)
-static int tiva_i2c9_interrupt(int irq, void *context, FAR void *arg)
-{
-  struct tiva_i2c_priv_s *priv;
-  uint32_t status;
-
-  /* Read the masked interrupt status */
-
-  priv   = &tiva_i2c9_priv;
-  status = tiva_i2c_getreg(priv, TIVA_I2CM_MIS_OFFSET);
-
-  /* Let the common interrupt handler do the rest of the work */
-
-  return tiva_i2c_interrupt(priv, status);
 }
 #endif
 
@@ -1758,7 +1494,7 @@ static int tiva_i2c_initialize(struct tiva_i2c_priv_s *priv, uint32_t frequency)
    */
 
 #ifndef CONFIG_I2C_POLLED
-  (void)irq_attach(config->irq, config->isr, NULL);
+  (void)irq_attach(config->irq, tiva_i2c_interrupt, priv);
   up_enable_irq(config->irq);
 #endif
 

configs/clicker2-stm32/README.txt

@@ -224,6 +224,86 @@ Configurations
   Configuration sub-directories
   -----------------------------
 
+  knsh:
+
+    This is identical to the nsh configuration below except that NuttX
+    is built as a protected mode, monolithic module and the user applications
+    are built separately.
+
+    It is recommends to use a special make command; not just 'make' but make
+    with the following two arguments:
+
+        make pass1 pass2
+
+    In the normal case (just 'make'), make will attempt to build both user-
+    and kernel-mode blobs more or less interleaved.  This actual works!
+    However, for me it is very confusing so I prefer the above make command:
+    Make the user-space binaries first (pass1), then make the kernel-space
+    binaries (pass2)
+
+    NOTES:
+
+    1. At the end of the build, there will be several files in the top-level
+       NuttX build directory:
+
+       PASS1:
+         nuttx_user.elf    - The pass1 user-space ELF file
+         nuttx_user.hex    - The pass1 Intel HEX format file (selected in defconfig)
+         User.map          - Symbols in the user-space ELF file
+
+       PASS2:
+         nuttx             - The pass2 kernel-space ELF file
+         nuttx.hex         - The pass2 Intel HEX file (selected in defconfig)
+         System.map        - Symbols in the kernel-space ELF file
+
+       The J-Link programmer will accept files in .hex, .mot, .srec, and .bin
+       formats.  The St-Link programmer will accept files in hex and .bin
+       formats.
+
+    2. Combining .hex files.  If you plan to use the .hex files with your
+       debugger or FLASH utility, then you may need to combine the two hex
+       files into a single .hex file.  Here is how you can do that.
+
+       a. The 'tail' of the nuttx.hex file should look something like this
+          (with my comments added):
+
+            $ tail nuttx.hex
+            # 00, data records
+            ...
+            :10 9DC0 00 01000000000800006400020100001F0004
+            :10 9DD0 00 3B005A0078009700B500D400F300110151
+            :08 9DE0 00 30014E016D0100008D
+            # 05, Start Linear Address Record
+            :04 0000 05 0800 0419 D2
+            # 01, End Of File record
+            :00 0000 01 FF
+
+          Use an editor such as vi to remove the 05 and 01 records.
+
+       b. The 'head' of the nuttx_user.hex file should look something like
+          this (again with my comments added):
+
+            $ head nuttx_user.hex
+            # 04, Extended Linear Address Record
+            :02 0000 04 0801 F1
+            # 00, data records
+            :10 8000 00 BD89 01084C800108C8110208D01102087E
+            :10 8010 00 0010 00201C1000201C1000203C16002026
+            :10 8020 00 4D80 01085D80010869800108ED83010829
+            ...
+
+          Nothing needs to be done here.  The nuttx_user.hex file should
+          be fine.
+
+       c. Combine the edited nuttx.hex and un-edited nuttx_user.hex
+          file to produce a single combined hex file:
+
+          $ cat nuttx.hex nuttx_user.hex >combined.hex
+
+       Then use the combined.hex file with the to write the FLASH image.
+       If you do this a lot, you will probably want to invest a little time
+       to develop a tool to automate these steps.
+
   mrf24j40-radio
 
     This is a version of nsh that was used for testing the MRF24J40 be as a

configs/clicker2-stm32/knsh/Make.defs

@@ -0,0 +1,122 @@
+############################################################################
+# configs/clicker2-stm32/knsh/Make.defs
+#
+#   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt <gnutt@nuttx.org>
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+include ${TOPDIR}/.config
+include ${TOPDIR}/tools/Config.mk
+include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs
+
+LDSCRIPT = flash.ld
+
+ifeq ($(WINTOOL),y)
+  # Windows-native toolchains
+  DIRLINK = $(TOPDIR)/tools/copydir.sh
+  DIRUNLINK = $(TOPDIR)/tools/unlink.sh
+  MKDEP = $(TOPDIR)/tools/mkwindeps.sh
+  ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}"
+  ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}"
+  ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}"
+else
+  # Linux/Cygwin-native toolchain
+  MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT)
+  ARCHINCLUDES = -I. -isystem $(TOPDIR)/include
+  ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx
+  ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)
+endif
+
+CC = $(CROSSDEV)gcc
+CXX = $(CROSSDEV)g++
+CPP = $(CROSSDEV)gcc -E
+LD = $(CROSSDEV)ld
+AR = $(CROSSDEV)ar rcs
+NM = $(CROSSDEV)nm
+OBJCOPY = $(CROSSDEV)objcopy
+OBJDUMP = $(CROSSDEV)objdump
+
+ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'}
+ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1}
+
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+  ARCHOPTIMIZATION = -g
+endif
+
+ifneq ($(CONFIG_DEBUG_NOOPT),y)
+  ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer
+endif
+
+ARCHCFLAGS = -fno-builtin
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
+ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
+ARCHWARNINGSXX = -Wall -Wshadow -Wundef
+ARCHDEFINES =
+ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
+
+CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
+CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
+CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES)
+AFLAGS = $(CFLAGS) -D__ASSEMBLY__
+
+NXFLATLDFLAGS1 = -r -d -warn-common
+NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections
+LDNXFLATFLAGS = -e main -s 2048
+
+# Loadable module definitions
+
+CMODULEFLAGS = $(CFLAGS) -mlong-calls # --target1-abs
+
+LDMODULEFLAGS = -r -e module_initialize
+ifeq ($(WINTOOL),y)
+  LDMODULEFLAGS += -T "${shell cygpath -w $(TOPDIR)/libc/modlib/gnu-elf.ld}"
+else
+  LDMODULEFLAGS += -T $(TOPDIR)/libc/modlib/gnu-elf.ld
+endif
+
+ASMEXT = .S
+OBJEXT = .o
+LIBEXT = .a
+EXEEXT =
+
+ifneq ($(CROSSDEV),arm-nuttx-elf-)
+  LDFLAGS += -nostartfiles -nodefaultlibs
+endif
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+  LDFLAGS += -g
+endif
+
+HOSTCC = gcc
+HOSTINCLUDES = -I.
+HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe
+HOSTLDFLAGS =

configs/nucleo-f072rb/README.txt

@@ -17,32 +17,16 @@ Contents
 
 Status
 ======
-  2017-04-27:  There are many problems.  On start up, I have to reset
+  2017-04-28:  After struggling with some clock configuration and FLASH wait
-    several times before I get NSH prompt (or parts of it).  Apparently the
+    state issues, the board now boots and the basic NSH configurations works
-    STM32 is either hanging (perhaps in clockconfig()) or perhaps it has
+    without problem.
-    taken a hard fault before it is able to generate debug output?
 
-   There are many hardfaults during initial serial output.  This change
+    A USB device driver was added along with support for clocking from the
-   seems to eliminate those hardfaults:
+    HSI48.  That driver remains untested.
 
-      @@ -2163,7 +2163,7 @@ static void stm32f0serial_txint(FAR struct uart_dev_s *dev, bool enable)
+  2017-04-30:  I tried using the I2C driver with the I2C tool (apps/system/i2c).
-            * interrupts disabled (note this may recurse).
+    I may have something wrong, but at present the driver is just timing out
-            */
+    on all transfers.
-
-    -      uart_xmitchars(dev);
-    +//      uart_xmitchars(dev);
-     #endif
-         }
-       else
-
-   Which implies that the hardfaults are due to runaway recursion in the
-   serial driver?  This suggest some error in either determining when there
-   is TX data available or in disabling TX interrupts.
-
-   But this not a solution.  Even without the hard faults, it may hang
-   attempting to output the NSH greeting and prompt or hang unable to
-   receive input.  These symptoms suggest some issue with TX and RX
-   interrupt handling.
 
 Nucleo-64 Boards
 ================
@@ -155,6 +139,8 @@ Serial Console
          PA14
          PD5
 
+  See "Virtual COM Port" and "RS-232 Shield" below.
+
   USART3
   ------
   Pins and Connectors:
@@ -168,8 +154,6 @@ Serial Console
          PC10
          D8
 
-  See "Virtual COM Port" and "RS-232 Shield" below.
-
   USART3
   ------
   Pins and Connectors:
@@ -197,8 +181,8 @@ Serial Console
 
   Configuring USART2 is the same as given above.
 
-  Question:  What BAUD should be configure to interface with the Virtual
+  115200 8N1 BAUD should be configure to interface with the Virtual COM
-  COM port?  115200 8N1?
+  port.
 
   Default
   -------

configs/nucleo-f072rb/include/board.h

@@ -230,12 +230,19 @@
 /* Alternate Pin Functions **********************************************************/
 /* USART 1 */
 
-#define GPIO_USART1_TX           GPIO_USART1_TX_2
+#define GPIO_USART1_TX           GPIO_USART1_TX_2 /* PA9  CN10 pin 21 */
-#define GPIO_USART1_RX           GPIO_USART1_RX_2
+#define GPIO_USART1_RX           GPIO_USART1_RX_2 /* PA10 CN10 pin 33 */
 
 /* USART 2 */
 
-#define GPIO_USART2_TX           GPIO_USART2_TX_3
+#define GPIO_USART2_TX           GPIO_USART2_TX_3 /* PA2  St-Link VCOM */
-#define GPIO_USART2_RX           GPIO_USART2_RX_3
+#define GPIO_USART2_RX           GPIO_USART2_RX_3 /* PA3  St-Link VCOM */
+
+/* I2C1 */
+
+#define GPIO_I2C1_SCL            GPIO_I2C1_SCL_2  /* PB8  CN5 pin 10, D15 */
+#define GPIO_I2C1_SDA            GPIO_I2C1_SDA_2  /* PB9  CN5 pin 9, D14 */
+
+/* I2C2 */
 
 #endif  /* __CONFIG_NUCLEO_F072RB_INCLUDE_BOARD_H */

configs/nucleo-f072rb/src/stm32_bringup.c

@@ -43,8 +43,20 @@
 #include <sys/types.h>
 #include <debug.h>
 
+#include <nuttx/i2c/i2c_master.h>
+
+#include "stm32f0_i2c.h"
 #include "nucleo-f072rb.h"
 
+/****************************************************************************
+ * Pre-processor Defintiionis
+ ****************************************************************************/
+
+#undef HAVE_I2C_DRIVER
+#if defined(CONFIG_STM32F0_I2C1) && defined(CONFIG_I2C_DRIVER)
+#  define HAVE_I2C_DRIVER 1
+#endif
+
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -65,6 +77,9 @@
 
 int stm32_bringup(void)
 {
+#ifdef HAVE_I2C_DRIVER
+  FAR struct i2c_master_s *i2c;
+#endif
   int ret;
 
 #ifdef CONFIG_FS_PROCFS
@@ -77,6 +92,26 @@ int stm32_bringup(void)
     }
 #endif
 
+#ifdef HAVE_I2C_DRIVER
+  /* Get the I2C lower half instance */
+
+  i2c = stm32f0_i2cbus_initialize(1);
+  if (i2c == NULL)
+    {
+      i2cerr("ERROR: Inialize I2C1: %d\n", ret);
+    }
+  else
+    {
+      /* Regiser the I2C character driver */
+
+      ret = i2c_register(i2c, 1);
+      if (ret < 0)
+        {
+          i2cerr("ERROR: Failed to register I2C1 device: %d\n", ret);
+        }
+    }
+#endif
+
   UNUSED(ret);
   return OK;
 }

configs/stm32f0discovery/include/board.h

@@ -239,4 +239,9 @@
 #define GPIO_USART1_TX           GPIO_USART1_TX_1
 #define GPIO_USART1_RX           GPIO_USART1_RX_1
 
+/* I2C pins definition */
+
+#define GPIO_I2C1_SCL            GPIO_I2C1_SCL_1
+#define GPIO_I2C1_SDA            GPIO_I2C1_SDA_1
+
 #endif  /* __CONFIG_STM32F0DISCOVERY_INCLUDE_BOARD_H */

drivers/i2c/i2c_driver.c

@@ -82,8 +82,10 @@ struct i2c_driver_s
  * Private Function Prototypes
  ****************************************************************************/
 
+#ifndef CONFIG_DISABLE_PSEUDOFS_OPERATIONS
 static int     i2cdrvr_open(FAR struct file *filep);
 static int     i2cdrvr_close(FAR struct file *filep);
+#endif
 static ssize_t i2cdrvr_read(FAR struct file *filep, FAR char *buffer,
                  size_t buflen);
 static ssize_t i2cdrvr_write(FAR struct file *filep, FAR const char *buffer,
@@ -253,6 +255,7 @@ static int i2cdrvr_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
   priv = (FAR struct i2c_driver_s *)inode->i_private;
   DEBUGASSERT(priv);
 
+#ifndef CONFIG_DISABLE_PSEUDOFS_OPERATIONS
   /* Get exclusive access to the I2C driver state structure */
 
   ret = sem_wait(&priv->exclsem);
@@ -262,6 +265,7 @@ static int i2cdrvr_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
       DEBUGASSERT(errcode < 0);
       return -errcode;
     }
+#endif
 
   /* Process the IOCTL command */
 
@@ -306,7 +310,9 @@ static int i2cdrvr_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
         break;
     }
 
+#ifndef CONFIG_DISABLE_PSEUDOFS_OPERATIONS
   sem_post(&priv->exclsem);
+#endif
   return ret;
 }
 

include/nuttx/analog/ltc1867l.h

@@ -97,12 +97,12 @@ enum ltc1867l_analog_input_mode_e
   LTC1867L_BIPOLAR = 0,
 };
 
-struct ltc1867l_channel_config_s
+begin_packed_struct struct ltc1867l_channel_config_s
 {
   uint8_t channel;                                                     /* This will be the channel number returned in struct adc_msg_s for a conversion */
   enum ltc1867l_analog_multiplexer_config_e analog_multiplexer_config; /* Analog multiplexer configuration */
   enum ltc1867l_analog_input_mode_e analog_inputMode;                  /* Analog input mode */
-} packed_struct;
+} end_packed_struct;
 
 /****************************************************************************
  * Public Function Prototypes

include/nuttx/sensors/lis2dh.h

@@ -273,25 +273,25 @@ enum lis2dh_interrupt_mode
   LIS2DH_6D_POSITION = 0xc0,
 };
 
-struct lis2dh_vector_s
+begin_packed_struct struct lis2dh_vector_s
 {
   int16_t  x, y, z;
-} packed_struct;
+} end_packed_struct;
 
-struct lis2dh_res_header
+begin_packed_struct struct lis2dh_res_header
 {
   uint8_t meas_count;
   bool    int1_occurred;
   uint8_t int1_source;
   bool    int2_occurred;
   uint8_t int2_source;
-} packed_struct;
+} end_packed_struct;
 
-struct lis2dh_result
+begin_packed_struct struct lis2dh_result
 {
   struct lis2dh_res_header header;
   struct lis2dh_vector_s measurements[0];
-} packed_struct;
+} end_packed_struct;
 
 struct lis2dh_setup
 {
@@ -402,12 +402,12 @@ struct lis2dh_config_s
   CODE bool (*read_int2_pin)(void);
 };
 
-struct lis2dh_raw_data_s
+begin_packed_struct struct lis2dh_raw_data_s
 {
   uint16_t out_x;
   uint16_t out_y;
   uint16_t out_z;
-} packed_struct;
+} end_packed_struct;
 
 typedef struct lis2dh_raw_data_s lis2dh_raw_data_t;
 

include/nuttx/spi/spi.h

@@ -432,9 +432,10 @@
 #define SPIDEVID_TYPE (devid) (((uint32_t)(devid) >> 16) & 0xffff)
 #define SPIDEVID_INDEX(devid)  ((uint32_t)(devid)        & 0xffff)
 
-/* These are replacement definitions for the currently used SPI device indexes.
+/* These are standard definitions for the defined SPI device IDs.  The index
- * The argument, n, is the instance number. This should be zero is there is
+ * argument, n, is the instance number.  This should be zero if there is
- * only one instance of the SPI device on the bus.
+ * only one instance of the SPI device on the SPI bus. Indices greater than
+ * zero discriminate the additional devices of the same type on the SPI bus.
  */
 
 #define SPIDEV_NONE(n)          SPIDEV_ID(SPIDEVTYPE_NONE,          (n))

include/nuttx/wireless/ieee80211/ieee80211_cypto.h

@@ -0,0 +1,119 @@
+/****************************************************************************
+ * net/ieee80211/ieee80211_crypto.h
+ * 802.11 protocol crypto-related definitions.
+ *
+ * Copyright (c) 2007, 2008 Damien Bergamini <damien.bergamini@free.fr>
+ *
+ * Permission to use, copy, modify, and distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ *
+ ****************************************************************************/
+
+#ifndef __INCLUDE_NUTTX_WIRELESS_IEEE80211_IEEE80211_CRYPTO_H
+#define __INCLUDE_NUTTX_WIRELESS_IEEE80211_IEEE80211_CRYPTO_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#define IEEE80211_KEYBUF_SIZE    16
+
+#define IEEE80211_TKIP_HDRLEN    8
+#define IEEE80211_TKIP_MICLEN    8
+#define IEEE80211_TKIP_ICVLEN    4
+#define IEEE80211_CCMP_HDRLEN    8
+#define IEEE80211_CCMP_MICLEN    8
+
+#define IEEE80211_PMK_LEN    32
+
+/****************************************************************************
+ * Public Types
+ ****************************************************************************/
+
+/* 802.11 ciphers */
+
+enum ieee80211_cipher
+{
+  IEEE80211_CIPHER_NONE      = 0x00000000,
+  IEEE80211_CIPHER_USEGROUP  = 0x00000001,
+  IEEE80211_CIPHER_WEP40     = 0x00000002,
+  IEEE80211_CIPHER_TKIP      = 0x00000004,
+  IEEE80211_CIPHER_CCMP      = 0x00000008,
+  IEEE80211_CIPHER_WEP104    = 0x00000010,
+  IEEE80211_CIPHER_BIP       = 0x00000020   /* 11w */
+};
+
+/* 802.11 Authentication and Key Management Protocols */
+
+enum ieee80211_akm
+{
+  IEEE80211_AKM_NONE         = 0x00000000,
+  IEEE80211_AKM_8021X        = 0x00000001,
+  IEEE80211_AKM_PSK          = 0x00000002,
+  IEEE80211_AKM_SHA256_8021X = 0x00000004,  /* 11w */
+  IEEE80211_AKM_SHA256_PSK   = 0x00000008   /* 11w */
+};
+
+struct ieee80211_key
+{
+  uint8_t k_id;                             /* Identifier (0-5) */
+  enum ieee80211_cipher k_cipher;
+  unsigned int k_flags;
+
+#define IEEE80211_KEY_GROUP    0x00000001   /* Group data key */
+#define IEEE80211_KEY_TX       0x00000002   /* Tx+Rx */
+#define IEEE80211_KEY_IGTK     0x00000004   /* Integrity group key */
+
+  unsigned int k_len;
+  uint64_t k_rsc[IEEE80211_NUM_TID];
+  uint64_t k_mgmt_rsc;
+  uint64_t k_tsc;
+  uint8_t k_key[32];
+  FAR void *k_priv;
+};
+
+/* Entry in the PMKSA cache */
+
+struct ieee80211_pmk
+{
+  sq_entry_t pmk_next;
+  enum ieee80211_akm pmk_akm;
+  uint32_t pmk_lifetime;
+
+#define IEEE80211_PMK_INFINITE  0
+
+  uint8_t pmk_pmkid[IEEE80211_PMKID_LEN];
+  uint8_t pmk_macaddr[IEEE80211_ADDR_LEN];
+  uint8_t pmk_key[IEEE80211_PMK_LEN];
+};
+
+/****************************************************************************
+ * Inline Functions
+ ****************************************************************************/
+
+static __inline int ieee80211_is_8021x_akm(enum ieee80211_akm akm)
+{
+  return akm == IEEE80211_AKM_8021X || akm == IEEE80211_AKM_SHA256_8021X;
+}
+
+static __inline int ieee80211_is_sha256_akm(enum ieee80211_akm akm)
+{
+  return akm == IEEE80211_AKM_SHA256_8021X || akm == IEEE80211_AKM_SHA256_PSK;
+}
+
+#endif /* __INCLUDE_NUTTX_WIRELESS_IEEE80211_IEEE80211_CRYPTO_H */