boards/arm: add nxp mr-navq95b support
Build Documentation / build-html (push) Has been cancelled

- Add support for the MR-NAVQ95 which is an open-source development
  board designed for mobile robotics applications.
- Utilizes the NXP i.MX95 processor M7 core
- Configurations:
  'nsh'   A minimal configuration that only enables nsh shell
          on a UART
  'rpmsg' This configuration is similar to nsh but in addition
          it offers the Remote Processing Messaging (RPMsg) service to
          enable heterogeneous inter-core communication.

Signed-off-by: Andre Heinemans <andre.heinemans@nxp.com>
This commit is contained in:
Andre Heinemans
2026-02-05 13:36:26 +01:00
committed by Alan C. Assis
parent 99db09d050
commit e83606732d
20 changed files with 1747 additions and 0 deletions
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# ##############################################################################
# boards/arm/imx9/mr-navq95b/CMakeLists.txt
#
# SPDX-License-Identifier: Apache-2.0
#
# Licensed to the Apache Software Foundation (ASF) under one or more contributor
# license agreements. See the NOTICE file distributed with this work for
# additional information regarding copyright ownership. The ASF licenses this
# file to you under the Apache License, Version 2.0 (the "License"); you may not
# use this file except in compliance with the License. You may obtain a copy of
# the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
# License for the specific language governing permissions and limitations under
# the License.
#
# ##############################################################################
add_subdirectory(src)
if(NOT CONFIG_BUILD_FLAT)
add_subdirectory(kernel)
set_property(
GLOBAL PROPERTY LD_SCRIPT_USER ${CMAKE_CURRENT_LIST_DIR}/scripts/memory.ld
${CMAKE_CURRENT_LIST_DIR}/scripts/user-space.ld)
endif()
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#
# For a description of the syntax of this configuration file,
# see the file kconfig-language.txt in the NuttX tools repository.
#
choice IMX95_CODE_LOCATION
prompt "Code location"
config IMX95_RUN_FROM_ITCM
bool "Run from Instruction Tightly Coupled Memory (ITCM)"
config IMX95_RUN_FROM_DDR
bool "Run from SDRAM (DDR)"
config IMX95_RUN_FROM_FLASH
bool "Run from NOR flash"
endchoice
@@ -0,0 +1,59 @@
#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_ARCH_LEDS is not set
# CONFIG_ARCH_RAMFUNCS is not set
# CONFIG_IMX9_WFI_AWAKES_AT_SYSTICK is not set
# CONFIG_NDEBUG is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="mr-navq95b"
CONFIG_ARCH_BOARD_MR_NAVQ95B=y
CONFIG_ARCH_CHIP="imx9"
CONFIG_ARCH_CHIP_IMX95_M7=y
CONFIG_ARCH_CHIP_IMX9_CORTEX_M=y
CONFIG_ARCH_INTERRUPTSTACK=4096
CONFIG_ARCH_STACKDUMP=y
CONFIG_ARMV7M_DCACHE=y
CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y
CONFIG_ARMV7M_DTCM=y
CONFIG_ARMV7M_ICACHE=y
CONFIG_ARMV7M_ITCM=y
CONFIG_ARM_MPU=y
CONFIG_ARM_MPU_RESET=y
CONFIG_BINFMT_DISABLE=y
CONFIG_BOARD_LOOPSPERMSEC=2664
CONFIG_BUILTIN=y
CONFIG_DEBUG_BUSFAULT=y
CONFIG_DEBUG_FEATURES=y
CONFIG_DEBUG_HARDFAULT_ALERT=y
CONFIG_DEBUG_HARDFAULT_INFO=y
CONFIG_DEBUG_SYMBOLS=y
CONFIG_DEBUG_USAGEFAULT=y
CONFIG_DEFAULT_TASK_STACKSIZE=8192
CONFIG_FS_PROCFS=y
CONFIG_IDLETHREAD_STACKSIZE=8192
CONFIG_IMX9_IOMUX_OVER_SCMI=y
CONFIG_IMX9_LPUART2=y
CONFIG_INIT_ENTRYPOINT="nsh_main"
CONFIG_INTELHEX_BINARY=y
CONFIG_LIBC_LOCALTIME=y
CONFIG_LPUART2_SERIAL_CONSOLE=y
CONFIG_NSH_ARCHINIT=y
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_DISABLE_IFUPDOWN=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_RAM_SIZE=134217728
CONFIG_RAM_START=0x80000000
CONFIG_RAW_BINARY=y
CONFIG_SCHED_BACKTRACE=y
CONFIG_SERIAL_TERMIOS=y
CONFIG_STACK_COLORATION=y
CONFIG_START_DAY=14
CONFIG_START_MONTH=3
CONFIG_SYSTEM_NSH=y
CONFIG_TTY_SIGINT=y
CONFIG_TTY_SIGTSTP=y
@@ -0,0 +1,80 @@
#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_ARCH_LEDS is not set
# CONFIG_ARCH_RAMFUNCS is not set
# CONFIG_IMX9_WFI_AWAKES_AT_SYSTICK is not set
# CONFIG_NDEBUG is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="mr-navq95b"
CONFIG_ARCH_BOARD_MR_NAVQ95B=y
CONFIG_ARCH_CHIP="imx9"
CONFIG_ARCH_CHIP_IMX95_M7=y
CONFIG_ARCH_CHIP_IMX9_CORTEX_M=y
CONFIG_ARCH_INTERRUPTSTACK=4096
CONFIG_ARCH_STACKDUMP=y
CONFIG_ARMV7M_DCACHE=y
CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y
CONFIG_ARMV7M_DTCM=y
CONFIG_ARMV7M_ICACHE=y
CONFIG_ARMV7M_ITCM=y
CONFIG_ARM_MPU=y
CONFIG_ARM_MPU_RESET=y
CONFIG_BINFMT_DISABLE=y
CONFIG_BOARD_LOOPSPERMSEC=2664
CONFIG_BUILTIN=y
CONFIG_DEBUG_BUSFAULT=y
CONFIG_DEBUG_FEATURES=y
CONFIG_DEBUG_FULLOPT=y
CONFIG_DEBUG_HARDFAULT_ALERT=y
CONFIG_DEBUG_HARDFAULT_INFO=y
CONFIG_DEBUG_IPC=y
CONFIG_DEBUG_IPC_ERROR=y
CONFIG_DEBUG_IPC_WARN=y
CONFIG_DEBUG_RPMSG=y
CONFIG_DEBUG_RPMSG_ERROR=y
CONFIG_DEBUG_RPMSG_WARN=y
CONFIG_DEBUG_RPTUN=y
CONFIG_DEBUG_RPTUN_ERROR=y
CONFIG_DEBUG_RPTUN_WARN=y
CONFIG_DEBUG_SYMBOLS=y
CONFIG_DEBUG_USAGEFAULT=y
CONFIG_DEFAULT_TASK_STACKSIZE=8192
CONFIG_DEV_RPMSG=y
CONFIG_DEV_SIMPLE_ADDRENV=y
CONFIG_FS_PROCFS=y
CONFIG_FS_RPMSGFS=y
CONFIG_IDLETHREAD_STACKSIZE=8192
CONFIG_IMX9_IOMUX_OVER_SCMI=y
CONFIG_IMX9_LPUART2=y
CONFIG_IMX9_MU7=y
CONFIG_INIT_ENTRYPOINT="nsh_main"
CONFIG_INTELHEX_BINARY=y
CONFIG_LIBC_LOCALTIME=y
CONFIG_LPUART2_SERIAL_CONSOLE=y
CONFIG_MM_HEAP_MEMPOOL_THRESHOLD=0
CONFIG_NSH_ARCHINIT=y
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_DISABLE_IFUPDOWN=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_RAM_SIZE=134217728
CONFIG_RAM_START=0x80000000
CONFIG_RAW_BINARY=y
CONFIG_RPMSG_LOCAL_CPUNAME="cpuapp"
CONFIG_RPMSG_UART=y
CONFIG_RPTUN=y
CONFIG_SCHED_BACKTRACE=y
CONFIG_SCHED_WAITPID=y
CONFIG_SERIAL_TERMIOS=y
CONFIG_STACK_COLORATION=y
CONFIG_START_DAY=14
CONFIG_START_MONTH=3
CONFIG_SYSTEM_CUTERM=y
CONFIG_SYSTEM_CUTERM_DEFAULT_DEVICE="/dev/ttyproxy"
CONFIG_SYSTEM_NSH=y
CONFIG_TTY_SIGINT=y
CONFIG_TTY_SIGTSTP=y
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/****************************************************************************
* boards/arm/imx9/mr-navq95b/include/board.h
*
* SPDX-License-Identifier: Apache-2.0
* SPDX-FileCopyrightText: 2026 NXP
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __BOARDS_ARM_IMX9_MR_NAVQ95B_INCLUDE_BOARD_H
#define __BOARDS_ARM_IMX9_MR_NAVQ95B_INCLUDE_BOARD_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#define BOARD_XTAL_FREQUENCY 24000000
#define BOARD_CPU_FREQUENCY 800000000
#define LPUART2_CLK (LPUART2_CLK_ROOT_OSC_24M_CLK | CLOCK_DIV(1))
#define LPUART5_CLK (LPUART5_CLK_ROOT_SYS_PLL1_DFS0_DIV2_CLK | CLOCK_DIV(8))
#define LPI2C1_CLK (LPI2C1_CLK_ROOT_OSC_24M_CLK | CLOCK_DIV(1))
#define LPI2C4_CLK (LPI2C4_CLK_ROOT_OSC_24M_CLK | CLOCK_DIV(1))
#define LPI2C6_CLK (LPI2C6_CLK_ROOT_OSC_24M_CLK | CLOCK_DIV(1))
#define LPSPI1_CLK (LPSPI1_CLK_ROOT_OSC_24M_CLK | CLOCK_DIV(1))
#define LPSPI8_CLK (LPSPI8_CLK_ROOT_OSC_24M_CLK | CLOCK_DIV(1))
#define FLEXCAN1_CLK (CAN1_CLK_ROOT_SYS_PLL1_DFS1_DIV2_CLK | CLOCK_DIV(5))
#define FLEXCAN2_CLK (CAN2_CLK_ROOT_SYS_PLL1_DFS1_DIV2_CLK | CLOCK_DIV(5))
#define FLEXCAN3_CLK (CAN3_CLK_ROOT_SYS_PLL1_DFS1_DIV2_CLK | CLOCK_DIV(5))
/* This LED is not used by the board port unless CONFIG_ARCH_LEDS is
* defined. In that case, the usage by the board port is defined in
* include/board.h and src/imxrt_autoleds.c. The LED is used to encode
* OS-related events as follows:
*
* -------------------- ----------------------------- ------- -------
* SYMBOL Meaning LED1 LED2
* GREEN RED
* -------------------- ----------------------------- ------- -------
*/
#define LED_STARTED 0 /* NuttX has been started OFF OFF */
#define LED_HEAPALLOCATE 0 /* Heap has been allocated OFF OFF */
#define LED_IRQSENABLED 0 /* Interrupts enabled OFF OFF */
#define LED_STACKCREATED 1 /* Idle stack created ON OFF */
#define LED_INIRQ 2 /* In an interrupt (No change) */
#define LED_SIGNAL 2 /* In a signal handler (No change) */
#define LED_ASSERTION 2 /* An assertion failed (No change) */
#define LED_PANIC 3 /* The system has crashed OFF FLASH */
#undef LED_IDLE /* Not used (Not used) */
/* Default PAD configurations */
#define IOMUX_LPI2C_DEFAULT (IOMUXC_PAD_OD_ENABLE | IOMUXC_PAD_FSEL_SFAST | IOMUXC_PAD_DSE_X6)
#define IOMUX_LPSPI_DEFAULT (IOMUXC_PAD_PU_ON | IOMUXC_PAD_FSEL_FAST | IOMUXC_PAD_DSE_X6)
#define IOMUX_GPIO_DEFAULT (IOMUXC_PAD_FSEL_SLOW | IOMUXC_PAD_DSE_X6)
/* UART pin muxings */
#define MUX_LPUART2_RX IOMUX_CFG(IOMUXC_PAD_UART2_RXD_LPUART2_RX, 0, IOMUXC_MUX_SION_ON)
#define MUX_LPUART2_TX IOMUX_CFG(IOMUXC_PAD_UART2_TXD_LPUART2_TX, IOMUXC_PAD_FSEL_SLOW | IOMUXC_PAD_DSE_X4, 0)
#define MUX_LPUART5_RX IOMUX_CFG(IOMUXC_PAD_GPIO_IO01_LPUART5_RX, 0, IOMUXC_MUX_SION_ON)
#define MUX_LPUART5_TX IOMUX_CFG(IOMUXC_PAD_GPIO_IO00_LPUART5_TX, IOMUXC_PAD_FSEL_SLOW | IOMUXC_PAD_DSE_X4, 0)
/* LPI2Cs */
#define MUX_LPI2C1_SCL IOMUX_CFG(IOMUXC_PAD_I2C1_SCL_LPI2C1_SCL, IOMUX_LPI2C_DEFAULT, IOMUXC_MUX_SION_ON)
#define MUX_LPI2C1_SDA IOMUX_CFG(IOMUXC_PAD_I2C1_SDA_LPI2C1_SDA, IOMUX_LPI2C_DEFAULT, IOMUXC_MUX_SION_ON)
#define MUX_LPI2C4_SCL IOMUX_CFG(IOMUXC_PAD_GPIO_IO31_LPI2C4_SCL, IOMUX_LPI2C_DEFAULT, IOMUXC_MUX_SION_ON)
#define MUX_LPI2C4_SDA IOMUX_CFG(IOMUXC_PAD_GPIO_IO30_LPI2C4_SDA, IOMUX_LPI2C_DEFAULT, IOMUXC_MUX_SION_ON)
#define MUX_LPI2C6_SCL IOMUX_CFG(IOMUXC_PAD_GPIO_IO03_LPI2C6_SCL, IOMUX_LPI2C_DEFAULT, IOMUXC_MUX_SION_ON)
#define MUX_LPI2C6_SDA IOMUX_CFG(IOMUXC_PAD_GPIO_IO02_LPI2C6_SDA, IOMUX_LPI2C_DEFAULT, IOMUXC_MUX_SION_ON)
/* I2C reset functionality */
#define GPIO_LPI2C1_SCL_RESET (GPIO_PORT1 | GPIO_PIN0 | GPIO_OUTPUT | GPIO_OUTPUT_ONE)
#define GPIO_LPI2C1_SDA_RESET (GPIO_PORT1 | GPIO_PIN1 | GPIO_OUTPUT | GPIO_OUTPUT_ONE)
#define GPIO_LPI2C4_SCL_RESET (GPIO_PORT2 | GPIO_PIN31 | GPIO_OUTPUT | GPIO_OUTPUT_ONE)
#define GPIO_LPI2C4_SDA_RESET (GPIO_PORT2 | GPIO_PIN30 | GPIO_OUTPUT | GPIO_OUTPUT_ONE)
#define GPIO_LPI2C6_SCL_RESET (GPIO_PORT2 | GPIO_PIN3 | GPIO_OUTPUT | GPIO_OUTPUT_ONE)
#define GPIO_LPI2C6_SDA_RESET (GPIO_PORT2 | GPIO_PIN2 | GPIO_OUTPUT | GPIO_OUTPUT_ONE)
/* LPSPIs */
#define MUX_LPSPI1_SCK IOMUX_CFG(IOMUXC_PAD_SAI1_TXD0_LPSPI1_SCK, IOMUX_LPSPI_DEFAULT, IOMUXC_MUX_SION_ON)
#define MUX_LPSPI1_MOSI IOMUX_CFG(IOMUXC_PAD_SAI1_RXD0_LPSPI1_SOUT, IOMUX_LPSPI_DEFAULT, IOMUXC_MUX_SION_ON)
#define MUX_LPSPI1_MISO IOMUX_CFG(IOMUXC_PAD_SAI1_TXC_LPSPI1_SIN, IOMUX_LPSPI_DEFAULT, IOMUXC_MUX_SION_ON)
#define MUX_LPSPI8_SCK IOMUX_CFG(IOMUXC_PAD_GPIO_IO15_LPSPI8_SCK, IOMUX_LPSPI_DEFAULT, IOMUXC_MUX_SION_ON)
#define MUX_LPSPI8_MOSI IOMUX_CFG(IOMUXC_PAD_GPIO_IO14_LPSPI8_SOUT, IOMUX_LPSPI_DEFAULT, IOMUXC_MUX_SION_ON)
#define MUX_LPSPI8_MISO IOMUX_CFG(IOMUXC_PAD_GPIO_IO13_LPSPI8_SIN, IOMUX_LPSPI_DEFAULT, IOMUXC_MUX_SION_ON)
/* SPI CS */
#define MUX_LPSPI1_CS IOMUX_CFG(IOMUXC_PAD_SAI1_TXFS_GPIO1_IO11, IOMUX_GPIO_DEFAULT, IOMUXC_MUX_SION_ON)
#define MUX_LPSPI8_CS IOMUX_CFG(IOMUXC_PAD_GPIO_IO12_GPIO2_IO12, IOMUX_LPSPI_DEFAULT, IOMUXC_MUX_SION_ON)
#define MUX_LPSPI8_CS1 IOMUX_CFG(IOMUXC_PAD_GPIO_IO26_GPIO2_IO26, IOMUX_LPSPI_DEFAULT, IOMUXC_MUX_SION_ON)
#define GPIO_LPSPI1_CS (GPIO_PORT1 | GPIO_PIN11 | GPIO_OUTPUT | GPIO_OUTPUT_ONE)
#define GPIO_LPSPI8_CS (GPIO_PORT2 | GPIO_PIN12 | GPIO_OUTPUT | GPIO_OUTPUT_ONE)
#define GPIO_LPSPI8_CS1 (GPIO_PORT2 | GPIO_PIN26 | GPIO_OUTPUT | GPIO_OUTPUT_ONE)
/* FlexCAN */
#define GPIO_FLEXCAN1_TX IOMUX_CFG(IOMUXC_PAD_PDM_CLK_CAN1_TX, IOMUX_GPIO_DEFAULT, IOMUXC_MUX_SION_ON)
#define GPIO_FLEXCAN1_RX IOMUX_CFG(IOMUXC_PAD_PDM_BIT_STREAM0_CAN1_RX, IOMUX_GPIO_DEFAULT, IOMUXC_MUX_SION_ON)
#define GPIO_FLEXCAN2_TX IOMUX_CFG(IOMUXC_PAD_GPIO_IO25_CAN2_TX, IOMUX_GPIO_DEFAULT, IOMUXC_MUX_SION_ON)
#define GPIO_FLEXCAN2_RX IOMUX_CFG(IOMUXC_PAD_GPIO_IO27_CAN2_RX, IOMUX_GPIO_DEFAULT, IOMUXC_MUX_SION_ON)
#define GPIO_FLEXCAN2_TX IOMUX_CFG(IOMUXC_PAD_CCM_CLKO3_CAN3_TX, IOMUX_GPIO_DEFAULT, IOMUXC_MUX_SION_ON)
#define GPIO_FLEXCAN2_RX IOMUX_CFG(IOMUXC_PAD_CCM_CLKO4_CAN3_RX, IOMUX_GPIO_DEFAULT, IOMUXC_MUX_SION_ON)
/* Set the PLL clocks as follows:
*
* - OSC24M : 24 MHz
* - ARMPLL_OUT : 1692 MHz
* - DRAMPLL : 933 MHz
* - SYSPLL1 : 4000 MHz
* - SYSPLL_PFD0 : 1000 MHz
* - SYSPLL_PFD1 : 800 MHz
* - SYSPLL_PFD2 : 625 MHz
* - AUDIOPLL_OUT : OFF
* - VIDEOPLL_OUT : OFF
*
* After reset all clock sources (OSCPLL) and root clocks (CLOCK_ROOT) are
* running, but gated (LPCG).
*
* By default, all peripheral root clocks are set to the 24 MHz oscillator.
*/
#define ARMPLL_CFG PLL_CFG(IMX95_ARMPLL_BASE, false, PLL_PARMS(1, 2, 141, 0, 0))
#define DRAMPLL_CFG PLL_CFG(IMX95_DRAMPLL_BASE, true, PLL_PARMS(1, 2, 155, 1, 2))
#define PLL_CFGS \
{ \
PLL_CFG(IMX95_SYSPLL_BASE, true, PLL_PARMS(1, 4, 166, 2, 3)), \
}
#define PFD_CFGS \
{ \
PFD_CFG(IMX95_SYSPLL_BASE, 0, PFD_PARMS(4, 0, true)), \
PFD_CFG(IMX95_SYSPLL_BASE, 1, PFD_PARMS(5, 0, true)), \
PFD_CFG(IMX95_SYSPLL_BASE, 2, PFD_PARMS(6, 2, true)), \
}
/****************************************************************************
* Public Data
****************************************************************************/
#ifndef __ASSEMBLY__
#undef EXTERN
#if defined(__cplusplus)
#define EXTERN extern "C"
extern "C"
{
#else
#define EXTERN extern
#endif
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
#undef EXTERN
#if defined(__cplusplus)
}
#endif
#endif /* __ASSEMBLY__ */
#endif /* __BOARDS_ARM_IMX9_MR_NAVQ95B_INCLUDE_BOARD_H */
@@ -0,0 +1,56 @@
############################################################################
# boards/arm/imx9/mr-navq95b/scripts/Make.defs
#
# SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: 2026 NXP
#
# Licensed to the Apache Software Foundation (ASF) under one or more
# contributor license agreements. See the NOTICE file distributed with
# this work for additional information regarding copyright ownership. The
# ASF licenses this file to you under the Apache License, Version 2.0 (the
# "License"); you may not use this file except in compliance with the
# License. You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
# License for the specific language governing permissions and limitations
# under the License.
#
############################################################################
include $(TOPDIR)/.config
include $(TOPDIR)/tools/Config.mk
include $(TOPDIR)/arch/arm/src/armv7-m/Toolchain.defs
ifeq ($(CONFIG_IMX95_RUN_FROM_ITCM),y)
LDSCRIPT = itcm.ld
else ifeq ($(CONFIG_IMX95_RUN_FROM_DDR),y)
LDSCRIPT = ddr.ld
else ifeq ($(CONFIG_IMX95_RUN_FROM_FLASH),y)
LDSCRIPT = flash.ld
endif
ARCHSCRIPT += $(BOARD_DIR)$(DELIM)scripts$(DELIM)$(LDSCRIPT)
ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
CFLAGS := $(ARCHCFLAGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) -pipe
CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
CXXFLAGS := $(ARCHCXXFLAGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) -pipe
CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS)
AFLAGS := $(CFLAGS) -D__ASSEMBLY__
NXFLATLDFLAGS1 = -r -d -warn-common
NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections
LDNXFLATFLAGS = -e main -s 2048
# Loadable module definitions
CMODULEFLAGS = $(CFLAGS) -mlong-calls # --target1-abs
LDMODULEFLAGS = -r -e module_initialize
LDMODULEFLAGS += -T $(call CONVERT_PATH,$(TOPDIR)/libs/libc/elf/gnu-elf.ld)
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@@ -0,0 +1,137 @@
/****************************************************************************
* boards/arm/imx9/mr-navq95b/scripts/ddr.ld
*
* SPDX-License-Identifier: Apache-2.0
* SPDX-FileCopyrightText: 2026 NXP
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
*
****************************************************************************/
/*
* Flash controller
* 1) 32 MB of FlexSPI_1 at 0x0200:0000
* The on-chip SRAM is split in these parts:
* 1) 256Kb of program memory located at 0x0000:0000
* 2) 256Kb of data memory beginning at the address 0x2000:0000
* 3) 352Kb of OCRAM beginning at the address 0x2048:0000
* 4) 4Mb of SDRAM located at 0x9000:0000
*/
MEMORY
{
m_interrupts (rx) : ORIGIN = 0x90000000, LENGTH = 0x00000800
flash (rx) : ORIGIN = 0x90000800, LENGTH = 0x003FF800
sram (rwx) : ORIGIN = 0x20000000, LENGTH = 256K
ocram (rwx) : ORIGIN = 0x20480000, LENGTH = 352K
}
OUTPUT_ARCH(arm)
EXTERN(_vectors)
ENTRY(_stext)
SECTIONS
{
.interrupts :
{
__VECTOR_TABLE = .;
__Vectors = .;
. = ALIGN(4);
KEEP(*(.vectors)) /* Startup code */
. = ALIGN(4);
} > m_interrupts
.text : {
_stext = ABSOLUTE(.);
*(.text .text.*)
*(.fixup)
*(.gnu.warning)
*(.rodata .rodata.*)
*(.gnu.linkonce.t.*)
*(.glue_7)
*(.glue_7t)
*(.got)
*(.gcc_except_table)
*(.gnu.linkonce.r.*)
_etext = ABSOLUTE(.);
} > flash
.resource_table :
{
. = ALIGN(8);
KEEP(*(.resource_table))
. = ALIGN(4);
} > flash
.init_section : {
_sinit = ABSOLUTE(.);
KEEP(*(SORT_BY_INIT_PRIORITY(.init_array.*) SORT_BY_INIT_PRIORITY(.ctors.*)))
KEEP(*(.init_array .ctors))
_einit = ABSOLUTE(.);
} > flash
.ARM.extab : {
*(.ARM.extab*)
} > flash
__exidx_start = ABSOLUTE(.);
.ARM.exidx : {
*(.ARM.exidx*)
} > flash
__exidx_end = ABSOLUTE(.);
_eronly = ABSOLUTE(.);
.data : {
_sdata = ABSOLUTE(.);
*(.data .data.*)
*(.gnu.linkonce.d.*)
CONSTRUCTORS
. = ALIGN(4);
_edata = ABSOLUTE(.);
} > sram AT > flash
.bss : {
_sbss = ABSOLUTE(.);
*(.bss .bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
. = ALIGN(4);
_ebss = ABSOLUTE(.);
} > sram
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_info 0 : { *(.debug_info) }
.debug_line 0 : { *(.debug_line) }
.debug_pubnames 0 : { *(.debug_pubnames) }
.debug_aranges 0 : { *(.debug_aranges) }
_ram_start = ORIGIN(sram);
_ram_size = LENGTH(sram);
_ram_end = ORIGIN(sram) + LENGTH(sram);
_ocram_start = ORIGIN(ocram);
_ocram_size = LENGTH(ocram);
_ocram_end = ORIGIN(ocram) + LENGTH(ocram);
}
+138
View File
@@ -0,0 +1,138 @@
/****************************************************************************
* boards/arm/imx9/mr-navq95b/scripts/flash.ld
*
* SPDX-License-Identifier: Apache-2.0
* SPDX-FileCopyrightText: 2026 NXP
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
*
****************************************************************************/
/*
* Flash controller
* 1) 32 MB of FlexSPI_1 at 0x0200:0000
* The on-chip SRAM is split in these parts:
* 1) 256Kb of program memory located at 0x0000:0000
* 2) 256Kb of data memory beginning at the address 0x2000:0000
* 3) 352Kb of OCRAM beginning at the address 0x2048:0000
* 4) 4Mb of SDRAM located at 0x9000:0000
*/
MEMORY
{
mcuboot_header (rwx) : ORIGIN = 0x28000000, LENGTH = 0x00000800
m_interrupts (rx) : ORIGIN = 0x28000800, LENGTH = 0x00000800
flash (rx) : ORIGIN = 0x28001000, LENGTH = 0x01FFE000
sram (rwx) : ORIGIN = 0x20000000, LENGTH = 256K
ocram (rwx) : ORIGIN = 0x20480000, LENGTH = 352K
}
OUTPUT_ARCH(arm)
EXTERN(_vectors)
ENTRY(_stext)
SECTIONS
{
.interrupts :
{
__VECTOR_TABLE = .;
__Vectors = .;
. = ALIGN(4);
KEEP(*(.vectors)) /* Startup code */
. = ALIGN(4);
} > m_interrupts
.text : {
_stext = ABSOLUTE(.);
*(.text .text.*)
*(.fixup)
*(.gnu.warning)
*(.rodata .rodata.*)
*(.gnu.linkonce.t.*)
*(.glue_7)
*(.glue_7t)
*(.got)
*(.gcc_except_table)
*(.gnu.linkonce.r.*)
_etext = ABSOLUTE(.);
} > flash
.resource_table :
{
. = ALIGN(8);
KEEP(*(.resource_table))
. = ALIGN(4);
} > flash
.init_section : {
_sinit = ABSOLUTE(.);
KEEP(*(SORT_BY_INIT_PRIORITY(.init_array.*) SORT_BY_INIT_PRIORITY(.ctors.*)))
KEEP(*(.init_array .ctors))
_einit = ABSOLUTE(.);
} > flash
.ARM.extab : {
*(.ARM.extab*)
} > flash
__exidx_start = ABSOLUTE(.);
.ARM.exidx : {
*(.ARM.exidx*)
} > flash
__exidx_end = ABSOLUTE(.);
_eronly = ABSOLUTE(.);
.data : {
_sdata = ABSOLUTE(.);
*(.data .data.*)
*(.gnu.linkonce.d.*)
CONSTRUCTORS
. = ALIGN(4);
_edata = ABSOLUTE(.);
} > sram AT > flash
.bss : {
_sbss = ABSOLUTE(.);
*(.bss .bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
. = ALIGN(4);
_ebss = ABSOLUTE(.);
} > sram
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_info 0 : { *(.debug_info) }
.debug_line 0 : { *(.debug_line) }
.debug_pubnames 0 : { *(.debug_pubnames) }
.debug_aranges 0 : { *(.debug_aranges) }
_ram_start = ORIGIN(sram);
_ram_size = LENGTH(sram);
_ram_end = ORIGIN(sram) + LENGTH(sram);
_ocram_start = ORIGIN(ocram);
_ocram_size = LENGTH(ocram);
_ocram_end = ORIGIN(ocram) + LENGTH(ocram);
}
+137
View File
@@ -0,0 +1,137 @@
/****************************************************************************
* boards/arm/imx9/mr-navq95b/scripts/itcm.ld
*
* SPDX-License-Identifier: Apache-2.0
* SPDX-FileCopyrightText: 2026 NXP
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
*
****************************************************************************/
/*
* Flash controller
* 1) 32 MB of FlexSPI_1 at 0x0200:0000
* The on-chip SRAM is split in these parts:
* 1) 256Kb of program memory located at 0x0000:0000
* 2) 256Kb of data memory beginning at the address 0x2000:0000
* 3) 352Kb of OCRAM beginning at the address 0x2048:0000
* 4) 4Mb of SDRAM located at 0x9000:0000
*/
MEMORY
{
m_interrupts (rx) : ORIGIN = 0x00000000, LENGTH = 0x00000800
flash (rx) : ORIGIN = 0x00000800, LENGTH = 0x0003F800
sram (rwx) : ORIGIN = 0x20000000, LENGTH = 256K
ocram (rwx) : ORIGIN = 0x20480000, LENGTH = 352K
}
OUTPUT_ARCH(arm)
EXTERN(_vectors)
ENTRY(_stext)
SECTIONS
{
.interrupts :
{
__VECTOR_TABLE = .;
__Vectors = .;
. = ALIGN(4);
KEEP(*(.vectors)) /* Startup code */
. = ALIGN(4);
} > m_interrupts
.text : {
_stext = ABSOLUTE(.);
*(.text .text.*)
*(.fixup)
*(.gnu.warning)
*(.rodata .rodata.*)
*(.gnu.linkonce.t.*)
*(.glue_7)
*(.glue_7t)
*(.got)
*(.gcc_except_table)
*(.gnu.linkonce.r.*)
_etext = ABSOLUTE(.);
} > flash
.resource_table :
{
. = ALIGN(8);
KEEP(*(.resource_table))
. = ALIGN(4);
} > flash
.init_section : {
_sinit = ABSOLUTE(.);
KEEP(*(SORT_BY_INIT_PRIORITY(.init_array.*) SORT_BY_INIT_PRIORITY(.ctors.*)))
KEEP(*(.init_array .ctors))
_einit = ABSOLUTE(.);
} > flash
.ARM.extab : {
*(.ARM.extab*)
} > flash
__exidx_start = ABSOLUTE(.);
.ARM.exidx : {
*(.ARM.exidx*)
} > flash
__exidx_end = ABSOLUTE(.);
_eronly = ABSOLUTE(.);
.data : {
_sdata = ABSOLUTE(.);
*(.data .data.*)
*(.gnu.linkonce.d.*)
CONSTRUCTORS
. = ALIGN(4);
_edata = ABSOLUTE(.);
} > sram AT > flash
.bss : {
_sbss = ABSOLUTE(.);
*(.bss .bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
. = ALIGN(4);
_ebss = ABSOLUTE(.);
} > sram
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_info 0 : { *(.debug_info) }
.debug_line 0 : { *(.debug_line) }
.debug_pubnames 0 : { *(.debug_pubnames) }
.debug_aranges 0 : { *(.debug_aranges) }
_ram_start = ORIGIN(sram);
_ram_size = LENGTH(sram);
_ram_end = ORIGIN(sram) + LENGTH(sram);
_ocram_start = ORIGIN(ocram);
_ocram_size = LENGTH(ocram);
_ocram_end = ORIGIN(ocram) + LENGTH(ocram);
}
@@ -0,0 +1,49 @@
# ##############################################################################
# boards/arm/imx9/mr-navq95b/src/CMakeLists.txt
#
# SPDX-License-Identifier: Apache-2.0
#
# Licensed to the Apache Software Foundation (ASF) under one or more contributor
# license agreements. See the NOTICE file distributed with this work for
# additional information regarding copyright ownership. The ASF licenses this
# file to you under the Apache License, Version 2.0 (the "License"); you may not
# use this file except in compliance with the License. You may obtain a copy of
# the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
# License for the specific language governing permissions and limitations under
# the License.
#
# ##############################################################################
set(SRCS imx95_boardinit.c imx95_bringup.c)
if(CONFIG_BOARDCTL)
list(APPEND SRCS imx95_appinit.c)
endif()
if(CONFIG_PWM)
list(APPEND SRCS imx95_pwm.c)
endif()
if(CONFIG_IMX9_LPI2C)
list(APPEND SRCS imx95_i2c.c)
endif()
if(CONFIG_IMX9_LPSPI)
list(APPEND SRCS imx95_spi.c)
endif()
target_sources(board PRIVATE ${SRCS})
if(CONFIG_IMX95_RUN_FROM_ITCM)
set_property(GLOBAL PROPERTY LD_SCRIPT "${NUTTX_BOARD_DIR}/scripts/itcm.ld")
elseif(CONFIG_IMX95_RUN_FROM_DDR)
set_property(GLOBAL PROPERTY LD_SCRIPT "${NUTTX_BOARD_DIR}/scripts/ddr.ld")
elseif(CONFIG_IMX95_RUN_FROM_FLASH)
set_property(GLOBAL PROPERTY LD_SCRIPT "${NUTTX_BOARD_DIR}/scripts/flash.ld")
endif()
+44
View File
@@ -0,0 +1,44 @@
############################################################################
# boards/arm/imx9/mr-navq95b/src/Makefile
#
# SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: 2026 NXP
#
# Licensed to the Apache Software Foundation (ASF) under one or more
# contributor license agreements. See the NOTICE file distributed with
# this work for additional information regarding copyright ownership. The
# ASF licenses this file to you under the Apache License, Version 2.0 (the
# "License"); you may not use this file except in compliance with the
# License. You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
# License for the specific language governing permissions and limitations
# under the License.
#
############################################################################
include $(TOPDIR)/Make.defs
CSRCS = imx95_boardinit.c imx95_bringup.c
ifeq ($(CONFIG_BOARDCTL),y)
CSRCS += imx95_appinit.c
endif
ifeq ($(CONFIG_PWM),y)
CSRCS += imx95_pwm.c
endif
ifeq ($(CONFIG_IMX9_LPI2C),y)
CSRCS += imx95_i2c.c
endif
ifeq ($(CONFIG_IMX9_LPSPI),y)
CSRCS += imx95_spi.c
endif
include $(TOPDIR)/boards/Board.mk
@@ -0,0 +1,76 @@
/****************************************************************************
* boards/arm/imx9/mr-navq95b/src/imx95_appinit.c
*
* SPDX-License-Identifier: Apache-2.0
* SPDX-FileCopyrightText: 2026 NXP
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <sys/types.h>
#include <nuttx/board.h>
#include "mr-navq95b.h"
#ifdef CONFIG_BOARDCTL
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: board_app_initialize
*
* Description:
* Perform application specific initialization. This function is never
* called directly from application code, but only indirectly via the
* (non-standard) boardctl() interface using the command BOARDIOC_INIT.
*
* Input Parameters:
* arg - The boardctl() argument is passed to the board_app_initialize()
* implementation without modification. The argument has no
* meaning to NuttX; the meaning of the argument is a contract
* between the board-specific initialization logic and the
* matching application logic. The value could be such things as a
* mode enumeration value, a set of DIP switch switch settings, a
* pointer to configuration data read from a file or serial FLASH,
* or whatever you would like to do with it. Every implementation
* should accept zero/NULL as a default configuration.
*
* Returned Value:
* Zero (OK) is returned on success; a negated errno value is returned on
* any failure to indicate the nature of the failure.
*
****************************************************************************/
int board_app_initialize(uintptr_t arg)
{
UNUSED(arg);
#ifndef CONFIG_BOARD_LATE_INITIALIZE
/* Perform board initialization */
return imx95_bringup();
#else
return OK;
#endif
}
#endif /* CONFIG_BOARDCTL */
@@ -0,0 +1,116 @@
/****************************************************************************
* boards/arm/imx9/mr-navq95b/src/imx95_boardinit.c
*
* SPDX-License-Identifier: Apache-2.0
* SPDX-FileCopyrightText: 2026 NXP
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <nuttx/board.h>
#include <stdint.h>
#include "mr-navq95b.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: imx95_memory_initialize
*
* Description:
* All i.MX8 architectures must provide the following entry point. This
* entry point is called early in the initialization before memory has
* been configured. This board-specific function is responsible for
* configuring any on-board memories.
*
* Logic in imx95_memory_initialize must be careful to avoid using any
* global variables because those will be uninitialized at the time this
* function is called.
*
* Input Parameters:
* None
*
* Returned Value:
* None
*
****************************************************************************/
void imx95_memory_initialize(void)
{
/* SDRAM was initialized by a bootloader in the supported configurations. */
}
/****************************************************************************
* Name: imx95_board_initialize
*
* Description:
* All i.MX8 architectures must provide the following entry point. This
* entry point is called in the initialization phase -- after
* imx_memory_initialize and after all memory has been configured and
* mapped but before any devices have been initialized.
*
* Input Parameters:
* None
*
* Returned Value:
* None
*
****************************************************************************/
void imx9_boardinitialize(void)
{
#ifdef CONFIG_ARCH_LEDS
/* Configure on-board LEDs if LED support has been selected. */
#endif
}
/****************************************************************************
* Name: board_late_initialize
*
* Description:
* If CONFIG_BOARD_LATE_INITIALIZE is selected, then an additional
* initialization call will be performed in the boot-up sequence to a
* function called board_late_initialize(). board_late_initialize() will be
* called immediately after up_intitialize() is called and just before the
* initial application is started. This additional initialization phase
* may be used, for example, to initialize board-specific device drivers.
*
****************************************************************************/
#ifdef CONFIG_BOARD_LATE_INITIALIZE
void board_late_initialize(void)
{
/* Perform board initialization */
imx95_bringup();
}
#endif /* CONFIG_BOARD_LATE_INITIALIZE */
@@ -0,0 +1,101 @@
/****************************************************************************
* boards/arm/imx9/mr-navq95b/src/imx95_bringup.c
*
* SPDX-License-Identifier: Apache-2.0
* SPDX-FileCopyrightText: 2026 NXP
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <nuttx/fs/fs.h>
#include <sys/types.h>
#include <syslog.h>
#include "mr-navq95b.h"
#ifdef CONFIG_RPTUN
# include <imx9_rptun.h>
#endif
#ifdef CONFIG_RPMSG_UART
# include <nuttx/serial/uart_rpmsg.h>
#endif
/****************************************************************************
* Public Functions
****************************************************************************/
#ifdef CONFIG_RPMSG_UART
void rpmsg_serialinit(void)
{
uart_rpmsg_init("netcore", "proxy", 4096, true);
}
#endif
/****************************************************************************
* Name: imx_bringup
*
* Description:
* Bring up board features
*
****************************************************************************/
int imx95_bringup(void)
{
int ret;
#ifdef CONFIG_RPTUN
imx9_rptun_init("imx9-shmem", "netcore");
#endif
#ifdef CONFIG_FS_PROCFS
/* Mount the procfs file system */
ret = nx_mount(NULL, "/proc", "procfs", 0, NULL);
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: Failed to mount procfs at /proc: %d\n", ret);
}
#endif
#if defined(CONFIG_IMX9_LPI2C)
/* Configure I2C peripheral interfaces */
ret = imx95_i2c_initialize();
if (ret < 0)
{
syslog(LOG_ERR, "Failed to initialize I2C driver: %d\n", ret);
}
#endif
#if defined(CONFIG_IMX9_LPSPI1)
/* Configure SPI peripheral interfaces */
ret = imx95_spi_initialize();
if (ret < 0)
{
syslog(LOG_ERR, "Failed to initialize SPI driver: %d\n", ret);
}
#endif
UNUSED(ret);
return OK;
}
@@ -0,0 +1,88 @@
/****************************************************************************
* boards/arm/imx9/mr-navq95b/src/imx95_i2c.c
*
* SPDX-License-Identifier: Apache-2.0
* SPDX-FileCopyrightText: 2026 NXP
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <nuttx/i2c/i2c_master.h>
#include <nuttx/sensors/bmm150.h>
#include <debug.h>
#include <errno.h>
#include <sys/types.h>
#include "imx9_lpi2c.h"
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: board_i2c_init
*
* Description:
* Configure the I2C driver.
*
* Returned Value:
* Zero (OK) is returned on success; A negated errno value is returned
* to indicate the nature of any failure.
*
****************************************************************************/
int imx95_i2c_initialize(void)
{
int ret = OK;
#ifdef CONFIG_IMX9_LPI2C6
struct i2c_master_s *i2c;
i2c = imx9_i2cbus_initialize(6);
if (i2c == NULL)
{
i2cerr("ERROR: Failed to init I2C6 interface\n");
return -ENODEV;
}
#ifdef CONFIG_SENSORS_BMM150
struct bmm150_config_s bmm150_config = {
.i2c = i2c,
.addr = 0x12,
};
bmm150_register_uorb(0, &bmm150_config);
#endif
#ifdef CONFIG_I2C_DRIVER
ret = i2c_register(i2c, 0);
if (ret < 0)
{
i2cerr("ERROR: Failed to register I2C6 driver: %d\n", ret);
imx9_i2cbus_uninitialize(i2c);
return ret;
}
#endif
#endif
return OK;
}
+164
View File
@@ -0,0 +1,164 @@
/****************************************************************************
* boards/arm/imx9/mr-navq95b/src/imx95_spi.c
*
* SPDX-License-Identifier: Apache-2.0
* SPDX-FileCopyrightText: 2026 NXP
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <nuttx/spi/spi_transfer.h>
#include <debug.h>
#include <errno.h>
#include <sys/types.h>
#include <arch/board/board.h>
#include "imx9_gpio.h"
#include "imx9_lpspi.h"
/****************************************************************************
* Private Data
****************************************************************************/
#ifdef CONFIG_IMX9_LPSPI1
static struct spi_dev_s *g_spi1;
#endif
/****************************************************************************
* Public Functions
****************************************************************************/
#ifdef CONFIG_IMX9_LPSPI
/****************************************************************************
* Name: imx95_lpspix_select
*
* Description:
* Enable/disable the SPI chip select. The implementation of this method
* must include handshaking: If a device is selected, it must hold off
* all other attempts to select the device until the device is deselected.
* Required.
*
* Input Parameters:
* dev - Device-specific state data
* devid - Identifies the device to select
* selected - true: slave selected, false: slave de-selected
*
* Returned Value:
* None
*
****************************************************************************/
void imx9_lpspi_select(struct spi_dev_s *dev, uint32_t devid, bool selected)
{
#ifdef CONFIG_IMX9_LPSPI1
if (dev == g_spi1)
{
imx9_gpio_write(GPIO_LPSPI1_CS, !selected);
}
#endif
}
/****************************************************************************
* Name: imx95_lpspix_status
*
* Description:
* Get SPI/MMC status. Optional.
*
* Input Parameters:
* dev - Device-specific state data
* devid - Identifies the device to report status on
*
* Returned Value:
* Returns a bitset of status values (see SPI_STATUS_* defines)
*
****************************************************************************/
uint8_t imx9_lpspi_status(struct spi_dev_s *dev, uint32_t devid)
{
return 0;
}
/****************************************************************************
* Name: imx95_lpspixcmddata
*
* Description:
* Some devices require an additional out-of-band bit to specify if the
* next word sent to the device is a command or data. This is typical, for
* example, in "9-bit" displays where the 9th bit is the CMD/DATA bit.
* This function provides selection of command or data.
*
* This "latches" the CMD/DATA state. It does not have to be called before
* every word is transferred; only when the CMD/DATA state changes. This
* method is required if CONFIG_SPI_CMDDATA is selected in the NuttX
* configuration
*
* Input Parameters:
* dev - Device-specific state data
* cmd - TRUE: The following word is a command; FALSE: the following words
* are data.
*
* Returned Value:
* OK unless an error occurs. Then a negated errno value is returned
*
****************************************************************************/
int imx95_lpspi_cmddata(struct spi_dev_s *dev, uint32_t devid, bool cmd)
{
return -ENODEV;
}
#endif
/****************************************************************************
* Name: board_spi_initialize
*
* Description:
* Initialize and register SPI driver for the defined SPI ports.
*
****************************************************************************/
int imx95_spi_initialize(void)
{
int ret = OK;
#if defined(CONFIG_IMX9_LPSPI1)
/* Initialize SPI device */
g_spi1 = imx9_lpspibus_initialize(1);
if (g_spi1 == NULL)
{
spierr("Failed to initialize SPI1\n");
return -ENODEV;
}
#ifdef CONFIG_SPI_DRIVER
ret = spi_register(g_spi1, 0);
if (ret < 0)
{
spierr("Failed to register /dev/spi0: %d\n", ret);
}
#endif /* CONFIG_SPI_DRIVER */
#endif /* CONFIG_MPFS_SPI0 */
return OK;
}
@@ -0,0 +1,98 @@
/****************************************************************************
* boards/arm/imx9/mr-navq95b/src/mr-navq95b.h
*
* SPDX-License-Identifier: Apache-2.0
* SPDX-FileCopyrightText: 2026 NXP
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __BOARDS_ARM_IMX9_MR_NAVQ95B_SRC_MR_NAVQ95B_H
#define __BOARDS_ARM_IMX9_MR_NAVQ95B_SRC_MR_NAVQ95B_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
/****************************************************************************
* Public Types
****************************************************************************/
/****************************************************************************
* Public Data
****************************************************************************/
#ifndef __ASSEMBLY__
/****************************************************************************
* Public Functions Definitions
****************************************************************************/
/****************************************************************************
* Name: imx95_bringup
*
* Description:
* Bring up board features
*
****************************************************************************/
#if defined(CONFIG_BOARDCTL) || defined(CONFIG_BOARD_LATE_INITIALIZE)
int imx95_bringup(void);
#endif
/****************************************************************************
* Name: imx95_pwm_setup
*
* Description:
* Initialize PWM outputs
*
****************************************************************************/
#if defined(CONFIG_PWM)
int imx95_pwm_setup(void);
#endif
/****************************************************************************
* Name: imx95_i2c_setup
*
* Description:
* Initialize I2C devices and driver
*
****************************************************************************/
#if defined(CONFIG_I2C_DRIVER)
int imx95_i2c_initialize(void);
#endif
/****************************************************************************
* Name: imx95_spi_setup
*
* Description:
* Initialize SPI devices and driver
*
****************************************************************************/
#if defined(CONFIG_SPI_DRIVER)
int imx95_spi_initialize(void);
#endif
#endif /* __ASSEMBLY__ */
#endif /* __BOARDS_ARM_IMX9_MR_NAVQ95B_SRC_MR_NAVQ95B_H */