diff --git a/arch/renesas/include/rx65n/iodefine.h b/arch/renesas/include/rx65n/iodefine.h index 915d86a91a2..e83f906c057 100644 --- a/arch/renesas/include/rx65n/iodefine.h +++ b/arch/renesas/include/rx65n/iodefine.h @@ -1,44 +1,29 @@ -/***************************************************************************** +/**************************************************************************** * arch/renesas/include/rx65n/iodefine.h * - * Copyright (C) 2008-2019 Gregory Nutt. All rights reserved. - * Author: Anjana + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - *****************************************************************************/ + ****************************************************************************/ #ifndef __RX65NIODEFINE_HEADER__ #define __RX65NIODEFINE_HEADER__ /**************************************************************************** * Pre-processor Definitions - ***************************************************************************/ + ****************************************************************************/ #define IEN_BSC_BUSERR IEN0 #define IEN_RAM_RAMERR IEN2 @@ -907,20 +892,61 @@ #define _CLR( x ) __CLR( x ) #define CLR( x , y ) _CLR( _ ## x ## _ ## y ) -#define BSC (*(volatile struct st_bsc *)0x81300) -#define CAC (*(volatile struct st_cac *)0x8b000) -#define CMT (*(volatile struct st_cmt *)0x88000) +#define BSC (*(volatile struct st_bsc *)0x81300) +#define CAC (*(volatile struct st_cac *)0x8b000) +#define CAN0 (*(volatile struct st_can *)0x90200) +#define CAN1 (*(volatile struct st_can *)0x91200) +#define CMT (*(volatile struct st_cmt *)0x88000) #define CMT0 (*(volatile struct st_cmt0 *)0x88002) #define CMT1 (*(volatile struct st_cmt0 *)0x88008) #define CMT2 (*(volatile struct st_cmt0 *)0x88012) #define CMT3 (*(volatile struct st_cmt0 *)0x88018) #define CMTW0 (*(volatile struct st_cmtw *)0x94200) +#define CMTW1 (*(volatile struct st_cmtw *)0x94280) +#define CRC (*(volatile struct st_crc *)0x88280) +#define DA (*(volatile struct st_da *)0x88040) +#define DMAC (*(volatile struct st_dmac *)0x82200) +#define DMAC0 (*(volatile struct st_dmac0 *)0x82000) +#define DMAC1 (*(volatile struct st_dmac1 *)0x82040) +#define DMAC2 (*(volatile struct st_dmac1 *)0x82080) +#define DMAC3 (*(volatile struct st_dmac1 *)0x820c0) +#define DMAC4 (*(volatile struct st_dmac1 *)0x82100) +#define DMAC5 (*(volatile struct st_dmac1 *)0x82140) +#define DMAC6 (*(volatile struct st_dmac1 *)0x82180) +#define DMAC7 (*(volatile struct st_dmac1 *)0x821c0) +#define DOC (*(volatile struct st_doc *)0x8b080) +#define DRW2D (*(volatile struct st_drw2d *)0xe3000) +#define DTC (*(volatile struct st_dtc *)0x82400) +#define EDMAC0 (*(volatile struct st_edmac *)0xc0000) +#define ELC (*(volatile struct st_elc *)0x8b100) +#define ETHERC0 (*(volatile struct st_etherc *)0xc0100) +#define EXDMAC (*(volatile struct st_exdmac *)0x82a00) +#define EXDMAC0 (*(volatile struct st_exdmac0 *)0x82800) +#define EXDMAC1 (*(volatile struct st_exdmac1 *)0x82840) +#define FLASH (*(volatile struct st_flash *)0x81000) +#define GLCDC (*(volatile struct st_glcdc *)0xe0000) #define ICU (*(volatile struct st_icu *)0x87000) +#define IWDT (*(volatile struct st_iwdt *)0x88030) +#define MMCIF (*(volatile struct st_mmcif *)0x88500) #define MPC (*(volatile struct st_mpc *)0x8c100) +#define MPU (*(volatile struct st_mpu *)0x86400) +#define MTU (*(volatile struct st_mtu *)0xc120a) +#define MTU0 (*(volatile struct st_mtu0 *)0xc1290) +#define MTU1 (*(volatile struct st_mtu1 *)0xc1290) +#define MTU2 (*(volatile struct st_mtu2 *)0xc1292) +#define MTU3 (*(volatile struct st_mtu3 *)0xc1200) +#define MTU4 (*(volatile struct st_mtu4 *)0xc1200) +#define MTU5 (*(volatile struct st_mtu5 *)0xc1a94) +#define MTU6 (*(volatile struct st_mtu6 *)0xc1a00) +#define MTU7 (*(volatile struct st_mtu7 *)0xc1a00) +#define MTU8 (*(volatile struct st_mtu8 *)0xc1298) +#define PDC (*(volatile struct st_pdc *)0xa0500) +#define POE3 (*(volatile struct st_poe *)0x8c4c0) #define PORT0 (*(volatile struct st_port0 *)0x8c000) #define PORT1 (*(volatile struct st_port1 *)0x8c001) #define PORT2 (*(volatile struct st_port2 *)0x8c002) #define PORT3 (*(volatile struct st_port3 *)0x8c003) +#define PORT4 (*(volatile struct st_port4 *)0x8c004) #define PORT5 (*(volatile struct st_port5 *)0x8c005) #define PORT6 (*(volatile struct st_port6 *)0x8c006) #define PORT7 (*(volatile struct st_port7 *)0x8c007) @@ -929,11 +955,24 @@ #define PORTA (*(volatile struct st_porta *)0x8c00a) #define PORTB (*(volatile struct st_portb *)0x8c00b) #define PORTC (*(volatile struct st_portc *)0x8c00c) +#define PORTD (*(volatile struct st_portd *)0x8c00d) #define PORTE (*(volatile struct st_porte *)0x8c00e) #define PORTF (*(volatile struct st_portf *)0x8c00f) #define PORTG (*(volatile struct st_portg *)0x8c010) #define PORTJ (*(volatile struct st_portj *)0x8c012) +#define PPG0 (*(volatile struct st_ppg0 *)0x881e6) +#define PPG1 (*(volatile struct st_ppg1 *)0x881f0) +#define QSPI (*(volatile struct st_qspi *)0x89e00) +#define RAM (*(volatile struct st_ram *)0x81200) +#define RIIC0 (*(volatile struct st_riic *)0x88300) +#define RIIC1 (*(volatile struct st_riic *)0x88320) +#define RIIC2 (*(volatile struct st_riic *)0x88340) +#define RSPI0 (*(volatile struct st_rspi *)0xd0100) +#define RSPI1 (*(volatile struct st_rspi *)0xd0140) +#define RSPI2 (*(volatile struct st_rspi *)0xd0300) #define RTC (*(volatile struct st_rtc *)0x8c400) +#define S12AD (*(volatile struct st_s12ad *)0x89000) +#define S12AD1 (*(volatile struct st_s12ad1 *)0x89100) #define SCI0 (*(volatile struct st_sci0 *)0x8a000) #define SCI1 (*(volatile struct st_sci0 *)0x8a020) #define SCI2 (*(volatile struct st_sci0 *)0x8a040) @@ -947,12 +986,46 @@ #define SCI10 (*(volatile struct st_sci10 *)0xd0040) #define SCI11 (*(volatile struct st_sci10 *)0xd0060) #define SCI12 (*(volatile struct st_sci12 *)0x8b300) - +#define SDHI (*(volatile struct st_sdhi *)0x8ac00) +#define SDSI (*(volatile struct st_sdsi *)0x95000) +#define SMCI0 (*(volatile struct st_smci0 *)0x8a000) +#define SMCI1 (*(volatile struct st_smci0 *)0x8a020) +#define SMCI2 (*(volatile struct st_smci0 *)0x8a040) +#define SMCI3 (*(volatile struct st_smci0 *)0x8a060) +#define SMCI4 (*(volatile struct st_smci0 *)0x8a080) +#define SMCI5 (*(volatile struct st_smci0 *)0x8a0a0) +#define SMCI6 (*(volatile struct st_smci0 *)0x8a0c0) +#define SMCI7 (*(volatile struct st_smci0 *)0x8a0e0) +#define SMCI8 (*(volatile struct st_smci0 *)0x8a100) +#define SMCI9 (*(volatile struct st_smci0 *)0x8a120) +#define SMCI10 (*(volatile struct st_smci10 *)0xd0040) +#define SMCI11 (*(volatile struct st_smci10 *)0xd0060) +#define SMCI12 (*(volatile struct st_smci0 *)0x8b300) #define SYSTEM (*(volatile struct st_system *)0x80000) +#define TEMPS (*(volatile struct st_temps *)0x8c500) +#define TMR0 (*(volatile struct st_tmr0 *)0x88200) +#define TMR1 (*(volatile struct st_tmr1 *)0x88201) +#define TMR2 (*(volatile struct st_tmr0 *)0x88210) +#define TMR3 (*(volatile struct st_tmr1 *)0x88211) +#define TMR01 (*(volatile struct st_tmr01 *)0x88204) +#define TMR23 (*(volatile struct st_tmr01 *)0x88214) +#define TPU0 (*(volatile struct st_tpu0 *)0x88108) +#define TPU1 (*(volatile struct st_tpu1 *)0x88108) +#define TPU2 (*(volatile struct st_tpu2 *)0x8810a) +#define TPU3 (*(volatile struct st_tpu3 *)0x8810a) +#define TPU4 (*(volatile struct st_tpu4 *)0x8810c) +#define TPU5 (*(volatile struct st_tpu5 *)0x8810c) +#define TPUA (*(volatile struct st_tpua *)0x88100) +#define USB (*(volatile struct st_usb *)0xa0400) +#define USB0 (*(volatile struct st_usb0 *)0xa0000) +#define WDT (*(volatile struct st_wdt *)0x88020) +#define FLASHCONST (*(volatile struct st_flashconst *)0xfe7f7d90) +#define TEMPSCONST (*(volatile struct st_tempsconst *)0xfe7f7d7c) /**************************************************************************** * Public Types - ***************************************************************************/ + ****************************************************************************/ + typedef enum enum_ir { IR_BSC_BUSERR = 16, @@ -1856,7 +1929,7 @@ struct st_bsc_berclr_bit #endif }; -union un_berclr +union un_bsc_berclr { unsigned char BYTE; struct st_bsc_berclr_bit BIT; @@ -1875,7 +1948,7 @@ struct st_bsc_beren_bit #endif }; -union un_beren +union un_bsc_beren { unsigned char BYTE; struct st_bsc_beren_bit BIT; @@ -1898,7 +1971,7 @@ struct st_bsc_bersr1_bit #endif }; -union un_bersr1 +union un_bsc_bersr1 { unsigned char BYTE; struct st_bsc_bersr1_bit BIT; @@ -1915,7 +1988,7 @@ struct st_bsc_bersr2_bit #endif }; -union un_bersr2 +union un_bsc_bersr2 { unsigned short WORD; struct st_bsc_bersr2_bit BIT; @@ -1944,7 +2017,7 @@ struct st_bsc_buspri_bit #endif }; -union un_buspri +union un_bsc_buspri { unsigned short WORD; struct st_bsc_buspri_bit BIT; @@ -1973,7 +2046,7 @@ struct st_bsc_cs0mod_bit #endif }; -union un_cs0mod +union un_bsc_cs0mod { unsigned short WORD; struct st_bsc_cs0mod_bit BIT; @@ -2002,12 +2075,57 @@ struct st_bsc_cs0wcr1_bit #endif }; -union un_cs0wcr1 +union un_bsc_cs0wcr1 { unsigned long LONG; struct st_bsc_cs0wcr1_bit BIT; }; +struct st_bsc_cs0wcr2_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long CSROFF : 3; + unsigned long : 1; + unsigned long CSWOFF : 3; + unsigned long : 1; + unsigned long WDOFF : 3; + unsigned long : 1; + unsigned long AWAIT : 2; + unsigned long : 2; + unsigned long RDON : 3; + unsigned long : 1; + unsigned long WRON : 3; + unsigned long : 1; + unsigned long WDON : 3; + unsigned long : 1; + unsigned long CSON : 3; + unsigned long : 1; +#else + unsigned long : 1; + unsigned long CSON : 3; + unsigned long : 1; + unsigned long WDON : 3; + unsigned long : 1; + unsigned long WRON : 3; + unsigned long : 1; + unsigned long RDON : 3; + unsigned long : 2; + unsigned long AWAIT : 2; + unsigned long : 1; + unsigned long WDOFF : 3; + unsigned long : 1; + unsigned long CSWOFF : 3; + unsigned long : 1; + unsigned long CSROFF : 3; +#endif +}; + +union un_bsc_cs0wcr2 +{ + unsigned long LONG; + struct st_bsc_cs0wcr2_bit BIT; +}; + struct st_bsc_cs1mod_bit { #ifdef __RX_LITTLE_ENDIAN__ @@ -2031,7 +2149,7 @@ struct st_bsc_cs1mod_bit #endif }; -union un_cs1mod +union un_bsc_cs1mod { unsigned short WORD; struct st_bsc_cs1mod_bit BIT; @@ -2060,7 +2178,7 @@ struct st_bsc_cs1wcr1_bit #endif }; -union un_cs1wcr1 +union un_bsc_cs1wcr1 { unsigned long LONG; struct st_bsc_cs1wcr1_bit BIT; @@ -2105,7 +2223,7 @@ struct st_bsc_cs1wcr2_bit #endif }; -union un_cs1wcr2 +union un_bsc_cs1wcr2 { unsigned long LONG; struct st_bsc_cs1wcr2_bit BIT; @@ -2134,7 +2252,7 @@ struct st_bsc_cs2mod_bit #endif }; -union un_cs2mod +union un_bsc_cs2mod { unsigned short WORD; struct st_bsc_cs2mod_bit BIT; @@ -2163,7 +2281,7 @@ struct st_bsc_cs2wcr1_bit #endif }; -union un_cs2wcr1 +union un_bsc_cs2wcr1 { unsigned long LONG; struct st_bsc_cs2wcr1_bit BIT; @@ -2208,7 +2326,7 @@ struct st_bsc_cs2wcr2_bit #endif }; -union un_cs2wcr2 +union un_bsc_cs2wcr2 { unsigned long LONG; struct st_bsc_cs2wcr2_bit BIT; @@ -2237,7 +2355,7 @@ struct st_bsc_cs3mod_bit #endif }; -union un_cs3mod +union un_bsc_cs3mod { unsigned short WORD; struct st_bsc_cs3mod_bit BIT; @@ -2266,7 +2384,7 @@ struct st_bsc_cs3wcr1_bit #endif }; -union un_cs3wcr1 +union un_bsc_cs3wcr1 { unsigned long LONG; struct st_bsc_cs3wcr1_bit BIT; @@ -2311,7 +2429,7 @@ struct st_bsc_cs3wcr2_bit #endif }; -union un_cs3wcr2 +union un_bsc_cs3wcr2 { unsigned long LONG; struct st_bsc_cs3wcr2_bit BIT; @@ -2340,7 +2458,7 @@ struct st_bsc_cs4mod_bit #endif }; -union un_cs4mod +union un_bsc_cs4mod { unsigned short WORD; struct st_bsc_cs4mod_bit BIT; @@ -2369,7 +2487,7 @@ struct st_bsc_cs4wcr1_bit #endif }; -union un_cs4wcr1 +union un_bsc_cs4wcr1 { unsigned long LONG; struct st_bsc_cs4wcr1_bit BIT; @@ -2414,7 +2532,7 @@ struct st_bsc_cs4wcr2_bit #endif }; -union un_cs4wcr2 +union un_bsc_cs4wcr2 { unsigned long LONG; struct st_bsc_cs4wcr2_bit BIT; @@ -2443,7 +2561,7 @@ struct st_bsc_cs5mod_bit #endif }; -union un_cs5mod +union un_bsc_cs5mod { unsigned short WORD; struct st_bsc_cs5mod_bit BIT; @@ -2472,7 +2590,7 @@ struct st_bsc_cs5wcr1_bit #endif }; -union un_cs5wcr1 +union un_bsc_cs5wcr1 { unsigned long LONG; struct st_bsc_cs5wcr1_bit BIT; @@ -2517,7 +2635,7 @@ struct st_bsc_cs5wcr2_bit #endif }; -union un_cs5wcr2 +union un_bsc_cs5wcr2 { unsigned long LONG; struct st_bsc_cs5wcr2_bit BIT; @@ -2546,7 +2664,7 @@ struct st_bsc_cs6mod_bit #endif }; -union un_cs6mod +union un_bsc_cs6mod { unsigned short WORD; struct st_bsc_cs6mod_bit BIT; @@ -2575,7 +2693,7 @@ struct st_bsc_cs6wcr1_bit #endif }; -union un_cs6wcr1 +union un_bsc_cs6wcr1 { unsigned long LONG; struct st_bsc_cs6wcr1_bit BIT; @@ -2620,7 +2738,7 @@ struct st_bsc_cs6wcr2_bit #endif }; -union un_cs6wcr2 +union un_bsc_cs6wcr2 { unsigned long LONG; struct st_bsc_cs6wcr2_bit BIT; @@ -2649,7 +2767,7 @@ struct st_bsc_cs7mod_bit #endif }; -union un_cs7mod +union un_bsc_cs7mod { unsigned short WORD; struct st_bsc_cs7mod_bit BIT; @@ -2678,7 +2796,7 @@ struct st_bsc_cs7wcr1_bit #endif }; -union un_cs7wcr1 +union un_bsc_cs7wcr1 { unsigned long LONG; struct st_bsc_cs7wcr1_bit BIT; @@ -2723,7 +2841,7 @@ struct st_bsc_cs7wcr2_bit #endif }; -union un_cs7wcr2 +union un_bsc_cs7wcr2 { unsigned long LONG; struct st_bsc_cs7wcr2_bit BIT; @@ -2752,7 +2870,7 @@ struct st_bsc_cs0cr_bit #endif }; -union un_cs0cr +union un_bsc_cs0cr { unsigned short WORD; struct st_bsc_cs0cr_bit BIT; @@ -2773,7 +2891,7 @@ struct st_bsc_cs0rec_bit #endif }; -union un_cs0rec +union un_bsc_cs0rec { unsigned short WORD; struct st_bsc_cs0rec_bit BIT; @@ -2802,7 +2920,7 @@ struct st_bsc_cs1cr_bit #endif }; -union un_cs1cr +union un_bsc_cs1cr { unsigned short WORD; struct st_bsc_cs1cr_bit BIT; @@ -2823,7 +2941,7 @@ struct st_bsc_cs1rec_bit #endif }; -union un_cs1rec +union un_bsc_cs1rec { unsigned short WORD; struct st_bsc_cs1rec_bit BIT; @@ -2852,7 +2970,7 @@ struct st_bsc_cs2cr_bit #endif }; -union un_cs2cr +union un_bsc_cs2cr { unsigned short WORD; struct st_bsc_cs2cr_bit BIT; @@ -2873,7 +2991,7 @@ struct st_bsc_cs2rec_bit #endif }; -union un_cs2rec +union un_bsc_cs2rec { unsigned short WORD; struct st_bsc_cs2rec_bit BIT; @@ -2902,7 +3020,7 @@ struct st_bsc_cs3cr_bit #endif }; -union un_cs3cr +union un_bsc_cs3cr { unsigned short WORD; struct st_bsc_cs3cr_bit BIT; @@ -2923,7 +3041,7 @@ struct st_bsc_cs3rec_bit #endif }; -union un_cs3rec +union un_bsc_cs3rec { unsigned short WORD; struct st_bsc_cs3rec_bit BIT; @@ -2952,7 +3070,7 @@ struct st_bsc_cs4cr_bit #endif }; -union un_cs4cr +union un_bsc_cs4cr { unsigned short WORD; struct st_bsc_cs4cr_bit BIT; @@ -2973,7 +3091,7 @@ struct st_bsc_cs4rec_bit #endif }; -union un_cs4rec +union un_bsc_cs4rec { unsigned short WORD; struct st_bsc_cs4rec_bit BIT; @@ -3002,7 +3120,7 @@ struct st_bsc_cs5cr_bit #endif }; -union un_cs5cr +union un_bsc_cs5cr { unsigned short WORD; struct st_bsc_cs5cr_bit BIT; @@ -3023,7 +3141,7 @@ struct st_bsc_cs5rec_bit #endif }; -union un_cs5rec +union un_bsc_cs5rec { unsigned short WORD; struct st_bsc_cs5rec_bit BIT; @@ -3052,7 +3170,7 @@ struct st_bsc_cs6cr_bit #endif }; -union un_cs6cr +union un_bsc_cs6cr { unsigned short WORD; struct st_bsc_cs6cr_bit BIT; @@ -3073,7 +3191,7 @@ struct st_bsc_cs6rec_bit #endif }; -union un_cs6rec +union un_bsc_cs6rec { unsigned short WORD; struct st_bsc_cs6rec_bit BIT; @@ -3102,7 +3220,7 @@ struct st_bsc_cs7cr_bit #endif }; -union un_cs7cr +union un_bsc_cs7cr { unsigned short WORD; struct st_bsc_cs7cr_bit BIT; @@ -3123,7 +3241,7 @@ struct st_bsc_cs7rec_bit #endif }; -union un_cs7rec +union un_bsc_cs7rec { unsigned short WORD; struct st_bsc_cs7rec_bit BIT; @@ -3168,7 +3286,7 @@ struct st_bsc_csrecen_bit #endif }; -union un_csrecen +union un_bsc_csrecen { unsigned short WORD; struct st_bsc_csrecen_bit BIT; @@ -3189,7 +3307,7 @@ struct st_bsc_sdccr_bit #endif }; -union un_sdccr +union un_bsc_sdccr { unsigned char BYTE; struct st_bsc_sdccr_bit BIT; @@ -3206,7 +3324,7 @@ struct st_bsc_sdcmod_bit #endif }; -union un_sdcmod +union un_bsc_sdcmod { unsigned char BYTE; struct st_bsc_sdcmod_bit BIT; @@ -3223,7 +3341,7 @@ struct st_bsc_sdamod_bit #endif }; -union un_sdamod +union un_bsc_sdamod { unsigned char BYTE; struct st_bsc_sdamod_bit BIT; @@ -3240,7 +3358,7 @@ struct st_bsc_sdself_bit #endif }; -union un_sdself +union un_bsc_sdself { unsigned char BYTE; struct st_bsc_sdself_bit BIT; @@ -3257,7 +3375,7 @@ struct st_bsc_sdrfcr_bit #endif }; -union un_sdrfcr +union un_bsc_sdrfcr { unsigned short WORD; struct st_bsc_sdrfcr_bit BIT; @@ -3274,7 +3392,7 @@ struct st_bsc_sdrfen_bit #endif }; -union un_sdrfen +union un_bsc_sdrfen { unsigned char BYTE; struct st_bsc_sdrfen_bit BIT; @@ -3291,7 +3409,7 @@ struct st_bsc_sdicr_bit #endif }; -union un_sdicr +union un_bsc_sdicr { unsigned char BYTE; struct st_bsc_sdicr_bit BIT; @@ -3312,13 +3430,13 @@ struct st_bsc_sdir_bit #endif }; -union un_sdir +union un_bsc_sdir { unsigned short WORD; struct st_bsc_sdir_bit BIT; }; -struct st_bsc_sdar_bit +struct st_bsc_sdadr_bit { #ifdef __RX_LITTLE_ENDIAN__ unsigned char MXC : 2; @@ -3329,10 +3447,10 @@ struct st_bsc_sdar_bit #endif }; -union un_sdar +union un_bsc_sdadr { unsigned char BYTE; - struct st_bsc_sdar_bit BIT; + struct st_bsc_sdadr_bit BIT; }; struct st_bsc_sdtr_bit @@ -3358,7 +3476,7 @@ struct st_bsc_sdtr_bit #endif }; -union un_sdtr +union un_bsc_sdtr { unsigned long LONG; struct st_bsc_sdtr_bit BIT; @@ -3375,7 +3493,7 @@ struct st_bsc_sdmod_bit #endif }; -union un_sdmod +union un_bsc_sdmod { unsigned short WORD; struct st_bsc_sdmod_bit BIT; @@ -3398,7 +3516,7 @@ struct st_bsc_sdsr_bit #endif }; -union un_sdsr +union un_bsc_sdsr { unsigned char BYTE; struct st_bsc_sdsr_bit BIT; @@ -3437,7 +3555,7 @@ struct st_bsc_ebmapcr_bit #endif }; -union un_ebmapcr +union un_bsc_ebmapcr { unsigned long LONG; struct st_bsc_ebmapcr_bit BIT; @@ -3454,7 +3572,7 @@ struct st_cac_cacr0_bit #endif }; -union un_cacr0 +union un_cac_cacr0 { unsigned char BYTE; struct st_cac_cacr0_bit BIT; @@ -3475,7 +3593,7 @@ struct st_cac_cacr1_bit #endif }; -union un_cacr1 +union un_cac_cacr1 { unsigned char BYTE; struct st_cac_cacr1_bit BIT; @@ -3496,7 +3614,7 @@ struct st_cac_cacr2_bit #endif }; -union un_cacr2 +union un_cac_cacr2 { unsigned char BYTE; struct st_cac_cacr2_bit BIT; @@ -3525,7 +3643,7 @@ struct st_cac_caicr_bit #endif }; -union un_caicr +union un_cac_caicr { unsigned char BYTE; struct st_cac_caicr_bit BIT; @@ -3546,7 +3664,7 @@ struct st_cac_castr_bit #endif }; -union un_castr +union un_cac_castr { unsigned char BYTE; struct st_cac_castr_bit BIT; @@ -3565,7 +3683,7 @@ struct st_cmt_cmstr0_bit #endif }; -union un_cmstr0 +union un_cmt_cmstr0 { unsigned short WORD; struct st_cmt_cmstr0_bit BIT; @@ -3584,7 +3702,7 @@ struct st_cmt_cmstr1_bit #endif }; -union un_cmstr1 +union un_cmt_cmstr1 { unsigned short WORD; struct st_cmt_cmstr1_bit BIT; @@ -3605,7 +3723,7 @@ struct st_cmt0_cmcr_bit #endif }; -union un_cmcr +union un_cmt0_cmcr { unsigned short WORD; struct st_cmt0_cmcr_bit BIT; @@ -3721,7 +3839,7 @@ struct st_icu_ier_bit #endif }; -union un_ier32 +union un_icu_ier32 { unsigned char BYTE; struct st_icu_ier_bit BIT; @@ -3740,7 +3858,7 @@ struct st_icu_irqcr_bit #endif }; -union un_irqcr16 +union un_icu_irqcr16 { unsigned char BYTE; struct st_icu_irqcr_bit BIT; @@ -3757,7 +3875,7 @@ struct st_icu_swintr_bit #endif }; -union un_swintr +union un_icu_swintr { unsigned char BYTE; struct st_icu_swintr_bit BIT; @@ -3774,7 +3892,7 @@ struct st_icu_swint2r_bit #endif }; -union un_swint2r +union un_icu_swint2r { unsigned char BYTE; struct st_icu_swint2r_bit BIT; @@ -3851,7 +3969,7 @@ struct st_icu_grpbl0_bit #endif }; -union un_grpbl0 +union un_icu_grpbl0 { unsigned long LONG; struct st_icu_grpbl0_bit BIT; @@ -3928,7 +4046,7 @@ struct st_icu_genbl0_bit #endif }; -union un_genbl0 +union un_icu_genbl0 { unsigned long LONG; struct st_icu_genbl0_bit BIT; @@ -4018,7 +4136,7 @@ struct st_icu_grpbl1_bit #endif }; -union un_grpbl1 +union un_icu_grpbl1 { unsigned long LONG; struct st_icu_grpbl1_bit BIT; @@ -4095,7 +4213,7 @@ struct st_icu_genbl1_bit #endif }; -union un_genbl1 +union un_icu_genbl1 { unsigned long LONG; struct st_icu_genbl1_bit BIT; @@ -4172,7 +4290,7 @@ struct st_icu_grpal0_bit #endif }; -union un_grpal0 +union un_icu_grpal0 { unsigned long LONG; struct st_icu_grpal0_bit BIT; @@ -4249,7 +4367,7 @@ struct st_icu_genal0_bit #endif }; -union un_genal0 +union un_icu_genal0 { unsigned long LONG; struct st_icu_genal0_bit BIT; @@ -4326,7 +4444,7 @@ struct st_icu_grpal1_bit #endif }; -union un_grpal1 +union un_icu_grpal1 { unsigned long LONG; struct st_icu_grpal1_bit BIT; @@ -4403,13 +4521,13 @@ struct st_icu_genal1_bit #endif }; -union un_genal1 +union un_icu_genal1 { unsigned long LONG; struct st_icu_genal1_bit BIT; }; -union un_pwpr +union un_mpc_pwpr { unsigned char BYTE; struct st_mpc_pwpr_bit BIT; @@ -4508,7 +4626,7 @@ struct st_icu_irqflte0_bit #endif }; -union un_irqflte0 +union un_icu_irqflte0 { unsigned char BYTE; struct st_icu_irqflte0_bit BIT; @@ -4537,7 +4655,7 @@ struct st_icu_irqflte1_bit #endif }; -union un_irqflte1 +union un_icu_irqflte1 { unsigned char BYTE; struct st_icu_irqflte1_bit BIT; @@ -7060,7 +7178,7 @@ union un_rtc_rmincnt { unsigned char BYTE; struct st_rtc_rmincnt_bit BIT; -} ; +}; struct st_rtc_bcnt1_bit { @@ -8157,7 +8275,7 @@ struct st_mpc_p00pfs_bit #endif }; -union un_p00pfs +union un_mpc_p00pfs { unsigned char BYTE; struct st_mpc_p00pfs_bit BIT; @@ -8176,7 +8294,7 @@ struct st_mpc_p01pfs_bit #endif }; -union un_p01pfs +union un_mpc_p01pfs { unsigned char BYTE; struct st_mpc_p01pfs_bit BIT; @@ -10424,7 +10542,7 @@ union un_mpc_pj5pfs struct st_mpc_pj5pfs_bit BIT; }; -union un_mdmonr +union un_system_mdmonr { unsigned short WORD; struct st_system_mdmonr_bit BIT; @@ -10445,7 +10563,7 @@ struct st_system_syscr0_bit #endif }; -union un_syscr0 +union un_system_syscr0 { unsigned short WORD; struct st_system_syscr0_bit BIT; @@ -10466,7 +10584,7 @@ struct st_system_syscr1_bit #endif }; -union un_syscr1 +union un_system_syscr1 { unsigned short WORD; struct st_system_syscr1_bit BIT; @@ -10485,7 +10603,7 @@ struct st_system_sbycr_bit #endif }; -union un_sbycr +union un_system_sbycr { unsigned short WORD; struct st_system_sbycr_bit BIT; @@ -10548,7 +10666,7 @@ struct st_system_mstpcra_bit #endif }; -union un_mstpcra +union un_system_mstpcra { unsigned long LONG; struct st_system_mstpcra_bit BIT; @@ -10615,7 +10733,7 @@ struct st_system_mstpcrb_bit #endif }; -union un_mstpcrb +union un_system_mstpcrb { unsigned long LONG; struct st_system_mstpcrb_bit BIT; @@ -10666,7 +10784,7 @@ struct st_system_mstpcrc_bit #endif }; -union un_mstpcrc +union un_system_mstpcrc { unsigned long LONG; struct st_system_mstpcrc_bit BIT; @@ -10713,7 +10831,7 @@ struct st_system_mstpcrd_bit #endif }; -union un_mstpcrd +union un_system_mstpcrd { unsigned long LONG; struct st_system_mstpcrd_bit BIT; @@ -10746,7 +10864,7 @@ struct st_system_sckcr_bit #endif }; -union un_sckcr +union un_system_sckcr { unsigned long LONG; struct st_system_sckcr_bit BIT; @@ -10765,7 +10883,7 @@ struct st_system_sckcr2_bit #endif }; -union un_sckcr2 +union un_system_sckcr2 { unsigned short WORD; struct st_system_sckcr2_bit BIT; @@ -10784,7 +10902,7 @@ struct st_system_sckcr3_bit #endif }; -union un_sckcr3 +union un_system_sckcr3 { unsigned short WORD; struct st_system_sckcr3_bit BIT; @@ -10809,7 +10927,7 @@ struct st_system_pllcr_bit #endif }; -union un_pllcr +union un_system_pllcr { unsigned short WORD; struct st_system_pllcr_bit BIT; @@ -10826,7 +10944,7 @@ struct st_system_pllcr2_bit #endif }; -union un_pllcr2 +union un_system_pllcr2 { unsigned char BYTE; struct st_system_pllcr2_bit BIT; @@ -10843,7 +10961,7 @@ struct st_system_bckcr_bit #endif }; -union un_bckcr +union un_system_bckcr { unsigned char BYTE; struct st_system_bckcr_bit BIT; @@ -10860,7 +10978,7 @@ struct st_system_mosccr_bit #endif }; -union un_mosccr +union un_system_mosccr { unsigned char BYTE; struct st_system_mosccr_bit BIT; @@ -10877,7 +10995,7 @@ struct st_system_sosccr_bit #endif }; -union un_sosccr +union un_system_sosccr { unsigned char BYTE; struct st_system_sosccr_bit BIT; @@ -10894,7 +11012,7 @@ struct st_system_lococcr_bit #endif }; -union un_lococr +union un_system_lococr { unsigned char BYTE; struct st_system_lococcr_bit BIT; @@ -10911,7 +11029,7 @@ struct st_system_ilococr_bit #endif }; -union un_ilococr +union un_system_ilococr { unsigned char BYTE; struct st_system_ilococr_bit BIT; @@ -10928,7 +11046,7 @@ struct st_system_hococr_bit #endif }; -union un_hococr +union un_system_hococr { unsigned char BYTE; struct st_system_hococr_bit BIT; @@ -10945,7 +11063,7 @@ struct st_system_hococr2_bit #endif }; -union un_hococr2 +union un_system_hococr2 { unsigned char BYTE; struct st_system_hococr2_bit BIT; @@ -10970,7 +11088,7 @@ struct st_system_oscovfsr_bit #endif }; -union un_oscovfsr +union un_system_oscovfsr { unsigned char BYTE; struct st_system_oscovfsr_bit BIT; @@ -10989,7 +11107,7 @@ struct st_system_ostdcr_bit #endif }; -union un_ostdcr +union un_system_ostdcr { unsigned char BYTE; struct st_system_ostdcr_bit BIT; @@ -11006,7 +11124,7 @@ struct st_system_ostdsr_bit #endif }; -union un_ostdsr +union un_system_ostdsr { unsigned char BYTE; struct st_system_ostdsr_bit BIT; @@ -11040,13 +11158,13 @@ struct st_system_rstckcr_bit #endif }; -union un_rstckcr +union un_system_rstckcr { unsigned char BYTE; struct st_system_rstckcr_bit BIT; }; -union un_opccr +union un_system_opccr { unsigned char BYTE; struct st_system_opccr_bit BIT; @@ -11061,7 +11179,7 @@ struct st_system_moscwtcr_bit #endif }; -union un_moscwtcr +union un_system_moscwtcr { unsigned char BYTE; struct st_system_moscwtcr_bit BIT; @@ -11076,7 +11194,7 @@ struct st_system_soscwtcr_bit #endif }; -union un_soscwtcr +union un_system_soscwtcr { unsigned char BYTE; struct st_system_soscwtcr_bit BIT; @@ -11097,7 +11215,7 @@ struct st_system_rstsr2_bit #endif }; -union un_rstsr2 +union un_system_rstsr2 { unsigned char BYTE; struct st_system_rstsr2_bit BIT; @@ -11116,7 +11234,7 @@ struct st_system_lvd1cr1_bit #endif }; -union un_lvd1cr1 +union un_system_lvd1cr1 { unsigned char BYTE; struct st_system_lvd1cr1_bit BIT; @@ -11135,7 +11253,7 @@ struct st_system_lvd1sr_bit #endif }; -union un_lvd1sr +union un_system_lvd1sr { unsigned char BYTE; struct st_system_lvd1sr_bit BIT; @@ -11154,7 +11272,7 @@ struct st_system_lvd2cr1_bit #endif }; -union un_lvd2cr1 +union un_system_lvd2cr1 { unsigned char BYTE; struct st_system_lvd2cr1_bit BIT; @@ -11173,7 +11291,7 @@ struct st_system_lvd2sr_bit #endif }; -union un_lvd2sr +union un_system_lvd2sr { unsigned char BYTE; struct st_system_lvd2sr_bit BIT; @@ -11198,7 +11316,7 @@ struct st_system_prcr_bit #endif }; -union un_prcr +union un_system_prcr { unsigned short WORD; struct st_system_prcr_bit BIT; @@ -11215,7 +11333,7 @@ struct st_system_romwt_bit #endif }; -union un_romwt +union un_system_romwt { unsigned char BYTE; struct st_system_romwt_bit BIT; @@ -11236,7 +11354,7 @@ struct st_system_dpsbycr_bit #endif }; -union un_dpsbycr +union un_system_dpsbycr { unsigned char BYTE; struct st_system_dpsbycr_bit BIT; @@ -11265,7 +11383,7 @@ struct st_system_dpsier0_bit #endif }; -union un_dpsier0 +union un_system_dpsier0 { unsigned char BYTE; struct st_system_dpsier0_bit BIT; @@ -11294,7 +11412,7 @@ struct st_system_dpsier1_bit #endif }; -union un_dpsier1 +union un_system_dpsier1 { unsigned char BYTE; struct st_system_dpsier1_bit BIT; @@ -11323,7 +11441,7 @@ struct st_system_dpsier2_bit #endif }; -union un_dpsier2 +union un_system_dpsier2 { unsigned char BYTE; struct st_system_dpsier2_bit BIT; @@ -11340,7 +11458,7 @@ struct st_system_dpsier3_bit #endif }; -union un_dpsier3 +union un_system_dpsier3 { unsigned char BYTE; struct st_system_dpsier3_bit BIT; @@ -11369,7 +11487,7 @@ struct st_system_dpsifr0_bit #endif }; -union un_dpsifr0 +union un_system_dpsifr0 { unsigned char BYTE; struct st_system_dpsifr0_bit BIT; @@ -11398,7 +11516,7 @@ struct st_system_dpsifr1_bit #endif }; -union un_dpsifr1 +union un_system_dpsifr1 { unsigned char BYTE; struct st_system_dpsifr1_bit BIT; @@ -11427,7 +11545,7 @@ struct st_system_dpsifr2_bit #endif }; -union un_dpsifr2 +union un_system_dpsifr2 { unsigned char BYTE; struct st_system_dpsifr2_bit BIT; @@ -11444,7 +11562,7 @@ struct st_system_dpsifr3_bit #endif }; -union un_dpsifr3 +union un_system_dpsifr3 { unsigned char BYTE; struct st_system_dpsifr3_bit BIT; @@ -11473,7 +11591,7 @@ struct st_system_dpsiegr0_bit #endif }; -union un_dpsiegr0 +union un_system_dpsiegr0 { unsigned char BYTE; struct st_system_dpsiegr0_bit BIT; @@ -11502,7 +11620,7 @@ struct st_system_dpsiegr1_bit #endif }; -union un_dpsiegr1 +union un_system_dpsiegr1 { unsigned char BYTE; struct st_system_dpsiegr1_bit BIT; @@ -11529,7 +11647,7 @@ struct st_system_dpsiegr2_bit #endif }; -union un_dpsiegr2 +union un_system_dpsiegr2 { unsigned char BYTE; struct st_system_dpsiegr2_bit BIT; @@ -11546,7 +11664,7 @@ struct st_system_dpsiegr3_bit #endif }; -union un_dpsiegr3 +union un_system_dpsiegr3 { unsigned char BYTE; struct st_system_dpsiegr3_bit BIT; @@ -11571,7 +11689,7 @@ struct st_system_rstsr0_bit #endif }; -union un_rstsr0 +union un_system_rstsr0 { unsigned char BYTE; struct st_system_rstsr0_bit BIT; @@ -11588,7 +11706,7 @@ struct st_system_rstr1_bit #endif }; -union un_rstsr1 +union un_system_rstsr1 { unsigned char BYTE; struct st_system_rstr1_bit BIT; @@ -11611,7 +11729,7 @@ struct st_system_mofcr_bit #endif }; -union un_mofcr +union un_system_mofcr { unsigned char BYTE; struct st_system_mofcr_bit BIT; @@ -11628,7 +11746,7 @@ struct st_system_hocopcr_bit #endif }; -union un_hocopcr +union un_system_hocopcr { unsigned char BYTE; struct st_system_hocopcr_bit BIT; @@ -11649,7 +11767,7 @@ struct st_system_lvcmpcr_bit #endif }; -union un_lvcmpcr +union un_system_lvcmpcr { unsigned char BYTE; struct st_system_lvcmpcr_bit BIT; @@ -11666,7 +11784,7 @@ struct st_system_lvdlvlr_bit #endif }; -union un_lvdlvlr +union un_system_lvdlvlr { unsigned char BYTE; struct st_system_lvdlvlr_bit BIT; @@ -11693,7 +11811,7 @@ struct st_system_lvd1cr0_bit #endif }; -union un_lvd1cr0 +union un_system_lvd1cr0 { unsigned char BYTE; struct st_system_lvd1cr0_bit BIT; @@ -11720,7 +11838,7 @@ struct st_system_lvd2cr0_bit #endif }; -union un_lvd2cr0 +union un_system_lvd2cr0 { unsigned char BYTE; struct st_system_lvd2cr0_bit BIT; @@ -11739,7 +11857,7 @@ struct st_rtc_rcr3_bit #endif }; -union un_rcr3 +union un_rtc_rcr3 { unsigned char BYTE; struct st_rtc_rcr3_bit BIT; @@ -11768,7 +11886,7 @@ struct st_port0_pdr_bit #endif }; -union un_pdr +union un_port0_pdr { unsigned char BYTE; struct st_port0_pdr_bit BIT; @@ -11797,7 +11915,7 @@ struct st_port0_podr_bit #endif }; -union un_podr +union un_port0_podr { unsigned char BYTE; struct st_port0_podr_bit BIT; @@ -11826,7 +11944,7 @@ struct st_port0_pidr_bit #endif }; -union un_pidr +union un_port0_pidr { unsigned char BYTE; struct st_port0_pidr_bit BIT; @@ -11855,7 +11973,7 @@ struct st_port0_pmr_bit #endif }; -union un_pmr +union un_port0_pmr { unsigned char BYTE; struct st_port0_pmr_bit BIT; @@ -11884,7 +12002,7 @@ struct st_port0_odr0_bit #endif }; -union un_odr0 +union un_port0_odr0 { unsigned char BYTE; struct st_port0_odr0_bit BIT; @@ -11907,7 +12025,7 @@ struct st_port0_odr1_bit #endif }; -union un_odr1 +union un_port0_odr1 { unsigned char BYTE; struct st_port0_odr1_bit BIT; @@ -11936,7 +12054,7 @@ struct st_port0_pcr_bit #endif }; -union un_pcr +union un_port0_pcr { unsigned char BYTE; struct st_port0_pcr_bit BIT; @@ -11957,7 +12075,7 @@ struct st_port0_dscr_bit #endif }; -union un_dscr +union un_port0_dscr { unsigned char BYTE; struct st_port0_dscr_bit BIT; @@ -11978,7 +12096,7 @@ struct st_port0_dscr2_bit #endif }; -union un_dscr2 +union un_port0_dscr2 { unsigned char BYTE; struct st_port0_dscr2_bit BIT; @@ -12702,6 +12820,225 @@ union un_port3_dscr2 struct st_port3_dscr2_bit BIT; }; +struct st_port4_pdr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char B0 : 1; + unsigned char B1 : 1; + unsigned char B2 : 1; + unsigned char B3 : 1; + unsigned char B4 : 1; + unsigned char B5 : 1; + unsigned char B6 : 1; + unsigned char B7 : 1; +#else + unsigned char B7 : 1; + unsigned char B6 : 1; + unsigned char B5 : 1; + unsigned char B4 : 1; + unsigned char B3 : 1; + unsigned char B2 : 1; + unsigned char B1 : 1; + unsigned char B0 : 1; +#endif +}; + +union un_port4_pdr +{ + unsigned char BYTE; + struct st_port4_pdr_bit BIT; +}; + +struct st_port4_podr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char B0 : 1; + unsigned char B1 : 1; + unsigned char B2 : 1; + unsigned char B3 : 1; + unsigned char B4 : 1; + unsigned char B5 : 1; + unsigned char B6 : 1; + unsigned char B7 : 1; +#else + unsigned char B7 : 1; + unsigned char B6 : 1; + unsigned char B5 : 1; + unsigned char B4 : 1; + unsigned char B3 : 1; + unsigned char B2 : 1; + unsigned char B1 : 1; + unsigned char B0 : 1; +#endif +}; + +union un_port4_podr +{ + unsigned char BYTE; + struct st_port4_podr_bit BIT; +}; + +struct st_port4_pidr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char B0 : 1; + unsigned char B1 : 1; + unsigned char B2 : 1; + unsigned char B3 : 1; + unsigned char B4 : 1; + unsigned char B5 : 1; + unsigned char B6 : 1; + unsigned char B7 : 1; +#else + unsigned char B7 : 1; + unsigned char B6 : 1; + unsigned char B5 : 1; + unsigned char B4 : 1; + unsigned char B3 : 1; + unsigned char B2 : 1; + unsigned char B1 : 1; + unsigned char B0 : 1; +#endif +}; + +union un_port4_pidr +{ + unsigned char BYTE; + struct st_port4_pidr_bit BIT; +}; + +struct st_port4_pmr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char B0 : 1; + unsigned char B1 : 1; + unsigned char B2 : 1; + unsigned char B3 : 1; + unsigned char B4 : 1; + unsigned char B5 : 1; + unsigned char B6 : 1; + unsigned char B7 : 1; +#else + unsigned char B7 : 1; + unsigned char B6 : 1; + unsigned char B5 : 1; + unsigned char B4 : 1; + unsigned char B3 : 1; + unsigned char B2 : 1; + unsigned char B1 : 1; + unsigned char B0 : 1; +#endif +}; + +union un_port4_pmr +{ + unsigned char BYTE; + struct st_port4_pmr_bit BIT; +}; + +struct st_port4_odr0_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char B0 : 1; + unsigned char : 1; + unsigned char B2 : 1; + unsigned char : 1; + unsigned char B4 : 1; + unsigned char : 1; + unsigned char B6 : 1; + unsigned char : 1; +#else + unsigned char : 1; + unsigned char B6 : 1; + unsigned char : 1; + unsigned char B4 : 1; + unsigned char : 1; + unsigned char B2 : 1; + unsigned char : 1; + unsigned char B0 : 1; +#endif +}; + +union un_port4_odr0 +{ + unsigned char BYTE; + struct st_port4_odr0_bit BIT; +}; + +struct st_port4_odr1_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char B0 : 1; + unsigned char : 1; + unsigned char B2 : 1; + unsigned char : 1; + unsigned char B4 : 1; + unsigned char : 1; + unsigned char B6 : 1; + unsigned char : 1; +#else + unsigned char : 1; + unsigned char B6 : 1; + unsigned char : 1; + unsigned char B4 : 1; + unsigned char : 1; + unsigned char B2 : 1; + unsigned char : 1; + unsigned char B0 : 1; +#endif +}; + +union un_port4_odr1 +{ + unsigned char BYTE; + struct st_port4_odr1_bit BIT; +}; + +struct st_port4_pcr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char B0 : 1; + unsigned char B1 : 1; + unsigned char B2 : 1; + unsigned char B3 : 1; + unsigned char B4 : 1; + unsigned char B5 : 1; + unsigned char B6 : 1; + unsigned char B7 : 1; +#else + unsigned char B7 : 1; + unsigned char B6 : 1; + unsigned char B5 : 1; + unsigned char B4 : 1; + unsigned char B3 : 1; + unsigned char B2 : 1; + unsigned char B1 : 1; + unsigned char B0 : 1; +#endif +}; + +union un_port4_pcr +{ + unsigned char BYTE; + struct st_port4_pcr_bit BIT; +}; + +typedef struct st_port4 +{ + union un_port4_pdr PDR; + char wk0[31]; + union un_port4_podr PODR; + char wk1[31]; + union un_port4_pidr PIDR; + char wk2[31]; + union un_port4_pmr PMR; + char wk3[35]; + union un_port4_odr0 ORD0; + union un_port4_odr1 ORD1; + char wk4[58]; + union un_port4_pcr PCR; +} st_port4_t; + struct st_port5_pdr_bit { #ifdef __RX_LITTLE_ENDIAN__ @@ -16886,129 +17223,18189 @@ union un_sci12_tmr struct st_sci12_tmr_bit BIT; }; +struct st_temps_tscr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char : 4; + unsigned char TSOE : 1; + unsigned char : 2; + unsigned char TSEN : 1; +#else + unsigned char TSEN : 1; + unsigned char : 2; + unsigned char TSOE : 1; + unsigned char : 4; +#endif +}; + +union un_temps_tscr +{ + unsigned char BYTE; + struct st_temps_tscr_bit BIT; +}; + +struct st_tmr0_tcr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char : 3; + unsigned char CCLR : 2; + unsigned char OVIE : 1; + unsigned char CMIEA : 1; + unsigned char CMIEB : 1; +#else + unsigned char CMIEB : 1; + unsigned char CMIEA : 1; + unsigned char OVIE : 1; + unsigned char CCLR : 2; + unsigned char : 3; +#endif +}; + +union un_tmr0_tcr +{ + unsigned char BYTE; + struct st_tmr0_tcr_bit BIT; +}; + +struct st_tmr0_tcsr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char OSA : 2; + unsigned char OSB : 2; + unsigned char ADTE : 1; + unsigned char : 3; +#else + unsigned char : 3; + unsigned char ADTE : 1; + unsigned char OSB : 2; + unsigned char OSA : 2; +#endif +}; + +union un_tmr0_tcsr +{ + unsigned char BYTE; + struct st_tmr0_tcsr_bit BIT; +}; + +struct st_tmr0_tccr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char CKS : 3; + unsigned char CSS : 2; + unsigned char : 2; + unsigned char TMRIS : 1; +#else + unsigned char TMRIS : 1; + unsigned char : 2; + unsigned char CSS : 2; + unsigned char CKS : 3; +#endif +}; + +union un_tmr0_tccr +{ + unsigned char BYTE; + struct st_tmr0_tccr_bit BIT; +}; + +struct st_tmr0_tcstr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char TCS : 1; + unsigned char : 7; +#else + unsigned char : 7; + unsigned char TCS : 1; +#endif +}; + +union un_tmr0_tcstr +{ + unsigned char BYTE; + struct st_tmr0_tcstr_bit BIT; +}; + +struct st_tmr1_tcr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char : 3; + unsigned char CCLR : 2; + unsigned char OVIE : 1; + unsigned char CMIEA : 1; + unsigned char CMIEB : 1; +#else + unsigned char CMIEB : 1; + unsigned char CMIEA : 1; + unsigned char OVIE : 1; + unsigned char CCLR : 2; + unsigned char : 3; +#endif +}; + +union un_tmr1_tcr +{ + unsigned char BYTE; + struct st_tmr1_tcr_bit BIT; +}; + +struct st_tmr1_tcsr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char OSA : 2; + unsigned char OSB : 2; + unsigned char : 4; +#else + unsigned char : 4; + unsigned char OSB : 2; + unsigned char OSA : 2; +#endif +}; + +union un_tmr1_tcsr +{ + unsigned char BYTE; + struct st_tmr1_tcsr_bit BIT; +}; + +struct st_tmr1_tccr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char CKS : 3; + unsigned char CSS : 2; + unsigned char : 2; + unsigned char TMRIS : 1; +#else + unsigned char TMRIS : 1; + unsigned char : 2; + unsigned char CSS : 2; + unsigned char CKS : 3; +#endif +}; + +union un_tmr1_tccr +{ + unsigned char BYTE; + struct st_tmr1_tccr_bit BIT; +}; + +struct st_tmr1_tcstr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char TCS : 1; + unsigned char : 7; +#else + unsigned char : 7; + unsigned char TCS : 1; +#endif +}; + +union un_tmr1_tcstr +{ + unsigned char BYTE; + struct st_tmr1_tcstr_bit BIT; +}; + +struct st_tpu0_nfcr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char NFAEN : 1; + unsigned char NFBEN : 1; + unsigned char NFCEN : 1; + unsigned char NFDEN : 1; + unsigned char NFCS : 2; + unsigned char : 2; +#else + unsigned char : 2; + unsigned char NFCS : 2; + unsigned char NFDEN : 1; + unsigned char NFCEN : 1; + unsigned char NFBEN : 1; + unsigned char NFAEN : 1; +#endif +}; + +union un_tpu0_nfcr +{ + unsigned char BYTE; + struct st_tpu0_nfcr_bit BIT; +}; + +struct st_tpu0_tcr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char TPSC : 3; + unsigned char CKEG : 2; + unsigned char CCLR : 3; +#else + unsigned char CCLR : 3; + unsigned char CKEG : 2; + unsigned char TPSC : 3; +#endif +}; + +union un_tpu0_tcr +{ + unsigned char BYTE; + struct st_tpu0_tcr_bit BIT; +}; + +struct st_tpu0_tmdr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char MD : 4; + unsigned char BFA : 1; + unsigned char BFB : 1; + unsigned char ICSELB : 1; + unsigned char ICSELD : 1; +#else + unsigned char ICSELD : 1; + unsigned char ICSELB : 1; + unsigned char BFB : 1; + unsigned char BFA : 1; + unsigned char MD : 4; +#endif +}; + +union un_tpu0_tmdr +{ + unsigned char BYTE; + struct st_tpu0_tmdr_bit BIT; +}; + +struct st_tpu0_tiorh_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char IOA : 4; + unsigned char IOB : 4; +#else + unsigned char IOB : 4; + unsigned char IOA : 4; +#endif +}; + +union un_tpu0_tiorh +{ + unsigned char BYTE; + struct st_tpu0_tiorh_bit BIT; +}; + +struct st_tpu0_tiorl_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char IOC : 4; + unsigned char IOD : 4; +#else + unsigned char IOD : 4; + unsigned char IOC : 4; +#endif +}; + +union un_tpu0_tiorl +{ + unsigned char BYTE; + struct st_tpu0_tiorl_bit BIT; +}; + +struct st_tpu0_tier_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char TGIEA : 1; + unsigned char TGIEB : 1; + unsigned char TGIEC : 1; + unsigned char TGIED : 1; + unsigned char TCIEV : 1; + unsigned char : 2; + unsigned char TTGE : 1; +#else + unsigned char TTGE : 1; + unsigned char : 2; + unsigned char TCIEV : 1; + unsigned char TGIED : 1; + unsigned char TGIEC : 1; + unsigned char TGIEB : 1; + unsigned char TGIEA : 1; +#endif +}; + +union un_tpu0_tier +{ + unsigned char BYTE; + struct st_tpu0_tier_bit BIT; +}; + +struct un_tpu0_tsr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char TGFA : 1; + unsigned char TGFB : 1; + unsigned char TGFC : 1; + unsigned char TGFD : 1; + unsigned char TCFV : 1; + unsigned char : 3; +#else + unsigned char : 3; + unsigned char TCFV : 1; + unsigned char TGFD : 1; + unsigned char TGFC : 1; + unsigned char TGFB : 1; + unsigned char TGFA : 1; +#endif +}; + +union un_tpu0_tsr +{ + unsigned char BYTE; + struct un_tpu0_tsr_bit BIT; +}; + +struct st_tpu1_nfcr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char NFAEN : 1; + unsigned char NFBEN : 1; + unsigned char : 2; + unsigned char NFCS : 2; + unsigned char : 2; +#else + unsigned char : 2; + unsigned char NFCS : 2; + unsigned char : 2; + unsigned char NFBEN : 1; + unsigned char NFAEN : 1; +#endif +}; + +union un_tpu1_nfcr +{ + unsigned char BYTE; + struct st_tpu1_nfcr_bit BIT; +}; + +struct st_tpu1_tcr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char TPSC : 3; + unsigned char CKEG : 2; + unsigned char CCLR : 2; + unsigned char : 1; +#else + unsigned char : 1; + unsigned char CCLR : 2; + unsigned char CKEG : 2; + unsigned char TPSC : 3; +#endif +}; + +union un_tpu1_tcr +{ + unsigned char BYTE; + struct st_tpu1_tcr_bit BIT; +}; + +struct st_tpu1_tmdr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char MD : 4; + unsigned char : 2; + unsigned char ICSELB : 1; + unsigned char : 1; +#else + unsigned char : 1; + unsigned char ICSELB : 1; + unsigned char : 2; + unsigned char MD : 4; +#endif +}; + +union un_tpu1_tmdr +{ + unsigned char BYTE; + struct st_tpu1_tmdr_bit BIT; +}; + +struct st_tpu1_tior_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char IOA : 4; + unsigned char IOB : 4; +#else + unsigned char IOB : 4; + unsigned char IOA : 4; +#endif +}; + +union un_tpu1_tior +{ + unsigned char BYTE; + struct st_tpu1_tior_bit BIT; +}; + +struct st_tpu1_tier_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char TGIEA : 1; + unsigned char TGIEB : 1; + unsigned char : 2; + unsigned char TCIEV : 1; + unsigned char TCIEU : 1; + unsigned char : 1; + unsigned char TTGE : 1; +#else + unsigned char TTGE : 1; + unsigned char : 1; + unsigned char TCIEU : 1; + unsigned char TCIEV : 1; + unsigned char : 2; + unsigned char TGIEB : 1; + unsigned char TGIEA : 1; +#endif +}; + +union un_tpu1_tier +{ + unsigned char BYTE; + struct st_tpu1_tier_bit BIT; +}; + +struct st_tpu1_tsr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char TGFA : 1; + unsigned char TGFB : 1; + unsigned char : 2; + unsigned char TCFV : 1; + unsigned char TCFU : 1; + unsigned char : 1; + unsigned char TCFD : 1; +#else + unsigned char TCFD : 1; + unsigned char : 1; + unsigned char TCFU : 1; + unsigned char TCFV : 1; + unsigned char : 2; + unsigned char TGFB : 1; + unsigned char TGFA : 1; +#endif +}; + +union un_tpu1_tsr +{ + unsigned char BYTE; + struct st_tpu1_tsr_bit BIT; +}; + +struct st_tpu2_nfcr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char NFAEN : 1; + unsigned char NFBEN : 1; + unsigned char : 2; + unsigned char NFCS : 2; + unsigned char : 2; +#else + unsigned char : 2; + unsigned char NFCS : 2; + unsigned char : 2; + unsigned char NFBEN : 1; + unsigned char NFAEN : 1; +#endif +}; + +union un_tpu2_nfcr +{ + unsigned char BYTE; + struct st_tpu2_nfcr_bit BIT; +}; + +struct st_tpu2_tcr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char TPSC : 3; + unsigned char CKEG : 2; + unsigned char CCLR : 2; + unsigned char : 1; +#else + unsigned char : 1; + unsigned char CCLR : 2; + unsigned char CKEG : 2; + unsigned char TPSC : 3; +#endif +}; + +union un_tpu2_tcr +{ + unsigned char BYTE; + struct st_tpu2_tcr_bit BIT; +}; + +struct st_tpu2_tmdr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char MD : 4; + unsigned char : 2; + unsigned char ICSELB : 1; + unsigned char : 1; +#else + unsigned char : 1; + unsigned char ICSELB : 1; + unsigned char : 2; + unsigned char MD : 4; +#endif +}; + +union un_tpu2_tmdr +{ + unsigned char BYTE; + struct st_tpu2_tmdr_bit BIT; +}; + +struct st_tpu2_tior_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char IOA : 4; + unsigned char IOB : 4; +#else + unsigned char IOB : 4; + unsigned char IOA : 4; +#endif +}; + +union un_tpu2_tior +{ + unsigned char BYTE; + struct st_tpu2_tior_bit BIT; +}; + +struct st_tpu2_tier_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char TGIEA : 1; + unsigned char TGIEB : 1; + unsigned char : 2; + unsigned char TCIEV : 1; + unsigned char TCIEU : 1; + unsigned char : 1; + unsigned char TTGE : 1; +#else + unsigned char TTGE : 1; + unsigned char : 1; + unsigned char TCIEU : 1; + unsigned char TCIEV : 1; + unsigned char : 2; + unsigned char TGIEB : 1; + unsigned char TGIEA : 1; +#endif +}; + +union un_tpu2_tier +{ + unsigned char BYTE; + struct st_tpu2_tier_bit BIT; +}; + +struct st_tpu2_tsr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char TGFA : 1; + unsigned char TGFB : 1; + unsigned char : 2; + unsigned char TCFV : 1; + unsigned char TCFU : 1; + unsigned char : 1; + unsigned char TCFD : 1; +#else + unsigned char TCFD : 1; + unsigned char : 1; + unsigned char TCFU : 1; + unsigned char TCFV : 1; + unsigned char : 2; + unsigned char TGFB : 1; + unsigned char TGFA : 1; +#endif +}; + +union un_tpu2_tsr +{ + unsigned char BYTE; + struct st_tpu2_tsr_bit BIT; +}; + +struct st_tpu3_nfcr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char NFAEN : 1; + unsigned char NFBEN : 1; + unsigned char NFCEN : 1; + unsigned char NFDEN : 1; + unsigned char NFCS : 2; + unsigned char : 2; +#else + unsigned char : 2; + unsigned char NFCS : 2; + unsigned char NFDEN : 1; + unsigned char NFCEN : 1; + unsigned char NFBEN : 1; + unsigned char NFAEN : 1; +#endif +}; + +union un_tpu3_nfcr +{ + unsigned char BYTE; + struct st_tpu3_nfcr_bit BIT; +}; + +struct st_tpu3_tcr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char TPSC : 3; + unsigned char CKEG : 2; + unsigned char CCLR : 3; +#else + unsigned char CCLR : 3; + unsigned char CKEG : 2; + unsigned char TPSC : 3; +#endif +}; + +union un_tpu3_tcr +{ + unsigned char BYTE; + struct st_tpu3_tcr_bit BIT; +}; + +struct st_tpu3_tmdr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char MD : 4; + unsigned char BFA : 1; + unsigned char BFB : 1; + unsigned char ICSELB : 1; + unsigned char ICSELD : 1; +#else + unsigned char ICSELD : 1; + unsigned char ICSELB : 1; + unsigned char BFB : 1; + unsigned char BFA : 1; + unsigned char MD : 4; +#endif +}; + +union un_tpu3_tmdr +{ + unsigned char BYTE; + struct st_tpu3_tmdr_bit BIT; +}; + +struct st_tpu3_tiorh_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char IOA : 4; + unsigned char IOB : 4; +#else + unsigned char IOB : 4; + unsigned char IOA : 4; +#endif +}; + +union un_tpu3_tiorh +{ + unsigned char BYTE; + struct st_tpu3_tiorh_bit BIT; +}; + +struct st_tpu3_tiorl_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char IOC : 4; + unsigned char IOD : 4; +#else + unsigned char IOD : 4; + unsigned char IOC : 4; +#endif +}; + +union un_tpu3_tiorl +{ + unsigned char BYTE; + struct st_tpu3_tiorl_bit BIT; +}; + +struct st_tpu3_tier_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char TGIEA : 1; + unsigned char TGIEB : 1; + unsigned char TGIEC : 1; + unsigned char TGIED : 1; + unsigned char TCIEV : 1; + unsigned char : 2; + unsigned char TTGE : 1; +#else + unsigned char TTGE : 1; + unsigned char : 2; + unsigned char TCIEV : 1; + unsigned char TGIED : 1; + unsigned char TGIEC : 1; + unsigned char TGIEB : 1; + unsigned char TGIEA : 1; +#endif +}; + +union un_tpu3_tier +{ + unsigned char BYTE; + struct st_tpu3_tier_bit BIT; +}; + +struct st_tpu3_tsr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char TGFA : 1; + unsigned char TGFB : 1; + unsigned char TGFC : 1; + unsigned char TGFD : 1; + unsigned char TCFV : 1; + unsigned char : 3; +#else + unsigned char : 3; + unsigned char TCFV : 1; + unsigned char TGFD : 1; + unsigned char TGFC : 1; + unsigned char TGFB : 1; + unsigned char TGFA : 1; +#endif +}; + +union un_tpu3_tsr +{ + unsigned char BYTE; + struct st_tpu3_tsr_bit BIT; +}; + +struct st_tpu4_nfcr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char NFAEN : 1; + unsigned char NFBEN : 1; + unsigned char : 2; + unsigned char NFCS : 2; + unsigned char : 2; +#else + unsigned char : 2; + unsigned char NFCS : 2; + unsigned char : 2; + unsigned char NFBEN : 1; + unsigned char NFAEN : 1; +#endif +}; + +union un_tpu4_nfcr +{ + unsigned char BYTE; + struct st_tpu4_nfcr_bit BIT; +}; + +struct st_tpu4_tcr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char TPSC : 3; + unsigned char CKEG : 2; + unsigned char CCLR : 2; + unsigned char : 1; +#else + unsigned char : 1; + unsigned char CCLR : 2; + unsigned char CKEG : 2; + unsigned char TPSC : 3; +#endif +}; + +union un_tpu4_tcr +{ + unsigned char BYTE; + struct st_tpu4_tcr_bit BIT; +}; + +struct st_tpu4_tmdr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char MD : 4; + unsigned char : 2; + unsigned char ICSELB : 1; + unsigned char : 1; +#else + unsigned char : 1; + unsigned char ICSELB : 1; + unsigned char : 2; + unsigned char MD : 4; +#endif +}; + +union un_tpu4_tmdr +{ + unsigned char BYTE; + struct st_tpu4_tmdr_bit BIT; +}; + +struct un_tpu4_tior_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char IOA : 4; + unsigned char IOB : 4; +#else + unsigned char IOB : 4; + unsigned char IOA : 4; +#endif +}; + +union un_tpu4_tior +{ + unsigned char BYTE; + struct un_tpu4_tior_bit BIT; +}; + +struct st_tpu4_tier_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char TGIEA : 1; + unsigned char TGIEB : 1; + unsigned char : 2; + unsigned char TCIEV : 1; + unsigned char TCIEU : 1; + unsigned char : 1; + unsigned char TTGE : 1; +#else + unsigned char TTGE : 1; + unsigned char : 1; + unsigned char TCIEU : 1; + unsigned char TCIEV : 1; + unsigned char : 2; + unsigned char TGIEB : 1; + unsigned char TGIEA : 1; +#endif +}; + +union un_tpu4_tier +{ + unsigned char BYTE; + struct st_tpu4_tier_bit BIT; +}; + +struct st_tpu4_tsr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char TGFA : 1; + unsigned char TGFB : 1; + unsigned char : 2; + unsigned char TCFV : 1; + unsigned char TCFU : 1; + unsigned char : 1; + unsigned char TCFD : 1; +#else + unsigned char TCFD : 1; + unsigned char : 1; + unsigned char TCFU : 1; + unsigned char TCFV : 1; + unsigned char : 2; + unsigned char TGFB : 1; + unsigned char TGFA : 1; +#endif +}; + +union un_tpu4_tsr +{ + unsigned char BYTE; + struct st_tpu4_tsr_bit BIT; +}; + +struct st_tpu5_nfcr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char NFAEN : 1; + unsigned char NFBEN : 1; + unsigned char : 2; + unsigned char NFCS : 2; + unsigned char : 2; +#else + unsigned char : 2; + unsigned char NFCS : 2; + unsigned char : 2; + unsigned char NFBEN : 1; + unsigned char NFAEN : 1; +#endif +}; + +union un_tpu5_nfcr +{ + unsigned char BYTE; + struct st_tpu5_nfcr_bit BIT; +}; + +struct st_tpu5_tcr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char TPSC : 3; + unsigned char CKEG : 2; + unsigned char CCLR : 2; + unsigned char : 1; +#else + unsigned char : 1; + unsigned char CCLR : 2; + unsigned char CKEG : 2; + unsigned char TPSC : 3; +#endif +}; + +union un_tpu5_tcr +{ + unsigned char BYTE; + struct st_tpu5_tcr_bit BIT; +}; + +struct st_tpu5_tmdr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char MD : 4; + unsigned char : 2; + unsigned char ICSELB : 1; + unsigned char : 1; +#else + unsigned char : 1; + unsigned char ICSELB : 1; + unsigned char : 2; + unsigned char MD : 4; +#endif +}; + +union un_tpu5_tmdr +{ + unsigned char BYTE; + struct st_tpu5_tmdr_bit BIT; +}; + +struct st_tpu5_tior_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char IOA : 4; + unsigned char IOB : 4; +#else + unsigned char IOB : 4; + unsigned char IOA : 4; +#endif +}; + +union un_tpu5_tior +{ + unsigned char BYTE; + struct st_tpu5_tior_bit BIT; +}; + +struct st_tpu5_tier_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char TGIEA : 1; + unsigned char TGIEB : 1; + unsigned char : 2; + unsigned char TCIEV : 1; + unsigned char TCIEU : 1; + unsigned char : 2; +#else + unsigned char : 2; + unsigned char TCIEU : 1; + unsigned char TCIEV : 1; + unsigned char : 2; + unsigned char TGIEB : 1; + unsigned char TGIEA : 1; +#endif +}; + +union un_tpu5_tier +{ + unsigned char BYTE; + struct st_tpu5_tier_bit BIT; +}; + +struct st_tpu5_tsr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char TGFA : 1; + unsigned char TGFB : 1; + unsigned char : 2; + unsigned char TCFV : 1; + unsigned char TCFU : 1; + unsigned char : 1; + unsigned char TCFD : 1; +#else + unsigned char TCFD : 1; + unsigned char : 1; + unsigned char TCFU : 1; + unsigned char TCFV : 1; + unsigned char : 2; + unsigned char TGFB : 1; + unsigned char TGFA : 1; +#endif +}; + +union un_tpu5_tsr +{ + unsigned char BYTE; + struct st_tpu5_tsr_bit BIT; +}; + +struct st_tpua_tstr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char CST0 : 1; + unsigned char CST1 : 1; + unsigned char CST2 : 1; + unsigned char CST3 : 1; + unsigned char CST4 : 1; + unsigned char CST5 : 1; + unsigned char : 2; +#else + unsigned char : 2; + unsigned char CST5 : 1; + unsigned char CST4 : 1; + unsigned char CST3 : 1; + unsigned char CST2 : 1; + unsigned char CST1 : 1; + unsigned char CST0 : 1; +#endif +}; + +union un_tpua_tstr +{ + unsigned char BYTE; + struct st_tpua_tstr_bit BIT; +}; + +struct st_tpua_tsyr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char SYNC0 : 1; + unsigned char SYNC1 : 1; + unsigned char SYNC2 : 1; + unsigned char SYNC3 : 1; + unsigned char SYNC4 : 1; + unsigned char SYNC5 : 1; + unsigned char : 2; +#else + unsigned char : 2; + unsigned char SYNC5 : 1; + unsigned char SYNC4 : 1; + unsigned char SYNC3 : 1; + unsigned char SYNC2 : 1; + unsigned char SYNC1 : 1; + unsigned char SYNC0 : 1; +#endif +}; + +union un_tpua_tsyr +{ + unsigned char BYTE; + struct st_tpua_tsyr_bit BIT; +}; + +struct st_usb_dpusr0r_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long SRPC0 : 1; + unsigned long RPUE0 : 1; + unsigned long : 1; + unsigned long DRPD0 : 1; + unsigned long FIXPHY0 : 1; + unsigned long : 11; + unsigned long DP0 : 1; + unsigned long DM0 : 1; + unsigned long : 2; + unsigned long DOVCA0 : 1; + unsigned long DOVCB0 : 1; + unsigned long : 1; + unsigned long DVBSTS0 : 1; + unsigned long : 8; +#else + unsigned long : 8; + unsigned long DVBSTS0 : 1; + unsigned long : 1; + unsigned long DOVCB0 : 1; + unsigned long DOVCA0 : 1; + unsigned long : 2; + unsigned long DM0 : 1; + unsigned long DP0 : 1; + unsigned long : 11; + unsigned long FIXPHY0 : 1; + unsigned long DRPD0 : 1; + unsigned long : 1; + unsigned long RPUE0 : 1; + unsigned long SRPC0 : 1; +#endif +}; + +union un_usb_dpusr0r +{ + unsigned long LONG; + struct st_usb_dpusr0r_bit BIT; +}; + +struct st_usb_dpusr1r_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long DPINTE0 : 1; + unsigned long DMINTE0 : 1; + unsigned long : 2; + unsigned long DOVRCRAE0 : 1; + unsigned long DOVRCRBE0 : 1; + unsigned long : 1; + unsigned long DVBSE0 : 1; + unsigned long : 8; + unsigned long DPINT0 : 1; + unsigned long DMINT0 : 1; + unsigned long : 2; + unsigned long DOVRCRA0 : 1; + unsigned long DOVRCRB0 : 1; + unsigned long : 1; + unsigned long DVBINT0 : 1; + unsigned long : 8; +#else + unsigned long : 8; + unsigned long DVBINT0 : 1; + unsigned long : 1; + unsigned long DOVRCRB0 : 1; + unsigned long DOVRCRA0 : 1; + unsigned long : 2; + unsigned long DMINT0 : 1; + unsigned long DPINT0 : 1; + unsigned long : 8; + unsigned long DVBSE0 : 1; + unsigned long : 1; + unsigned long DOVRCRBE0 : 1; + unsigned long DOVRCRAE0 : 1; + unsigned long : 2; + unsigned long DMINTE0 : 1; + unsigned long DPINTE0 : 1; +#endif +}; + +union un_usb_dpusr1r +{ + unsigned long LONG; + struct st_usb_dpusr1r_bit BIT; +}; + +struct st_usb0_syscfg_bit +{ + unsigned short :5; + unsigned short SCKE:1; + unsigned short :3; + unsigned short DCFM:1; + unsigned short DRPD:1; + unsigned short DPRPU:1; + unsigned short :3; + unsigned short USBE:1; +}; + +union un_usb0_syscfg +{ + unsigned short WORD; +#ifdef IODEFINE_H_HISTORY + struct st_usb0_syscfg_bit BIT; +#endif +}; + +struct st_usb0_syssts0_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned short LNST : 2; + unsigned short IDMON : 1; + unsigned short : 2; + unsigned short SOFEA : 1; + unsigned short HTACT : 1; + unsigned short : 7; + unsigned short OVCMON : 2; +#else + unsigned short OVCMON : 2; + unsigned short : 7; + unsigned short HTACT : 1; + unsigned short SOFEA : 1; + unsigned short : 2; + unsigned short IDMON : 1; + unsigned short LNST : 2; +#endif +}; + +union un_usb0_syssts0 +{ + unsigned short WORD; + struct st_usb0_syssts0_bit BIT; +}; + +struct st_usb0_dvstctr0_bit +{ + unsigned short :4; + unsigned short HNPBTOA:1; + unsigned short EXICEN:1; + unsigned short VBUSEN:1; + unsigned short WKUP:1; + unsigned short RWUPE:1; + unsigned short USBRST:1; + unsigned short RESUME:1; + unsigned short UACT:1; + unsigned short :1; + unsigned short RHST:3; +}; + +union un_usb0_dvstctr0 +{ + unsigned short WORD; +#ifdef IODEFINE_H_HISTORY + struct st_usb0_dvstctr0_bit BIT; +#endif +}; + +struct st_usb0_cfifo_byte +{ + unsigned char L; + unsigned char H; +}; + +union un_usb0_cfifo +{ + unsigned short WORD; + struct st_usb0_cfifo_byte BYTE; +}; + +struct st_usb0_d0fifo_byte +{ + unsigned char L; + unsigned char H; +}; + +union un_usb0_d0fifo +{ + unsigned short WORD; + struct st_usb0_d0fifo_byte BYTE; +}; + +struct st_usb0_d1fifo_byte +{ + unsigned char L; + unsigned char H; +}; + +union un_usb0_d1fifo +{ + unsigned short WORD; + struct st_usb0_d1fifo_byte BYTE; +}; + +struct st_usb0_cfifosel_bit +{ + unsigned short RCNT:1; + unsigned short REW:1; + unsigned short :3; + unsigned short MBW:1; + unsigned short :1; + unsigned short BIGEND:1; + unsigned short :2; + unsigned short ISEL:1; + unsigned short :1; + unsigned short CURPIPE:4; +}; + +union un_usb0_cfifosel +{ + unsigned short WORD; +#ifdef IODEFINE_H_HISTORY + struct st_usb0_cfifosel_bit BIT; +#endif +}; + +struct st_usb0_cfifoctr_bit +{ + unsigned short BVAL:1; + unsigned short BCLR:1; + unsigned short FRDY:1; + unsigned short :4; + unsigned short DTLN:9; +}; + +union un_usb0_cfifoctr +{ + unsigned short WORD; +#ifdef IODEFINE_H_HISTORY + struct st_usb0_cfifoctr_bit BIT; +#endif +}; + +struct st_usb0_d0fifosel_bit +{ + unsigned short RCNT:1; + unsigned short REW:1; + unsigned short DCLRM:1; + unsigned short DREQE:1; + unsigned short :1; + unsigned short MBW:1; + unsigned short :1; + unsigned short BIGEND:1; + unsigned short :4; + unsigned short CURPIPE:4; +}; + +union un_usb0_d0fifosel +{ + unsigned short WORD; +#ifdef IODEFINE_H_HISTORY + struct st_usb0_d0fifosel_bit BIT; +#endif +}; + +struct st_usb0_d0fifoctr_bit +{ + unsigned short BVAL:1; + unsigned short BCLR:1; + unsigned short FRDY:1; + unsigned short :4; + unsigned short DTLN:9; +}; + +union un_usb0_d0fifoctr +{ + unsigned short WORD; +#ifdef IODEFINE_H_HISTORY + struct st_usb0_d0fifoctr_bit BIT; +#endif +}; + +struct st_usb0_d1fifosel_bit +{ + unsigned short RCNT:1; + unsigned short REW:1; + unsigned short DCLRM:1; + unsigned short DREQE:1; + unsigned short :1; + unsigned short MBW:1; + unsigned short :1; + unsigned short BIGEND:1; + unsigned short :4; + unsigned short CURPIPE:4; +}; + +union un_usb0_d1fifosel +{ + unsigned short WORD; +#ifdef IODEFINE_H_HISTORY + struct st_usb0_d1fifosel_bit BIT; +#endif +}; + +struct st_usb0_d1fifoctr_bit +{ + unsigned short BVAL:1; + unsigned short BCLR:1; + unsigned short FRDY:1; + unsigned short :4; + unsigned short DTLN:9; +}; + +union un_usb0_d1fifoctr +{ + unsigned short WORD; +#ifdef IODEFINE_H_HISTORY + struct st_usb0_d1fifoctr_bit BIT; +#endif +}; + +struct st_usb0_intenb0_bit +{ + unsigned short VBSE:1; + unsigned short RSME:1; + unsigned short SOFE:1; + unsigned short DVSE:1; + unsigned short CTRE:1; + unsigned short BEMPE:1; + unsigned short NRDYE:1; + unsigned short BRDYE:1; + unsigned short :8; +}; + +union un_usb0_intenb0 +{ + unsigned short WORD; +#ifdef IODEFINE_H_HISTORY + struct st_usb0_intenb0_bit BIT; +#endif +}; + +struct st_usb0_intenb1_bit +{ + unsigned short OVRCRE:1; + unsigned short BCHGE:1; + unsigned short :1; + unsigned short DTCHE:1; + unsigned short ATTCHE:1; + unsigned short :4; + unsigned short EOFERRE:1; + unsigned short SIGNE:1; + unsigned short SACKE:1; + unsigned short :4; +}; + +union un_usb0_intenb1 +{ + unsigned short WORD; +#ifdef IODEFINE_H_HISTORY + struct st_usb0_intenb1_bit BIT; +#endif +}; + +struct st_usb0_brdyenb_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned short PIPE0BRDYE : 1; + unsigned short PIPE1BRDYE : 1; + unsigned short PIPE2BRDYE : 1; + unsigned short PIPE3BRDYE : 1; + unsigned short PIPE4BRDYE : 1; + unsigned short PIPE5BRDYE : 1; + unsigned short PIPE6BRDYE : 1; + unsigned short PIPE7BRDYE : 1; + unsigned short PIPE8BRDYE : 1; + unsigned short PIPE9BRDYE : 1; + unsigned short : 6; +#else + unsigned short : 6; + unsigned short PIPE9BRDYE : 1; + unsigned short PIPE8BRDYE : 1; + unsigned short PIPE7BRDYE : 1; + unsigned short PIPE6BRDYE : 1; + unsigned short PIPE5BRDYE : 1; + unsigned short PIPE4BRDYE : 1; + unsigned short PIPE3BRDYE : 1; + unsigned short PIPE2BRDYE : 1; + unsigned short PIPE1BRDYE : 1; + unsigned short PIPE0BRDYE : 1; +#endif +}; + +union un_usb0_brdyenb +{ + unsigned short WORD; + struct st_usb0_brdyenb_bit BIT; +}; + +struct st_usb0_nrdyenb_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned short PIPE0NRDYE : 1; + unsigned short PIPE1NRDYE : 1; + unsigned short PIPE2NRDYE : 1; + unsigned short PIPE3NRDYE : 1; + unsigned short PIPE4NRDYE : 1; + unsigned short PIPE5NRDYE : 1; + unsigned short PIPE6NRDYE : 1; + unsigned short PIPE7NRDYE : 1; + unsigned short PIPE8NRDYE : 1; + unsigned short PIPE9NRDYE : 1; + unsigned short : 6; +#else + unsigned short : 6; + unsigned short PIPE9NRDYE : 1; + unsigned short PIPE8NRDYE : 1; + unsigned short PIPE7NRDYE : 1; + unsigned short PIPE6NRDYE : 1; + unsigned short PIPE5NRDYE : 1; + unsigned short PIPE4NRDYE : 1; + unsigned short PIPE3NRDYE : 1; + unsigned short PIPE2NRDYE : 1; + unsigned short PIPE1NRDYE : 1; + unsigned short PIPE0NRDYE : 1; +#endif +}; + +union un_usb0_nrdyenb +{ + unsigned short WORD; + struct st_usb0_nrdyenb_bit BIT; +}; + +struct st_usb0_bempenb_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned short PIPE0BEMPE : 1; + unsigned short PIPE1BEMPE : 1; + unsigned short PIPE2BEMPE : 1; + unsigned short PIPE3BEMPE : 1; + unsigned short PIPE4BEMPE : 1; + unsigned short PIPE5BEMPE : 1; + unsigned short PIPE6BEMPE : 1; + unsigned short PIPE7BEMPE : 1; + unsigned short PIPE8BEMPE : 1; + unsigned short PIPE9BEMPE : 1; + unsigned short : 6; +#else + unsigned short : 6; + unsigned short PIPE9BEMPE : 1; + unsigned short PIPE8BEMPE : 1; + unsigned short PIPE7BEMPE : 1; + unsigned short PIPE6BEMPE : 1; + unsigned short PIPE5BEMPE : 1; + unsigned short PIPE4BEMPE : 1; + unsigned short PIPE3BEMPE : 1; + unsigned short PIPE2BEMPE : 1; + unsigned short PIPE1BEMPE : 1; + unsigned short PIPE0BEMPE : 1; +#endif +}; + +union un_usb0_bempenb +{ + unsigned short WORD; + struct st_usb0_bempenb_bit BIT; +}; + +struct st_usb0_sofcfg_bit +{ + unsigned short :7; + unsigned short TRNENSEL:1; + unsigned short :1; + unsigned short BRDYM:1; + unsigned short :1; + unsigned short EDGESTS:1; + unsigned short :4; +}; + +union un_usb0_sofcfg +{ + unsigned short WORD; +#ifdef IODEFINE_H_HISTORY + struct st_usb0_sofcfg_bit BIT; +#endif +}; + +struct st_usb0_intsts0_bit +{ + unsigned short VBINT:1; + unsigned short RESM:1; + unsigned short SOFR:1; + unsigned short DVST:1; + unsigned short CTRT:1; + unsigned short BEMP:1; + unsigned short NRDY:1; + unsigned short BRDY:1; + unsigned short VBSTS:1; + unsigned short DVSQ:3; + unsigned short VALID:1; + unsigned short CTSQ:3; +}; + +union un_usb0_intsts0 +{ + unsigned short WORD; +#ifdef IODEFINE_H_HISTORY + struct st_usb0_intsts0_bit BIT; +#endif +}; + +struct st_usb0_intsts1_bit +{ + unsigned short OVRCR:1; + unsigned short BCHG:1; + unsigned short :1; + unsigned short DTCH:1; + unsigned short ATTCH:1; + unsigned short :4; + unsigned short EOFERR:1; + unsigned short SIGN:1; + unsigned short SACK:1; + unsigned short :4; +}; + +union un_usb0_intsts1 +{ + unsigned short WORD; +#ifdef IODEFINE_H_HISTORY + struct st_usb0_intsts1_bit BIT; +#endif +}; + +struct st_usb0_brdysts_bit +{ + unsigned short :6; + unsigned short PIPE9BRDY:1; + unsigned short PIPE8BRDY:1; + unsigned short PIPE7BRDY:1; + unsigned short PIPE6BRDY:1; + unsigned short PIPE5BRDY:1; + unsigned short PIPE4BRDY:1; + unsigned short PIPE3BRDY:1; + unsigned short PIPE2BRDY:1; + unsigned short PIPE1BRDY:1; + unsigned short PIPE0BRDY:1; +}; + +union un_usb0_brdysts +{ + unsigned short WORD; +#ifdef IODEFINE_H_HISTORY + struct st_usb0_brdysts_bit BIT; +#endif +}; + +struct st_usb0_nrdysts_bit +{ + unsigned short :6; + unsigned short PIPE9NRDY:1; + unsigned short PIPE8NRDY:1; + unsigned short PIPE7NRDY:1; + unsigned short PIPE6NRDY:1; + unsigned short PIPE5NRDY:1; + unsigned short PIPE4NRDY:1; + unsigned short PIPE3NRDY:1; + unsigned short PIPE2NRDY:1; + unsigned short PIPE1NRDY:1; + unsigned short PIPE0NRDY:1; +}; + +union un_usb0_nrdysts +{ + unsigned short WORD; +#ifdef IODEFINE_H_HISTORY + struct st_usb0_nrdysts_bit BIT; +#endif +}; + +struct st_usb0_bempsts_bit +{ + unsigned short :6; + unsigned short PIPE9BEMP:1; + unsigned short PIPE8BEMP:1; + unsigned short PIPE7BEMP:1; + unsigned short PIPE6BEMP:1; + unsigned short PIPE5BEMP:1; + unsigned short PIPE4BEMP:1; + unsigned short PIPE3BEMP:1; + unsigned short PIPE2BEMP:1; + unsigned short PIPE1BEMP:1; + unsigned short PIPE0BEMP:1; +}; + +union un_usb0_bempsts +{ + unsigned short WORD; +#ifdef IODEFINE_H_HISTORY + struct st_usb0_bempsts_bit BIT; +#endif +}; + +struct st_usb0_frmnum_bit +{ + unsigned short OVRN:1; + unsigned short CRCE:1; + unsigned short :3; + unsigned short FRNM:11; +}; + +union un_usb0_frmnum +{ + unsigned short WORD; +#ifdef IODEFINE_H_HISTORY + struct st_usb0_frmnum_bit BIT; +#endif +}; + +struct st_usb0_dvchgr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned short : 15; + unsigned short DVCHG : 1; +#else + unsigned short DVCHG : 1; + unsigned short : 15; +#endif +}; + +union un_usb0_dvchgr +{ + unsigned short WORD; + struct st_usb0_dvchgr_bit BIT; +}; + +struct st_usb0_usbaddr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned short USBADDR : 7; + unsigned short : 1; + unsigned short STSRECOV : 4; + unsigned short : 4; +#else + unsigned short : 4; + unsigned short STSRECOV : 4; + unsigned short : 1; + unsigned short USBADDR : 7; +#endif +}; + +union un_usb0_usbaddr +{ + unsigned short WORD; + struct st_usb0_usbaddr_bit BIT; +}; + +struct st_usb0_usbreq_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned short BMREQUESTTYPE : 8; + unsigned short BREQUEST : 8; +#else + unsigned short BREQUEST : 8; + unsigned short BMREQUESTTYPE : 8; +#endif +}; + +union un_usb0_usbreq +{ + unsigned short WORD; + struct st_usb0_usbreq_bit BIT; +}; + +struct st_usb0_dcpcfg_bit +{ + unsigned short :8; + unsigned short SHTNAK:1; + unsigned short :2; + unsigned short DIR:1; + unsigned short :4; +}; + +union un_usb0_dcpcfg +{ + unsigned short WORD; +#ifdef IODEFINE_H_HISTORY + struct st_usb0_dcpcfg_bit BIT; +#endif +}; + +struct st_usb0_dcpmaxp_bit +{ + unsigned short DEVSEL:4; + unsigned short :5; + unsigned short MXPS:7; +}; + +union un_usb0_dcpmaxp +{ + unsigned short WORD; +#ifdef IODEFINE_H_HISTORY + struct st_usb0_dcpmaxp_bit BIT; +#endif +}; + +struct st_usb0_dcpctr_bit +{ + unsigned short BSTS:1; + unsigned short SUREQ:1; + unsigned short :2; + unsigned short SUREQCLR:1; + unsigned short :2; + unsigned short SQCLR:1; + unsigned short SQSET:1; + unsigned short SQMON:1; + unsigned short PBUSY:1; + unsigned short :2; + unsigned short CCPL:1; + unsigned short PID:2; +}; + +union un_usb0_dcpctr +{ + unsigned short WORD; +#ifdef IODEFINE_H_HISTORY + struct st_usb0_dcpctr_bit BIT; +#endif +}; + +struct st_usb0_pipesel_bit +{ + unsigned short :12; + unsigned short PIPESEL:4; +}; + +union un_usb0_pipesel +{ + unsigned short WORD; +#ifdef IODEFINE_H_HISTORY + struct st_usb0_pipesel_bit BIT; +#endif +}; + +struct st_usb0_pipecfg_bit +{ + unsigned short TYPE:2; + unsigned short :3; + unsigned short BFRE:1; + unsigned short DBLB:1; + unsigned short :1; + unsigned short SHTNAK:1; + unsigned short :2; + unsigned short DIR:1; + unsigned short EPNUM:4; +}; + +union un_usb0_pipecfg +{ + unsigned short WORD; +#ifdef IODEFINE_H_HISTORY + struct st_usb0_pipecfg_bit BIT; +#endif +}; + +struct st_usb0_pipemaxp_bit +{ + unsigned short DEVSEL:4; + unsigned short :3; + unsigned short MXPS:9; +}; + +union un_usb0_pipemaxp +{ + unsigned short WORD; +#ifdef IODEFINE_H_HISTORY + struct st_usb0_pipemaxp_bit BIT; +#endif +}; + +struct st_usb0_pipeperi_bit +{ + unsigned short :3; + unsigned short IFIS:1; + unsigned short :9; + unsigned short IITV:3; +}; + +union un_usb0_pipeperi +{ + unsigned short WORD; +#ifdef IODEFINE_H_HISTORY + struct st_usb0_pipeperi_bit BIT; +#endif +}; + +struct st_usb0_pipe1ctr_bit +{ + unsigned short BSTS:1; + unsigned short INBUFM:1; + unsigned short :3; + unsigned short ATREPM:1; + unsigned short ACLRM:1; + unsigned short SQCLR:1; + unsigned short SQSET:1; + unsigned short SQMON:1; + unsigned short PBUSY:1; + unsigned short :3; + unsigned short PID:2; +}; + +union un_usb0_pipe1ctr +{ + unsigned short WORD; +#ifdef IODEFINE_H_HISTORY + struct st_usb0_pipe1ctr_bit BIT; +#endif +}; + +struct st_usb0_pipe2ctr_bit +{ + unsigned short BSTS:1; + unsigned short INBUFM:1; + unsigned short :3; + unsigned short ATREPM:1; + unsigned short ACLRM:1; + unsigned short SQCLR:1; + unsigned short SQSET:1; + unsigned short SQMON:1; + unsigned short PBUSY:1; + unsigned short :3; + unsigned short PID:2; +}; + +union un_usb0_pipe2ctr +{ + unsigned short WORD; +#ifdef IODEFINE_H_HISTORY + struct st_usb0_pipe2ctr_bit BIT; +#endif +}; + +struct st_usb0_pipe3ctr_bit +{ + unsigned short BSTS:1; + unsigned short INBUFM:1; + unsigned short :3; + unsigned short ATREPM:1; + unsigned short ACLRM:1; + unsigned short SQCLR:1; + unsigned short SQSET:1; + unsigned short SQMON:1; + unsigned short PBUSY:1; + unsigned short :3; + unsigned short PID:2; +}; + +union un_usb0_pipe3ctr +{ + unsigned short WORD; +#ifdef IODEFINE_H_HISTORY + struct st_usb0_pipe3ctr_bit BIT; +#endif +}; + +struct st_usb0_pipe4ctr_bit +{ + unsigned short BSTS:1; + unsigned short INBUFM:1; + unsigned short :3; + unsigned short ATREPM:1; + unsigned short ACLRM:1; + unsigned short SQCLR:1; + unsigned short SQSET:1; + unsigned short SQMON:1; + unsigned short PBUSY:1; + unsigned short :3; + unsigned short PID:2; +}; + +union un_usb0_pipe4ctr +{ + unsigned short WORD; +#ifdef IODEFINE_H_HISTORY + struct st_usb0_pipe4ctr_bit BIT; +#endif +}; + +struct st_usb0_pipe5ctr_bit +{ + unsigned short BSTS:1; + unsigned short INBUFM:1; + unsigned short :3; + unsigned short ATREPM:1; + unsigned short ACLRM:1; + unsigned short SQCLR:1; + unsigned short SQSET:1; + unsigned short SQMON:1; + unsigned short PBUSY:1; + unsigned short :3; + unsigned short PID:2; +}; + +union un_usb0_pipe5ctr +{ + unsigned short WORD; +#ifdef IODEFINE_H_HISTORY + struct st_usb0_pipe5ctr_bit BIT; +#endif +}; + +struct st_usb0_pipe6ctr_bit +{ + unsigned short BSTS:1; + unsigned short :5; + unsigned short ACLRM:1; + unsigned short SQCLR:1; + unsigned short SQSET:1; + unsigned short SQMON:1; + unsigned short PBUSY:1; + unsigned short :3; + unsigned short PID:2; +}; + +union un_usb0_pipe6ctr +{ + unsigned short WORD; +#ifdef IODEFINE_H_HISTORY + struct st_usb0_pipe6ctr_bit BIT; +#endif +}; + +struct st_usb0_pipe7ctr_bit +{ + unsigned short BSTS:1; + unsigned short :5; + unsigned short ACLRM:1; + unsigned short SQCLR:1; + unsigned short SQSET:1; + unsigned short SQMON:1; + unsigned short PBUSY:1; + unsigned short :3; + unsigned short PID:2; +}; + +union un_usb0_pipe7ctr +{ + unsigned short WORD; +#ifdef IODEFINE_H_HISTORY + struct st_usb0_pipe7ctr_bit BIT; +#endif +}; + +struct st_usb0_pipe8ctr_bit +{ + unsigned short BSTS:1; + unsigned short :5; + unsigned short ACLRM:1; + unsigned short SQCLR:1; + unsigned short SQSET:1; + unsigned short SQMON:1; + unsigned short PBUSY:1; + unsigned short :3; + unsigned short PID:2; +}; + +union un_usb0_pipe8ctr +{ + unsigned short WORD; +#ifdef IODEFINE_H_HISTORY + struct st_usb0_pipe8ctr_bit BIT; +#endif +}; + +struct st_usb0_pipe9ctr_bit +{ + unsigned short BSTS:1; + unsigned short :5; + unsigned short ACLRM:1; + unsigned short SQCLR:1; + unsigned short SQSET:1; + unsigned short SQMON:1; + unsigned short PBUSY:1; + unsigned short :3; + unsigned short PID:2; +}; + +union un_usb0_pipe9ctr +{ + unsigned short WORD; +#ifdef IODEFINE_H_HISTORY + struct st_usb0_pipe9ctr_bit BIT; +#endif +}; + +struct st_usb0_pipe1tre_bit +{ + unsigned short :6; + unsigned short TRENB:1; + unsigned short TRCLR:1; + unsigned short :8; +}; + +union un_usb0_pipe1tre +{ + unsigned short WORD; +#ifdef IODEFINE_H_HISTORY + struct st_usb0_pipe1tre_bit BIT; +#endif +}; + +struct st_usb0_pipe2tre_bit +{ + unsigned short :6; + unsigned short TRENB:1; + unsigned short TRCLR:1; + unsigned short :8; +}; + +union un_usb0_pipe2tre +{ + unsigned short WORD; +#ifdef IODEFINE_H_HISTORY + struct st_usb0_pipe2tre_bit BIT; +#endif +}; + +struct st_usb0_pipe3tre_bit +{ + unsigned short :6; + unsigned short TRENB:1; + unsigned short TRCLR:1; + unsigned short :8; +}; + +union un_usb0_pipe3tre +{ + unsigned short WORD; +#ifdef IODEFINE_H_HISTORY + struct st_usb0_pipe3tre_bit BIT; +#endif +}; + +struct st_usb0_pipe4tre_bit +{ + unsigned short :6; + unsigned short TRENB:1; + unsigned short TRCLR:1; + unsigned short :8; +}; + +union un_usb0_pipe4tre +{ + unsigned short WORD; +#ifdef IODEFINE_H_HISTORY + struct st_usb0_pipe4tre_bit BIT; +#endif +}; + +struct st_usb0_pipe5tre_bit +{ + unsigned short :6; + unsigned short TRENB:1; + unsigned short TRCLR:1; + unsigned short :8; +}; + +union un_usb0_pipe5tre +{ + unsigned short WORD; +#ifdef IODEFINE_H_HISTORY + struct st_usb0_pipe5tre_bit BIT; +#endif +}; + +struct st_usb0_devadd0_bit +{ + unsigned short :8; + unsigned short USBSPD:2; + unsigned short :6; +}; + +union un_usb0_devadd0 +{ + unsigned short WORD; +#ifdef IODEFINE_H_HISTORY + struct st_usb0_devadd0_bit BIT; +#endif +}; + +struct st_usb0_devadd1_bit +{ + unsigned short :8; + unsigned short USBSPD:2; + unsigned short :6; +}; + +union un_usb0_devadd1 +{ + unsigned short WORD; +#ifdef IODEFINE_H_HISTORY + struct st_usb0_devadd1_bit BIT; +#endif +}; + +struct st_usb0_devadd2_bit +{ + unsigned short :8; + unsigned short USBSPD:2; + unsigned short :6; +}; + +union un_usb0_devadd2 +{ + unsigned short WORD; +#ifdef IODEFINE_H_HISTORY + struct st_usb0_devadd2_bit BIT; +#endif +}; + +struct st_usb0_devadd3_bit +{ + unsigned short :8; + unsigned short USBSPD:2; + unsigned short :6; +}; + +union un_usb0_devadd3 +{ + unsigned short WORD; +#ifdef IODEFINE_H_HISTORY + struct st_usb0_devadd3_bit BIT; +#endif +}; + +struct st_usb0_devadd4_bit +{ + unsigned short :8; + unsigned short USBSPD:2; + unsigned short :6; +}; + +union un_usb0_devadd4 +{ + unsigned short WORD; +#ifdef IODEFINE_H_HISTORY + struct st_usb0_devadd4_bit BIT; +#endif +}; + +struct st_usb0_devadd5_bit +{ + unsigned short :8; + unsigned short USBSPD:2; + unsigned short :6; +}; + +union un_usb0_devadd5 +{ + unsigned short WORD; +#ifdef IODEFINE_H_HISTORY + struct st_usb0_devadd5_bit BIT; +#endif +}; + +struct st_usb0_physlew_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long SLEWR00 : 1; + unsigned long SLEWR01 : 1; + unsigned long SLEWF00 : 1; + unsigned long SLEWF01 : 1; + unsigned long : 28; +#else + unsigned long : 28; + unsigned long SLEWF01 : 1; + unsigned long SLEWF00 : 1; + unsigned long SLEWR01 : 1; + unsigned long SLEWR00 : 1; +#endif +}; + +union un_usb0_physlew +{ + unsigned long LONG; + struct st_usb0_physlew_bit BIT; +}; + +struct st_wdt_wdtcr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned short TOPS : 2; + unsigned short : 2; + unsigned short CKS : 4; + unsigned short RPES : 2; + unsigned short : 2; + unsigned short RPSS : 2; + unsigned short : 2; +#else + unsigned short : 2; + unsigned short RPSS : 2; + unsigned short : 2; + unsigned short RPES : 2; + unsigned short CKS : 4; + unsigned short : 2; + unsigned short TOPS : 2; +#endif +}; + +union un_wdt_wdtcr +{ + unsigned short WORD; + struct st_wdt_wdtcr_bit BIT; +}; + +struct st_wdt_wdtsr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned short CNTVAL : 14; + unsigned short UNDFF : 1; + unsigned short REFEF : 1; +#else + unsigned short REFEF : 1; + unsigned short UNDFF : 1; + unsigned short CNTVAL : 14; +#endif +}; + +union un_wdt_wdtsr +{ + unsigned short WORD; + struct st_wdt_wdtsr_bit BIT; +}; + +struct st_wdt_wdtrcr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char : 7; + unsigned char RSTIRQS : 1; +#else + unsigned char RSTIRQS : 1; + unsigned char : 7; +#endif +}; + +union un_wdt_wdtrcr +{ + unsigned char BYTE; + struct st_wdt_wdtrcr_bit BIT; +}; + +struct st_crc_crccr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char GPS : 3; + unsigned char : 3; + unsigned char LMS : 1; + unsigned char DORCLR : 1; +#else + unsigned char DORCLR : 1; + unsigned char LMS : 1; + unsigned char : 3; + unsigned char GPS : 3; +#endif +}; + +union un_crc_crccr +{ + unsigned char BYTE; + struct st_crc_crccr_bit BIT; +}; + +union un_crc_crcdir +{ + unsigned long LONG; + unsigned char BYTE; +}; + +union un_crc_crcdor +{ + unsigned long LONG; + unsigned short WORD; + unsigned char BYTE; +}; + +struct st_da_dacr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char : 5; + unsigned char DAE : 1; + unsigned char DAOE0 : 1; + unsigned char DAOE1 : 1; +#else + unsigned char DAOE1 : 1; + unsigned char DAOE0 : 1; + unsigned char DAE : 1; + unsigned char : 5; +#endif +}; + +union un_da_dacr +{ + unsigned char BYTE; + struct st_da_dacr_bit BIT; +}; + +struct st_da_dadpr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char : 7; + unsigned char DPSEL : 1; +#else + unsigned char DPSEL : 1; + unsigned char : 7; +#endif +}; + +union un_da_dadpr +{ + unsigned char BYTE; + struct st_da_dadpr_bit BIT; +}; + +struct st_da_daadscr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char : 7; + unsigned char DAADST : 1; +#else + unsigned char DAADST : 1; + unsigned char : 7; +#endif +}; + +union un_da_daadscr +{ + unsigned char BYTE; + struct st_da_daadscr_bit BIT; +}; + +struct st_da_daampcr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char : 6; + unsigned char DAAMP0 : 1; + unsigned char DAAMP1 : 1; +#else + unsigned char DAAMP1 : 1; + unsigned char DAAMP0 : 1; + unsigned char : 6; +#endif +}; + +union un_da_daampcr +{ + unsigned char BYTE; + struct st_da_daampcr_bit BIT; +}; + +struct st_da_daaswcr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char : 6; + unsigned char DAASW0 : 1; + unsigned char DAASW1 : 1; +#else + unsigned char DAASW1 : 1; + unsigned char DAASW0 : 1; + unsigned char : 6; +#endif +}; + +union un_da_daaswcr +{ + unsigned char BYTE; + struct st_da_daaswcr_bit BIT; +}; + +struct st_da_daadusr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char : 1; + unsigned char AMADSEL1 : 1; + unsigned char : 6; +#else + unsigned char : 6; + unsigned char AMADSEL1 : 1; + unsigned char : 1; +#endif +}; + +union un_da_daadusr +{ + unsigned char BYTE; + struct st_da_daadusr_bit BIT; +}; + +struct st_doc_docr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char OMS : 2; + unsigned char DCSEL : 1; + unsigned char : 1; + unsigned char DOPCIE : 1; + unsigned char DOPCF : 1; + unsigned char DOPCFCL : 1; + unsigned char : 1; +#else + unsigned char : 1; + unsigned char DOPCFCL : 1; + unsigned char DOPCF : 1; + unsigned char DOPCIE : 1; + unsigned char : 1; + unsigned char DCSEL : 1; + unsigned char OMS : 2; +#endif +}; + +union un_doc_docr +{ + unsigned char BYTE; + struct st_doc_docr_bit BIT; +}; + +struct st_mtu_toera_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char OE3B : 1; + unsigned char OE4A : 1; + unsigned char OE4B : 1; + unsigned char OE3D : 1; + unsigned char OE4C : 1; + unsigned char OE4D : 1; + unsigned char : 2; +#else + unsigned char : 2; + unsigned char OE4D : 1; + unsigned char OE4C : 1; + unsigned char OE3D : 1; + unsigned char OE4B : 1; + unsigned char OE4A : 1; + unsigned char OE3B : 1; +#endif +}; + +union un_mtu_toera +{ + unsigned char BYTE; + struct st_mtu_toera_bit BIT; +}; + +struct st_mtu_tgcra_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char UF : 1; + unsigned char VF : 1; + unsigned char WF : 1; + unsigned char FB : 1; + unsigned char P : 1; + unsigned char N : 1; + unsigned char BDC : 1; + unsigned char : 1; +#else + unsigned char : 1; + unsigned char BDC : 1; + unsigned char N : 1; + unsigned char P : 1; + unsigned char FB : 1; + unsigned char WF : 1; + unsigned char VF : 1; + unsigned char UF : 1; +#endif +}; + +union un_mtu_tgcra +{ + unsigned char BYTE; + struct st_mtu_tgcra_bit BIT; +}; + +struct st_mtu_tocr1a_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char OLSP : 1; + unsigned char OLSN : 1; + unsigned char TOCS : 1; + unsigned char TOCL : 1; + unsigned char : 2; + unsigned char PSYE : 1; + unsigned char : 1; +#else + unsigned char : 1; + unsigned char PSYE : 1; + unsigned char : 2; + unsigned char TOCL : 1; + unsigned char TOCS : 1; + unsigned char OLSN : 1; + unsigned char OLSP : 1; +#endif +}; + +union un_mtu_tocr1a +{ + unsigned char BYTE; + struct st_mtu_tocr1a_bit BIT; +}; + +struct st_mtu_tocr2a_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char OLS1P : 1; + unsigned char OLS1N : 1; + unsigned char OLS2P : 1; + unsigned char OLS2N : 1; + unsigned char OLS3P : 1; + unsigned char OLS3N : 1; + unsigned char BF : 2; +#else + unsigned char BF : 2; + unsigned char OLS3N : 1; + unsigned char OLS3P : 1; + unsigned char OLS2N : 1; + unsigned char OLS2P : 1; + unsigned char OLS1N : 1; + unsigned char OLS1P : 1; +#endif +}; + +union un_mtu_tocr2a +{ + unsigned char BYTE; + struct st_mtu_tocr2a_bit BIT; +}; + +struct st_mtu_titcr1a_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char T4VCOR : 3; + unsigned char T4VEN : 1; + unsigned char T3ACOR : 3; + unsigned char T3AEN : 1; +#else + unsigned char T3AEN : 1; + unsigned char T3ACOR : 3; + unsigned char T4VEN : 1; + unsigned char T4VCOR : 3; +#endif +}; + +union un_mtu_titcr1a +{ + unsigned char BYTE; + struct st_mtu_titcr1a_bit BIT; +}; + +struct st_mtu_titcnt1a_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char T4VCNT : 3; + unsigned char : 1; + unsigned char T3ACNT : 3; + unsigned char : 1; +#else + unsigned char : 1; + unsigned char T3ACNT : 3; + unsigned char : 1; + unsigned char T4VCNT : 3; +#endif +}; + +union un_mtu_titcnt1a +{ + unsigned char BYTE; + struct st_mtu_titcnt1a_bit BIT; +}; + +struct st_mtu_tbtera_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char BTE : 2; + unsigned char : 6; +#else + unsigned char : 6; + unsigned char BTE : 2; +#endif +}; + +union un_mtu_tbtera +{ + unsigned char BYTE; + struct st_mtu_tbtera_bit BIT; +}; + +struct st_mtu_tdera_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char TDER : 1; + unsigned char : 7; +#else + unsigned char : 7; + unsigned char TDER : 1; +#endif +}; + +union un_mtu_tdera +{ + unsigned char BYTE; + struct st_mtu_tdera_bit BIT; +}; + +struct st_mtu_tolbra_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char OLS1P : 1; + unsigned char OLS1N : 1; + unsigned char OLS2P : 1; + unsigned char OLS2N : 1; + unsigned char OLS3P : 1; + unsigned char OLS3N : 1; + unsigned char : 2; +#else + unsigned char : 2; + unsigned char OLS3N : 1; + unsigned char OLS3P : 1; + unsigned char OLS2N : 1; + unsigned char OLS2P : 1; + unsigned char OLS1N : 1; + unsigned char OLS1P : 1; +#endif +}; + +union un_mtu_tolbra +{ + unsigned char BYTE; + struct st_mtu_tolbra_bit BIT; +}; + +struct st_mtu_titmra_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char TITM : 1; + unsigned char : 7; +#else + unsigned char : 7; + unsigned char TITM : 1; +#endif +}; + +union un_mtu_titmra +{ + unsigned char BYTE; + struct st_mtu_titmra_bit BIT; +}; + +struct st_mtu_titcr2a_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char TRG4COR : 3; + unsigned char : 5; + #else + unsigned char : 5; + unsigned char TRG4COR : 3; +#endif +}; + +union un_mtu_titcr2a +{ + unsigned char BYTE; + struct st_mtu_titcr2a_bit BIT; +}; + +struct st_mtu_titcnt2a_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char TRG4CNT : 3; + unsigned char : 5; +#else + unsigned char : 5; + unsigned char TRG4CNT : 3; +#endif +}; + +union un_mtu_titcnt2a +{ + unsigned char BYTE; + struct st_mtu_titcnt2a_bit BIT; +}; + +struct st_mtu_twcra_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char WRE : 1; + unsigned char SCC : 1; + unsigned char : 5; + unsigned char CCE : 1; +#else + unsigned char CCE : 1; + unsigned char : 5; + unsigned char SCC : 1; + unsigned char WRE : 1; +#endif +}; + +union un_mtu_twcra +{ + unsigned char BYTE; + struct st_mtu_twcra_bit BIT; +}; + +struct st_mtu_tmdr2a_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char DRS : 1; + unsigned char : 7; +#else + unsigned char : 7; + unsigned char DRS : 1; +#endif +}; + +union un_mtu_tmdr2a +{ + unsigned char BYTE; + struct st_mtu_tmdr2a_bit BIT; +}; + +struct st_mtu_tstra_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char CST0 : 1; + unsigned char CST1 : 1; + unsigned char CST2 : 1; + unsigned char CST8 : 1; + unsigned char : 2; + unsigned char CST3 : 1; + unsigned char CST4 : 1; +#else + unsigned char CST4 : 1; + unsigned char CST3 : 1; + unsigned char : 2; + unsigned char CST8 : 1; + unsigned char CST2 : 1; + unsigned char CST1 : 1; + unsigned char CST0 : 1; +#endif +}; + +union un_mtu_tstra +{ + unsigned char BYTE; + struct st_mtu_tstra_bit BIT; +}; + +struct st_mtu_tsyra_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char SYNC0 : 1; + unsigned char SYNC1 : 1; + unsigned char SYNC2 : 1; + unsigned char : 3; + unsigned char SYNC3 : 1; + unsigned char SYNC4 : 1; +#else + unsigned char SYNC4 : 1; + unsigned char SYNC3 : 1; + unsigned char : 3; + unsigned char SYNC2 : 1; + unsigned char SYNC1 : 1; + unsigned char SYNC0 : 1; +#endif +}; + +union un_mtu_tsyra +{ + unsigned char BYTE; + struct st_mtu_tsyra_bit BIT; +}; + +struct st_mtu_tcsystr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char SCH7 : 1; + unsigned char SCH6 : 1; + unsigned char : 1; + unsigned char SCH4 : 1; + unsigned char SCH3 : 1; + unsigned char SCH2 : 1; + unsigned char SCH1 : 1; + unsigned char SCH0 : 1; +#else + unsigned char SCH0 : 1; + unsigned char SCH1 : 1; + unsigned char SCH2 : 1; + unsigned char SCH3 : 1; + unsigned char SCH4 : 1; + unsigned char : 1; + unsigned char SCH6 : 1; + unsigned char SCH7 : 1; +#endif +}; + +union un_mtu_tcsystr +{ + unsigned char BYTE; + struct st_mtu_tcsystr_bit BIT; +}; + +struct st_mtu_trwera_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char RWE : 1; + unsigned char : 7; +#else + unsigned char : 7; + unsigned char RWE : 1; +#endif +}; + +union un_mtu_trwera +{ + unsigned char BYTE; + struct st_mtu_trwera_bit BIT; +}; + +struct st_mtu_toerb_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char OE6B : 1; + unsigned char OE7A : 1; + unsigned char OE7B : 1; + unsigned char OE6D : 1; + unsigned char OE7C : 1; + unsigned char OE7D : 1; + unsigned char : 2; +#else + unsigned char : 2; + unsigned char OE7D : 1; + unsigned char OE7C : 1; + unsigned char OE6D : 1; + unsigned char OE7B : 1; + unsigned char OE7A : 1; + unsigned char OE6B : 1; +#endif +}; + +union un_mtu_toerb +{ + unsigned char BYTE; + struct st_mtu_toerb_bit BIT; +}; + +struct st_mtu_tocr1b_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char OLSP : 1; + unsigned char OLSN : 1; + unsigned char TOCS : 1; + unsigned char TOCL : 1; + unsigned char : 2; + unsigned char PSYE : 1; + unsigned char : 1; +#else + unsigned char : 1; + unsigned char PSYE : 1; + unsigned char : 2; + unsigned char TOCL : 1; + unsigned char TOCS : 1; + unsigned char OLSN : 1; + unsigned char OLSP : 1; +#endif +}; + +union un_mtu_tocr1b +{ + unsigned char BYTE; + struct st_mtu_tocr1b_bit BIT; +}; + +struct st_mtu_tocr2b_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char OLS1P : 1; + unsigned char OLS1N : 1; + unsigned char OLS2P : 1; + unsigned char OLS2N : 1; + unsigned char OLS3P : 1; + unsigned char OLS3N : 1; + unsigned char BF : 2; +#else + unsigned char BF : 2; + unsigned char OLS3N : 1; + unsigned char OLS3P : 1; + unsigned char OLS2N : 1; + unsigned char OLS2P : 1; + unsigned char OLS1N : 1; + unsigned char OLS1P : 1; +#endif +}; + +union un_mtu_tocr2b +{ + unsigned char BYTE; + struct st_mtu_tocr2b_bit BIT; +}; + +struct st_mtu_titcr1b_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char T7VCOR : 3; + unsigned char T7VEN : 1; + unsigned char T6ACOR : 3; + unsigned char T6AEN : 1; +#else + unsigned char T6AEN : 1; + unsigned char T6ACOR : 3; + unsigned char T7VEN : 1; + unsigned char T7VCOR : 3; +#endif +}; + +union un_mtu_titcr1b +{ + unsigned char BYTE; + struct st_mtu_titcr1b_bit BIT; +}; + +struct st_mtu_titcnt1b_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char T7VCNT : 3; + unsigned char : 1; + unsigned char T6ACNT : 3; + unsigned char : 1; +#else + unsigned char : 1; + unsigned char T6ACNT : 3; + unsigned char : 1; + unsigned char T7VCNT : 3; +#endif +}; + +union un_mtu_titcnt1b +{ + unsigned char BYTE; + struct st_mtu_titcnt1b_bit BIT; +}; + +struct st_mtu_tbterb_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char BTE : 2; + unsigned char : 6; +#else + unsigned char : 6; + unsigned char BTE : 2; +#endif +}; + +union un_mtu_tbterb +{ + unsigned char BYTE; + struct st_mtu_tbterb_bit BIT; +}; + +struct st_mtu_tderb_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char TDER : 1; + unsigned char : 7; +#else + unsigned char : 7; + unsigned char TDER : 1; +#endif +}; + +union un_mtu_tderb +{ + unsigned char BYTE; + struct st_mtu_tderb_bit BIT; +}; + +struct st_mtu_tolbrb_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char OLS1P : 1; + unsigned char OLS1N : 1; + unsigned char OLS2P : 1; + unsigned char OLS2N : 1; + unsigned char OLS3P : 1; + unsigned char OLS3N : 1; + unsigned char : 2; +#else + unsigned char : 2; + unsigned char OLS3N : 1; + unsigned char OLS3P : 1; + unsigned char OLS2N : 1; + unsigned char OLS2P : 1; + unsigned char OLS1N : 1; + unsigned char OLS1P : 1; +#endif +}; + +union un_mtu_tolbrb +{ + unsigned char BYTE; + struct st_mtu_tolbrb_bit BIT; +}; + +struct st_mtu_titmrb_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char TITM : 1; + unsigned char : 7; +#else + unsigned char : 7; + unsigned char TITM : 1; +#endif +}; + +union un_mtu_titmrb +{ + unsigned char BYTE; + struct st_mtu_titmrb_bit BIT; +}; + +struct st_mtu_titcr2b_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char TRG7COR : 3; + unsigned char : 5; +#else + unsigned char : 5; + unsigned char TRG7COR : 3; +#endif +}; + +union un_mtu_titcr2b +{ + unsigned char BYTE; + struct st_mtu_titcr2b_bit BIT; +}; + +struct st_mtu_titcnt2b_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char TRG7CNT : 3; + unsigned char : 5; +#else + unsigned char : 5; + unsigned char TRG7CNT : 3; +#endif +}; + +union un_mtu_titcnt2b +{ + unsigned char BYTE; + struct st_mtu_titcnt2b_bit BIT; +}; + +struct st_mtu_twcrb_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char WRE : 1; + unsigned char SCC : 1; + unsigned char : 5; + unsigned char CCE : 1; +#else + unsigned char CCE : 1; + unsigned char : 5; + unsigned char SCC : 1; + unsigned char WRE : 1; +#endif +}; + +union un_mtu_twcrb +{ + unsigned char BYTE; + struct st_mtu_twcrb_bit BIT; +}; + +struct st_mtu_tmdr2b_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char DRS : 1; + unsigned char : 7; +#else + unsigned char : 7; + unsigned char DRS : 1; +#endif +}; + +union un_mtu_twdr2b +{ + unsigned char BYTE; + struct st_mtu_tmdr2b_bit BIT; +}; + +struct st_mtu_tstrb_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char : 6; + unsigned char CST6 : 1; + unsigned char CST7 : 1; +#else + unsigned char CST7 : 1; + unsigned char CST6 : 1; + unsigned char : 6; +#endif +}; + +union un_mtu_tstrb +{ + unsigned char BYTE; + struct st_mtu_tstrb_bit BIT; +}; + +struct st_mtu_tsyrb_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char : 6; + unsigned char SYNC6 : 1; + unsigned char SYNC7 : 1; +#else + unsigned char SYNC7 : 1; + unsigned char SYNC6 : 1; + unsigned char : 6; +#endif +}; + +union un_mtu_tsyrb +{ + unsigned char BYTE; + struct st_mtu_tsyrb_bit BIT; +}; + +struct st_mtu_trwerb_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char RWE : 1; + unsigned char : 7; +#else + unsigned char : 7; + unsigned char RWE : 1; +#endif +}; + +union un_mtu_trwerb +{ + unsigned char BYTE; + struct st_mtu_trwerb_bit BIT; +}; + +struct st_mtu0_nfcro_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char NFAEN : 1; + unsigned char NFBEN : 1; + unsigned char NFCEN : 1; + unsigned char NFDEN : 1; + unsigned char NFCS : 2; + unsigned char : 2; +#else + unsigned char : 2; + unsigned char NFCS : 2; + unsigned char NFDEN : 1; + unsigned char NFCEN : 1; + unsigned char NFBEN : 1; + unsigned char NFAEN : 1; +#endif +}; + +union un_mtu0_nfcro +{ + unsigned char BYTE; + struct st_mtu0_nfcro_bit BIT; +}; + +struct st_mtu0_nfcrc_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char NFAEN : 1; + unsigned char NFBEN : 1; + unsigned char NFCEN : 1; + unsigned char NFDEN : 1; + unsigned char NFCS : 2; + unsigned char : 2; +#else + unsigned char : 2; + unsigned char NFCS : 2; + unsigned char NFDEN : 1; + unsigned char NFCEN : 1; + unsigned char NFBEN : 1; + unsigned char NFAEN : 1; +#endif +}; + +union un_mtu0_nfcrc +{ + unsigned char BYTE; + struct st_mtu0_nfcrc_bit BIT; +}; + +struct st_mtu0_tcr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char TPSC : 3; + unsigned char CKEG : 2; + unsigned char CCLR : 3; +#else + unsigned char CCLR : 3; + unsigned char CKEG : 2; + unsigned char TPSC : 3; +#endif +}; + +union un_mtu0_tcr +{ + unsigned char BYTE; + struct st_mtu0_tcr_bit BIT; +}; + +struct st_mtu0_tmdr1_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char MD : 4; + unsigned char BFA : 1; + unsigned char BFB : 1; + unsigned char BFE : 1; + unsigned char : 1; +#else + unsigned char : 1; + unsigned char BFE : 1; + unsigned char BFB : 1; + unsigned char BFA : 1; + unsigned char MD : 4; +#endif +}; + +union un_mtu0_tmdr1 +{ + unsigned char BYTE; + struct st_mtu0_tmdr1_bit BIT; +}; + +struct st_mtu0_tiorh_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char IOA : 4; + unsigned char IOB : 4; +#else + unsigned char IOB : 4; + unsigned char IOA : 4; +#endif +}; + +union un_mtu0_tiorh +{ + unsigned char BYTE; + struct st_mtu0_tiorh_bit BIT; +}; + +struct st_mtu0_tiorl_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char IOC : 4; + unsigned char IOD : 4; +#else + unsigned char IOD : 4; + unsigned char IOC : 4; +#endif +}; + +union un_mtu0_tiorl +{ + unsigned char BYTE; + struct st_mtu0_tiorl_bit BIT; +}; + +struct st_mtu0_tier_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char TGIEA : 1; + unsigned char TGIEB : 1; + unsigned char TGIEC : 1; + unsigned char TGIED : 1; + unsigned char TCIEV : 1; + unsigned char : 2; + unsigned char TTGE : 1; +#else + unsigned char TTGE : 1; + unsigned char : 2; + unsigned char TCIEV : 1; + unsigned char TGIED : 1; + unsigned char TGIEC : 1; + unsigned char TGIEB : 1; + unsigned char TGIEA : 1; +#endif +}; + +union un_mtu0_tier +{ + unsigned char BYTE; + struct st_mtu0_tier_bit BIT; +}; + +struct st_mtu0_tier2_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char TGIEE : 1; + unsigned char TGIEF : 1; + unsigned char : 5; + unsigned char TTGE2 : 1; +#else + unsigned char TTGE2 : 1; + unsigned char : 5; + unsigned char TGIEF : 1; + unsigned char TGIEE : 1; +#endif +}; + +union un_mtu0_tier2 +{ + unsigned char BYTE; + struct st_mtu0_tier2_bit BIT; +}; + +struct st_mtu0_tbtm_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char TTSA : 1; + unsigned char TTSB : 1; + unsigned char TTSE : 1; + unsigned char : 5; +#else + unsigned char : 5; + unsigned char TTSE : 1; + unsigned char TTSB : 1; + unsigned char TTSA : 1; +#endif +}; + +union un_mtu0_tbtm +{ + unsigned char BYTE; + struct st_mtu0_tbtm_bit BIT; +}; + +struct st_mtu0_tcr2_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char TPSC2 : 3; + unsigned char : 5; +#else + unsigned char : 5; + unsigned char TPSC2 : 3; +#endif +}; + +union un_mtu0_tcr2 +{ + unsigned char BYTE; + struct st_mtu0_tcr2_bit BIT; +}; + +struct st_mtu1_nfcr1_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char NFAEN : 1; + unsigned char NFBEN : 1; + unsigned char NFCEN : 1; + unsigned char NFDEN : 1; + unsigned char NFCS : 2; + unsigned char : 2; +#else + unsigned char : 2; + unsigned char NFCS : 2; + unsigned char NFDEN : 1; + unsigned char NFCEN : 1; + unsigned char NFBEN : 1; + unsigned char NFAEN : 1; +#endif +}; + +union un_mtu1_nfcr1 +{ + unsigned char BYTE; + struct st_mtu1_nfcr1_bit BIT; +}; + +struct st_mtu1_tcr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char TPSC : 3; + unsigned char CKEG : 2; + unsigned char CCLR : 2; + unsigned char : 1; +#else + unsigned char : 1; + unsigned char CCLR : 2; + unsigned char CKEG : 2; + unsigned char TPSC : 3; +#endif +}; + +union un_mtu1_tcr +{ + unsigned char BYTE; + struct st_mtu1_tcr_bit BIT; +}; + +struct st_mtu1_tmdr1_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char MD : 4; + unsigned char : 4; +#else + unsigned char : 4; + unsigned char MD : 4; +#endif +}; + +union un_mtu1_tmdr1 +{ + unsigned char BYTE; + struct st_mtu1_tmdr1_bit BIT; +}; + +struct st_mtu1_tior_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char IOA : 4; + unsigned char IOB : 4; + #else + unsigned char IOB : 4; + unsigned char IOA : 4; +#endif +}; + +union un_mtu1_tior +{ + unsigned char BYTE; + struct st_mtu1_tior_bit BIT; +}; + +struct st_mtu1_tier_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char TGIEA : 1; + unsigned char TGIEB : 1; + unsigned char : 2; + unsigned char TCIEV : 1; + unsigned char TCIEU : 1; + unsigned char : 1; + unsigned char TTGE : 1; +#else + unsigned char TTGE : 1; + unsigned char : 1; + unsigned char TCIEU : 1; + unsigned char TCIEV : 1; + unsigned char : 2; + unsigned char TGIEB : 1; + unsigned char TGIEA : 1; +#endif +}; + +union un_mtu1_tier +{ + unsigned char BYTE; + struct st_mtu1_tier_bit BIT; +}; + +struct st_mtu1_tsr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char : 7; + unsigned char TCFD : 1; +#else + unsigned char TCFD : 1; + unsigned char : 7; +#endif +}; +union un_mtu1_tsr +{ + unsigned char BYTE; + struct st_mtu1_tsr_bit BIT; +}; + +struct st_mtu1_ticcr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char I1AE : 1; + unsigned char I1BE : 1; + unsigned char I2AE : 1; + unsigned char I2BE : 1; + unsigned char : 4; +#else + unsigned char : 4; + unsigned char I2BE : 1; + unsigned char I2AE : 1; + unsigned char I1BE : 1; + unsigned char I1AE : 1; +#endif +}; + +union un_mtu1_ticcr +{ + unsigned char BYTE; + struct st_mtu1_ticcr_bit BIT; +}; + +struct st_mtu1_tmdr3_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char LWA : 1; + unsigned char PHCKSEL : 1; + unsigned char : 6; +#else + unsigned char : 6; + unsigned char PHCKSEL : 1; + unsigned char LWA : 1; +#endif +}; + +union un_mtu1_tmdr3 +{ + unsigned char BYTE; + struct st_mtu1_tmdr3_bit BIT; +}; + +struct st_mtu1_tcr2_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char TPSC2 : 3; + unsigned char PCB : 2; + unsigned char : 3; +#else + unsigned char : 3; + unsigned char PCB : 2; + unsigned char TPSC2 : 3; +#endif +}; + +union un_mtu1_tcr2 +{ + unsigned char BYTE; + struct st_mtu1_tcr2_bit BIT; +}; +struct st_mtu2_nfcr2_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char NFAEN : 1; + unsigned char NFBEN : 1; + unsigned char NFCEN : 1; + unsigned char NFDEN : 1; + unsigned char NFCS : 2; + unsigned char : 2; +#else + unsigned char : 2; + unsigned char NFCS : 2; + unsigned char NFDEN : 1; + unsigned char NFCEN : 1; + unsigned char NFBEN : 1; + unsigned char NFAEN : 1; +#endif +}; + +union un_mtu2_nfcr2 +{ + unsigned char BYTE; + struct st_mtu2_nfcr2_bit BIT; +}; + +struct st_mtu2_tcr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char TPSC : 3; + unsigned char CKEG : 2; + unsigned char CCLR : 2; + unsigned char : 1; +#else + unsigned char : 1; + unsigned char CCLR : 2; + unsigned char CKEG : 2; + unsigned char TPSC : 3; +#endif +}; + +union un_mtu2_tcr +{ + unsigned char BYTE; + struct st_mtu2_tcr_bit BIT; +}; + +struct st_mtu2_tmdr1_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char MD : 4; + unsigned char : 4; +#else + unsigned char : 4; + unsigned char MD : 4; +#endif +}; + +union un_mtu2_tmdr1 +{ + unsigned char BYTE; + struct st_mtu2_tmdr1_bit BIT; +}; + +struct st_mtu2_tior_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char IOA : 4; + unsigned char IOB : 4; +#else + unsigned char IOB : 4; + unsigned char IOA : 4; +#endif +}; + +union un_mtu2_tior +{ + unsigned char BYTE; + struct st_mtu2_tior_bit BIT; +}; + +struct st_mtu2_tier_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char TGIEA : 1; + unsigned char TGIEB : 1; + unsigned char : 2; + unsigned char TCIEV : 1; + unsigned char TCIEU : 1; + unsigned char : 1; + unsigned char TTGE : 1; +#else + unsigned char TTGE : 1; + unsigned char : 1; + unsigned char TCIEU : 1; + unsigned char TCIEV : 1; + unsigned char : 2; + unsigned char TGIEB : 1; + unsigned char TGIEA : 1; +#endif +}; + +union un_mtu2_tier +{ + unsigned char BYTE; + struct st_mtu2_tier_bit BIT; +}; + +struct st_mtu2_tsr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char : 7; + unsigned char TCFD : 1; +#else + unsigned char TCFD : 1; + unsigned char : 7; +#endif +}; + +union un_mtu2_tsr +{ + unsigned char BYTE; + struct st_mtu2_tsr_bit BIT; +}; + +struct st_mtu2_tcr2_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char TPSC2 : 3; + unsigned char PCB : 2; + unsigned char : 3; +#else + unsigned char : 3; + unsigned char PCB : 2; + unsigned char TPSC2 : 3; +#endif +}; + +union un_mtu2_tcr2 +{ + unsigned char BYTE; + struct st_mtu2_tcr2_bit BIT; +}; + +struct st_mtu3_tcr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char TPSC : 3; + unsigned char CKEG : 2; + unsigned char CCLR : 3; +#else + unsigned char CCLR : 3; + unsigned char CKEG : 2; + unsigned char TPSC : 3; +#endif +}; + +union un_mtu3_tcr +{ + unsigned char BYTE; + struct st_mtu3_tcr_bit BIT; +}; + +struct st_mtu3_tmdr1_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char MD : 4; + unsigned char BFA : 1; + unsigned char BFB : 1; + unsigned char : 2; +#else + unsigned char : 2; + unsigned char BFB : 1; + unsigned char BFA : 1; + unsigned char MD : 4; +#endif +}; + +union un_mtu3_tmdr1 +{ + unsigned char BYTE; + struct st_mtu3_tmdr1_bit BIT; +}; + +struct st_mtu3_tiorh_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char IOA : 4; + unsigned char IOB : 4; +#else + unsigned char IOB : 4; + unsigned char IOA : 4; +#endif +}; + +union un_mtu3_tiorh +{ + unsigned char BYTE; + struct st_mtu3_tiorh_bit BIT; +}; + +struct st_mtu3_tiorl_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char IOC : 4; + unsigned char IOD : 4; +#else + unsigned char IOD : 4; + unsigned char IOC : 4; +#endif +}; + +union un_mtu3_tiorl +{ + unsigned char BYTE; + struct st_mtu3_tiorl_bit BIT; +}; + +struct st_mtu3_tier_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char TGIEA : 1; + unsigned char TGIEB : 1; + unsigned char TGIEC : 1; + unsigned char TGIED : 1; + unsigned char TCIEV : 1; + unsigned char : 2; + unsigned char TTGE : 1; +#else + unsigned char TTGE : 1; + unsigned char : 2; + unsigned char TCIEV : 1; + unsigned char TGIED : 1; + unsigned char TGIEC : 1; + unsigned char TGIEB : 1; + unsigned char TGIEA : 1; +#endif +}; + +union un_mtu3_tier +{ + unsigned char BYTE; + struct st_mtu3_tier_bit BIT; +}; + +struct st_mtu3_tsr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char : 7; + unsigned char TCFD : 1; +#else + unsigned char TCFD : 1; + unsigned char : 7; +#endif +}; + +union un_mtu3_tsr +{ + unsigned char BYTE; + struct st_mtu3_tsr_bit BIT; +}; + +struct st_mtu3_tbtm_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char TTSA : 1; + unsigned char TTSB : 1; + unsigned char : 6; +#else + unsigned char : 6; + unsigned char TTSB : 1; + unsigned char TTSA : 1; +#endif +}; + +union un_mtu3_tbtm +{ + unsigned char BYTE; + struct st_mtu3_tbtm_bit BIT; +}; + +struct st_mtu3_tcr2_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char TPSC2 : 3; + unsigned char : 5; +#else + unsigned char : 5; + unsigned char TPSC2 : 3; +#endif +}; + +union un_mtu3_tcr2 +{ + unsigned char BYTE; + struct st_mtu3_tcr2_bit BIT; +}; + +struct st_mtu3_nfcr3_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char NFAEN : 1; + unsigned char NFBEN : 1; + unsigned char NFCEN : 1; + unsigned char NFDEN : 1; + unsigned char NFCS : 2; + unsigned char : 2; +#else + unsigned char : 2; + unsigned char NFCS : 2; + unsigned char NFDEN : 1; + unsigned char NFCEN : 1; + unsigned char NFBEN : 1; + unsigned char NFAEN : 1; +#endif +}; + +union un_mtu3_nfcr3 +{ + unsigned char BYTE; + struct st_mtu3_nfcr3_bit BIT; +}; + +struct st_iwdt_iwdtcr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned short TOPS : 2; + unsigned short : 2; + unsigned short CKS : 4; + unsigned short RPES : 2; + unsigned short : 2; + unsigned short RPSS : 2; + unsigned short : 2; +#else + unsigned short : 2; + unsigned short RPSS : 2; + unsigned short : 2; + unsigned short RPES : 2; + unsigned short CKS : 4; + unsigned short : 2; + unsigned short TOPS : 2; +#endif +}; + +union un_iwdt_iwdtcr +{ + unsigned short WORD; + struct st_iwdt_iwdtcr_bit BIT; +}; + +struct st_iwdt_iwdtsr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned short CNTVAL : 14; + unsigned short UNDFF : 1; + unsigned short REFEF : 1; +#else + unsigned short REFEF : 1; + unsigned short UNDFF : 1; + unsigned short CNTVAL : 14; +#endif +}; + +union un_iwdt_iwdtsr +{ + unsigned short WORD; + struct st_iwdt_iwdtsr_bit BIT; +}; + +struct st_iwdt_iwdtrcr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char : 7; + unsigned char RSTIRQS : 1; +#else + unsigned char RSTIRQS : 1; + unsigned char : 7; +#endif +}; + +union un_iwdt_iwdtrcr +{ + unsigned char BYTE; + struct st_iwdt_iwdtrcr_bit BIT; +}; + +struct st_iwdt_iwdtcstpr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char : 7; + unsigned char SLCSTP : 1; +#else + unsigned char SLCSTP : 1; + unsigned char : 7; +#endif +}; + +union un_iwdt_iwdtcstpr +{ + unsigned char BYTE; + struct st_iwdt_iwdtcstpr_bit BIT; +}; + +struct st_mpu_rspage0_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long : 4; + unsigned long RSPN : 28; +#else + unsigned long RSPN : 28; + unsigned long : 4; +#endif +}; + +union un_mpu_rspage0 +{ + unsigned long LONG; + struct st_mpu_rspage0_bit BIT; +}; + +struct st_mpu_repage0_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long V : 1; + unsigned long UAC : 3; + unsigned long REPN : 28; +#else + unsigned long REPN : 28; + unsigned long UAC : 3; + unsigned long V : 1; +#endif +}; + +union un_mpu_repage0 +{ + unsigned long LONG; + struct st_mpu_repage0_bit BIT; +}; + +struct st_mpu_rspage1_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long : 4; + unsigned long RSPN : 28; +#else + unsigned long RSPN : 28; + unsigned long : 4; +#endif +}; + +union un_mpu_rspage1 +{ + unsigned long LONG; + struct st_mpu_rspage1_bit BIT; +}; + +struct st_mpu_repage1_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long V : 1; + unsigned long UAC : 3; + unsigned long REPN : 28; +#else + unsigned long REPN : 28; + unsigned long UAC : 3; + unsigned long V : 1; +#endif +}; +union un_mpu_repage1 +{ + unsigned long LONG; + struct st_mpu_repage1_bit BIT; +}; + +struct st_mpu_rspage2_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long : 4; + unsigned long RSPN : 28; +#else + unsigned long RSPN : 28; + unsigned long : 4; +#endif +}; + +union un_mpu_rspage2 +{ + unsigned long LONG; + struct st_mpu_rspage2_bit BIT; +}; + +struct st_mpu_repage2_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long V : 1; + unsigned long UAC : 3; + unsigned long REPN : 28; +#else + unsigned long REPN : 28; + unsigned long UAC : 3; + unsigned long V : 1; +#endif +}; + +union un_mpu_repage2 +{ + unsigned long LONG; + struct st_mpu_repage2_bit BIT; +}; + +struct st_mpu_rspage3_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long : 4; + unsigned long RSPN : 28; +#else + unsigned long RSPN : 28; + unsigned long : 4; +#endif +}; + +union un_mpu_rspage3 +{ + unsigned long LONG; + struct st_mpu_rspage3_bit BIT; +}; + +struct st_mpu_repage3_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long V : 1; + unsigned long UAC : 3; + unsigned long REPN : 28; +#else + unsigned long REPN : 28; + unsigned long UAC : 3; + unsigned long V : 1; +#endif +}; + +union un_mpu_repage3 +{ + unsigned long LONG; + struct st_mpu_repage3_bit BIT; +}; + +struct st_mpu_rspage4_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long : 4; + unsigned long RSPN : 28; +#else + unsigned long RSPN : 28; + unsigned long : 4; +#endif +}; + +union un_mpu_rspage4 +{ + unsigned long LONG; + struct st_mpu_rspage4_bit BIT; +}; + +struct st_mpu_repage4_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long V : 1; + unsigned long UAC : 3; + unsigned long REPN : 28; +#else + unsigned long REPN : 28; + unsigned long UAC : 3; + unsigned long V : 1; +#endif +}; + +union un_mpu_repage4 +{ + unsigned long LONG; + struct st_mpu_repage4_bit BIT; +}; + +struct st_mpu_rspage5_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long : 4; + unsigned long RSPN : 28; +#else + unsigned long RSPN : 28; + unsigned long : 4; +#endif +}; + +union un_mpu_rspage5 +{ + unsigned long LONG; + struct st_mpu_rspage5_bit BIT; +}; + +struct st_mpu_repage5_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long V : 1; + unsigned long UAC : 3; + unsigned long REPN : 28; +#else + unsigned long REPN : 28; + unsigned long UAC : 3; + unsigned long V : 1; +#endif +}; + +union un_mpu_repage5 +{ + unsigned long LONG; + struct st_mpu_repage5_bit BIT; +}; + +struct st_mpu_rspage6_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long : 4; + unsigned long RSPN : 28; +#else + unsigned long RSPN : 28; + unsigned long : 4; +#endif +}; + +union un_mpu_rspage6 +{ + unsigned long LONG; + struct st_mpu_rspage6_bit BIT; +}; + +struct st_mpu_repage6_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long V : 1; + unsigned long UAC : 3; + unsigned long REPN : 28; +#else + unsigned long REPN : 28; + unsigned long UAC : 3; + unsigned long V : 1; +#endif +}; + +union un_mpu_repage6 +{ + unsigned long LONG; + struct st_mpu_repage6_bit BIT; +}; + +struct st_mpu_rspage7_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long : 4; + unsigned long RSPN : 28; +#else + unsigned long RSPN : 28; + unsigned long : 4; +#endif +}; + +union un_mpu_rspage7 +{ + unsigned long LONG; + struct st_mpu_rspage7_bit BIT; +}; + +struct st_mpu_repage7_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long V : 1; + unsigned long UAC : 3; + unsigned long REPN : 28; +#else + unsigned long REPN : 28; + unsigned long UAC : 3; + unsigned long V : 1; +#endif +}; + +union un_mpu_repage7 +{ + unsigned long LONG; + struct st_mpu_repage7_bit BIT; +}; + +struct st_mpu_mpen_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long MPEN : 1; + unsigned long : 31; +#else + unsigned long : 31; + unsigned long MPEN : 1; +#endif +}; + +union un_mpu_mpen +{ + unsigned long LONG; + struct st_mpu_mpen_bit BIT; +}; + +struct st_mpu_mpbac_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long : 1; + unsigned long UBAC : 3; + unsigned long : 28; +#else + unsigned long : 28; + unsigned long UBAC : 3; + unsigned long : 1; +#endif +}; + +union un_mpu_mpbac +{ + unsigned long LONG; + struct st_mpu_mpbac_bit BIT; +}; + +struct st_mpu_mpeclr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long CLR : 1; + unsigned long : 31; +#else + unsigned long : 31; + unsigned long CLR : 1; +#endif +}; + +union un_mpu_mpeclr +{ + unsigned long LONG; + struct st_mpu_mpeclr_bit BIT; +}; + +struct st_mpu_mpests_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long IMPER : 1; + unsigned long DMPER : 1; + unsigned long DRW : 1; + unsigned long : 29; +#else + unsigned long : 29; + unsigned long DRW : 1; + unsigned long DMPER : 1; + unsigned long IMPER : 1; +#endif +}; + +union un_mpu_mpests +{ + unsigned long LONG; + struct st_mpu_mpests_bit BIT; +}; + +struct st_mpu_mpdea_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long DEA : 32; +#else + unsigned long DEA : 32; +#endif +}; + +union un_mpu_mpdea +{ + unsigned long LONG; + struct st_mpu_mpdea_bit BIT; +}; + +struct st_mpu_mpsa_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long SA : 32; +#else + unsigned long SA : 32; +#endif +}; + +union un_mpu_mpsa +{ + unsigned long LONG; + struct st_mpu_mpsa_bit BIT; +}; + +struct st_mpu_mpops_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned short S : 1; + unsigned short : 15; +#else + unsigned short : 15; + unsigned short S : 1; +#endif +}; + +union un_mpu_mpops +{ + unsigned short WORD; + struct st_mpu_mpops_bit BIT; +}; + +struct st_mpu_mpopi_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned short INV : 1; + unsigned short : 15; +#else + unsigned short : 15; + unsigned short INV : 1; +#endif +}; + +union un_mpu_mpopi +{ + unsigned short WORD; + struct st_mpu_mpopi_bit BIT; +}; + +struct st_mpu_mhiti_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long : 1; + unsigned long UHACI : 3; + unsigned long : 12; + unsigned long HITI : 8; + unsigned long : 8; +#else + unsigned long : 8; + unsigned long HITI : 8; + unsigned long : 12; + unsigned long UHACI : 3; + unsigned long : 1; +#endif +}; + +union un_mpu_mhiti +{ + unsigned long LONG; + struct st_mpu_mhiti_bit BIT; +}; + +struct st_mpu_mhitd_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long : 1; + unsigned long UHACD : 3; + unsigned long : 12; + unsigned long HITD : 8; + unsigned long : 8; +#else + unsigned long : 8; + unsigned long HITD : 8; + unsigned long : 12; + unsigned long UHACD : 3; + unsigned long : 1; +#endif +}; + +union un_mpu_mhitd +{ + unsigned long LONG; + struct st_mpu_mhitd_bit BIT; +}; + +struct st_mmcif_cecmdset_bit +{ + unsigned long :1; + unsigned long BOOT:1; + unsigned long CMD:6; + unsigned long RTYP:2; + unsigned long RBSY:1; + unsigned long :1; + unsigned long WDAT:1; + unsigned long DWEN:1; + unsigned long CMLTE:1; + unsigned long CMD12EN:1; + unsigned long RIDXC:2; + unsigned long RCRC7C:2; + unsigned long :1; + unsigned long CRC16C:1; + unsigned long BOOTACK:1; + unsigned long CRCSTE:1; + unsigned long TBIT:1; + unsigned long OPDM:1; + unsigned long :2; + unsigned long SBIT:1; + unsigned long :1; + unsigned long DATW:2; +}; + +union un_mmcif_cecmdset +{ + unsigned long LONG; + struct st_mmcif_cecmdset_bit BIT; +}; + +union un_mmcif_cearg +{ + unsigned long LONG; +}; + +struct st_mmcif_ceargcmd12_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long C12ARG : 32; +#else + unsigned long C12ARG : 32; +#endif +}; + +union un_mmcif_ceargcmd12 +{ + unsigned long LONG; + struct st_mmcif_ceargcmd12_bit BIT; +}; + +struct st_mmcif_cecmdctrl_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long BREAK : 1; + unsigned long : 31; +#else + unsigned long : 31; + unsigned long BREAK : 1; +#endif +}; + +union un_mmcif_cecmdctrl +{ + unsigned long LONG; + struct st_mmcif_cecmdctrl_bit BIT; +}; + +struct st_mmcif_ceblockset_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long BLKSIZ : 16; + unsigned long BLKCNT : 16; +#else + unsigned long BLKCNT : 16; + unsigned long BLKSIZ : 16; +#endif +}; + +union un_mmcif_ceblockset +{ + unsigned long LONG; + struct st_mmcif_ceblockset_bit BIT; +}; + +struct st_mmcif_ceclkctrl_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long : 4; + unsigned long SRWDTO : 4; + unsigned long SRBSYTO : 4; + unsigned long SRSPTO : 2; + unsigned long : 2; + unsigned long CLKDIV : 4; + unsigned long : 4; + unsigned long CLKEN : 1; + unsigned long : 6; + unsigned long MMCBUSBSY : 1; +#else + unsigned long MMCBUSBSY : 1; + unsigned long : 6; + unsigned long CLKEN : 1; + unsigned long : 4; + unsigned long CLKDIV : 4; + unsigned long : 2; + unsigned long SRSPTO : 2; + unsigned long SRBSYTO : 4; + unsigned long SRWDTO : 4; + unsigned long : 4; +#endif +}; + +union un_mmcif_ceclkctrl +{ + unsigned long LONG; + struct st_mmcif_ceclkctrl_bit BIT; +}; + +struct st_mmcif_cebufacc_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long : 16; + unsigned long ATYP : 1; + unsigned long : 7; + unsigned long DMAREN : 1; + unsigned long DMAWEN : 1; + unsigned long DMATYP : 1; + unsigned long : 5; +#else + unsigned long : 5; + unsigned long DMATYP : 1; + unsigned long DMAWEN : 1; + unsigned long DMAREN : 1; + unsigned long : 7; + unsigned long ATYP : 1; + unsigned long : 16; +#endif +}; + +union un_mmcif_cebufacc +{ + unsigned long LONG; + struct st_mmcif_cebufacc_bit BIT; +}; + +struct st_mmcif_cerespcmd12_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long RSP12 : 32; +#else + unsigned long RSP12 : 32; +#endif +}; + +union un_mmcif_cerespcmd12 +{ + unsigned long LONG; + struct st_mmcif_cerespcmd12_bit BIT; +}; + +struct st_mmcif_cedata_bit +{ + unsigned long DATA:32; +}; + +union un_mmcif_cedata +{ + unsigned long LONG; + struct st_mmcif_cedata_bit BIT; +}; + +struct st_mmcif_ceboot_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long : 16; + unsigned long SBTDATTO : 4; + unsigned long SFSTBTDATTO : 4; + unsigned long SBTACKTO : 4; + unsigned long SBTCLKDIV : 4; +#else + unsigned long SBTCLKDIV : 4; + unsigned long SBTACKTO : 4; + unsigned long SFSTBTDATTO : 4; + unsigned long SBTDATTO : 4; + unsigned long : 16; +#endif +}; + +union un_mmcif_ceboot +{ + unsigned long LONG; + struct st_mmcif_ceboot_bit BIT; +}; + +struct st_mmcif_ceint_bit +{ + unsigned long :5; + unsigned long CMD12DRE:1; + unsigned long CMD12RBE:1; + unsigned long CMD12CRE:1; + unsigned long DTRANE:1; + unsigned long BUFRE:1; + unsigned long BUFWEN:1; + unsigned long BUFREN:1; + unsigned long :2; + unsigned long RBSYE:1; + unsigned long CRSPE:1; + unsigned long CMDVIO:1; + unsigned long BUFVIO:1; + unsigned long :2; + unsigned long WDATERR:1; + unsigned long RDATERR:1; + unsigned long RIDXERR:1; + unsigned long RSPERR:1; + unsigned long :3; + unsigned long CRCSTO:1; + unsigned long WDATTO:1; + unsigned long RDATTO:1; + unsigned long RBSYTO:1; + unsigned long RSPTO:1; +}; + +union un_mmcif_ceint +{ + unsigned long LONG; + struct st_mmcif_ceint_bit BIT; +}; + +struct st_mmcif_ceinten_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long MRSPTO : 1; + unsigned long MRBSYTO : 1; + unsigned long MRDATTO : 1; + unsigned long MWDATTO : 1; + unsigned long MCRCSTO : 1; + unsigned long : 3; + unsigned long MRSPERR : 1; + unsigned long MRIDXERR : 1; + unsigned long MRDATERR : 1; + unsigned long MWDATERR : 1; + unsigned long : 2; + unsigned long MBUFVIO : 1; + unsigned long MCMDVIO : 1; + unsigned long MCRSPE : 1; + unsigned long MRBSYE : 1; + unsigned long : 2; + unsigned long MBUFREN : 1; + unsigned long MBUFWEN : 1; + unsigned long MBUFRE : 1; + unsigned long MDTRANE : 1; + unsigned long MCMD12CRE : 1; + unsigned long MCMD12RBE : 1; + unsigned long MCMD12DRE : 1; + unsigned long : 5; +#else + unsigned long : 5; + unsigned long MCMD12DRE : 1; + unsigned long MCMD12RBE : 1; + unsigned long MCMD12CRE : 1; + unsigned long MDTRANE : 1; + unsigned long MBUFRE : 1; + unsigned long MBUFWEN : 1; + unsigned long MBUFREN : 1; + unsigned long : 2; + unsigned long MRBSYE : 1; + unsigned long MCRSPE : 1; + unsigned long MCMDVIO : 1; + unsigned long MBUFVIO : 1; + unsigned long : 2; + unsigned long MWDATERR : 1; + unsigned long MRDATERR : 1; + unsigned long MRIDXERR : 1; + unsigned long MRSPERR : 1; + unsigned long : 3; + unsigned long MCRCSTO : 1; + unsigned long MWDATTO : 1; + unsigned long MRDATTO : 1; + unsigned long MRBSYTO : 1; + unsigned long MRSPTO : 1; +#endif +}; + +union un_mmcif_ceinten +{ + unsigned long LONG; + struct st_mmcif_ceinten_bit BIT; +}; + +struct st_mmcif_cehoststs1_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long RCVBLK : 16; + unsigned long DATSIG : 8; + unsigned long RSPIDX : 6; + unsigned long CMDSIG : 1; + unsigned long CMDSEQ : 1; +#else + unsigned long CMDSEQ : 1; + unsigned long CMDSIG : 1; + unsigned long RSPIDX : 6; + unsigned long DATSIG : 8; + unsigned long RCVBLK : 16; +#endif +}; + +union un_mmcif_cehoststs1 +{ + unsigned long LONG; + struct st_mmcif_cehoststs1_bit BIT; +}; + +struct st_mmcif_cehoststs2_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long : 5; + unsigned long BTDATTO : 1; + unsigned long FSTBTDATTO : 1; + unsigned long BTACKTO : 1; + unsigned long STRSPTO : 1; + unsigned long AC12RSPTO : 1; + unsigned long RSPBSYTO : 1; + unsigned long AC12BSYTO : 1; + unsigned long CRCSTTO : 1; + unsigned long DATBSYTO : 1; + unsigned long STRDATTO : 1; + unsigned long : 1; + unsigned long CRCST : 3; + unsigned long : 1; + unsigned long BTACKEBE : 1; + unsigned long BTACKPATE : 1; + unsigned long RSPIDXE : 1; + unsigned long AC12IDXE : 1; + unsigned long RSPEBE : 1; + unsigned long AC12REBE : 1; + unsigned long RDATEBE : 1; + unsigned long CRCSTEBE : 1; + unsigned long RSPCRC7E : 1; + unsigned long AC12CRCE : 1; + unsigned long CRC16E : 1; + unsigned long CRCSTE : 1; +#else + unsigned long CRCSTE : 1; + unsigned long CRC16E : 1; + unsigned long AC12CRCE : 1; + unsigned long RSPCRC7E : 1; + unsigned long CRCSTEBE : 1; + unsigned long RDATEBE : 1; + unsigned long AC12REBE : 1; + unsigned long RSPEBE : 1; + unsigned long AC12IDXE : 1; + unsigned long RSPIDXE : 1; + unsigned long BTACKPATE : 1; + unsigned long BTACKEBE : 1; + unsigned long : 1; + unsigned long CRCST : 3; + unsigned long : 1; + unsigned long STRDATTO : 1; + unsigned long DATBSYTO : 1; + unsigned long CRCSTTO : 1; + unsigned long AC12BSYTO : 1; + unsigned long RSPBSYTO : 1; + unsigned long AC12RSPTO : 1; + unsigned long STRSPTO : 1; + unsigned long BTACKTO : 1; + unsigned long FSTBTDATTO : 1; + unsigned long BTDATTO : 1; + unsigned long : 5; +#endif +}; + +union un_mmcif_cehoststs2 +{ + unsigned long LONG; + struct st_mmcif_cehoststs2_bit BIT; +}; + +struct st_mmcif_cedetect_bit +{ + unsigned long :17; + unsigned long CDSIG:1; + unsigned long CDRISE:1; + unsigned long CDFALL:1; + unsigned long :6; + unsigned long MCDRISE:1; + unsigned long MCDFALL:1; + unsigned long :4; +}; + +union un_mmcif_cedetect +{ + unsigned long LONG; + struct st_mmcif_cedetect_bit BIT; +}; + +struct st_mmcif_ceaddmode_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long : 19; + unsigned long CLKMAIN : 1; + unsigned long : 1; + unsigned long RESNOUT : 1; + unsigned long : 10; +#else + unsigned long : 10; + unsigned long RESNOUT : 1; + unsigned long : 1; + unsigned long CLKMAIN : 1; + unsigned long : 19; +#endif +}; + +union un_mmcif_ceaddmode +{ + unsigned long LONG; + struct st_mmcif_ceaddmode_bit BIT; +}; + +struct st_mmcif_ceversion_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long VERSION : 16; + unsigned long : 15; + unsigned long SWRST : 1; +#else + unsigned long SWRST : 1; + unsigned long : 15; + unsigned long VERSION : 16; +#endif +}; + +union un_mmcif_ceversion +{ + unsigned long LONG; + struct st_mmcif_ceversion_bit BIT; +}; + +struct st_glcdc_gr1clut0_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long B : 8; + unsigned long G : 8; + unsigned long R : 8; + unsigned long A : 8; +#else + unsigned long A : 8; + unsigned long R : 8; + unsigned long G : 8; + unsigned long B : 8; +#endif +}; + +union un_glcdc_gr1clut0 +{ + unsigned long LONG; + struct st_glcdc_gr1clut0_bit BIT; +}; + +struct st_glcdc_gr1clut1_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long B : 8; + unsigned long G : 8; + unsigned long R : 8; + unsigned long A : 8; +#else + unsigned long A : 8; + unsigned long R : 8; + unsigned long G : 8; + unsigned long B : 8; +#endif +}; + +union un_glcdc_gr1clut1 +{ + unsigned long LONG; + struct st_glcdc_gr1clut1_bit BIT; +}; + +struct st_glcdc_gr2clut0_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long B : 8; + unsigned long G : 8; + unsigned long R : 8; + unsigned long A : 8; +#else + unsigned long A : 8; + unsigned long R : 8; + unsigned long G : 8; + unsigned long B : 8; +#endif +}; + +union un_glcdc_gr2clut0 +{ + unsigned long LONG; + struct st_glcdc_gr2clut0_bit BIT; +}; + +struct st_glcdc_gr2clut1_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long B : 8; + unsigned long G : 8; + unsigned long R : 8; + unsigned long A : 8; +#else + unsigned long A : 8; + unsigned long R : 8; + unsigned long G : 8; + unsigned long B : 8; +#endif +}; + +union un_glcdc_gr2clut1 +{ + unsigned long LONG; + struct st_glcdc_gr2clut1_bit BIT; +}; + +struct st_glcdc_bgen_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long EN : 1; + unsigned long : 7; + unsigned long VEN : 1; + unsigned long : 7; + unsigned long SWRST : 1; + unsigned long : 15; +#else + unsigned long : 15; + unsigned long SWRST : 1; + unsigned long : 7; + unsigned long VEN : 1; + unsigned long : 7; + unsigned long EN : 1; +#endif +}; + +union un_glcdc_bgen +{ + unsigned long LONG; + struct st_glcdc_bgen_bit BIT; +}; + +struct st_glcdc_bgperi_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long FH : 11; + unsigned long : 5; + unsigned long FV : 11; + unsigned long : 5; +#else + unsigned long : 5; + unsigned long FV : 11; + unsigned long : 5; + unsigned long FH : 11; +#endif +}; + +union un_glcdc_bgperi +{ + unsigned long LONG; + struct st_glcdc_bgperi_bit BIT; +}; + +struct st_glcdc_bgsync_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long HP : 4; + unsigned long : 12; + unsigned long VP : 4; + unsigned long : 12; +#else + unsigned long : 12; + unsigned long VP : 4; + unsigned long : 12; + unsigned long HP : 4; +#endif +}; + +union un_glcdc_bgsync +{ + unsigned long LONG; + struct st_glcdc_bgsync_bit BIT; +}; + +struct st_glcdc_bgvsize_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long VW : 11; + unsigned long : 5; + unsigned long VP : 11; + unsigned long : 5; +#else + unsigned long : 5; + unsigned long VP : 11; + unsigned long : 5; + unsigned long VW : 11; +#endif +}; + +union un_glcdc_bgvsize +{ + unsigned long LONG; + struct st_glcdc_bgvsize_bit BIT; +}; + +struct st_glcdc_bghsize_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long HW : 11; + unsigned long : 5; + unsigned long HP : 11; + unsigned long : 5; +#else + unsigned long : 5; + unsigned long HP : 11; + unsigned long : 5; + unsigned long HW : 11; +#endif +}; + +union un_glcdc_bghsize +{ + unsigned long LONG; + struct st_glcdc_bghsize_bit BIT; +}; + +struct st_glcdc_bgcolor_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long B : 8; + unsigned long G : 8; + unsigned long R : 8; + unsigned long : 8; +#else + unsigned long : 8; + unsigned long R : 8; + unsigned long G : 8; + unsigned long B : 8; +#endif +}; + +union un_glcdc_bgcolor +{ + unsigned long LONG; + struct st_glcdc_bgcolor_bit BIT; +}; + +struct st_glcdc_bgmon_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long EN : 1; + unsigned long : 7; + unsigned long VEN : 1; + unsigned long : 7; + unsigned long SWRST : 1; + unsigned long : 15; +#else + unsigned long : 15; + unsigned long SWRST : 1; + unsigned long : 7; + unsigned long VEN : 1; + unsigned long : 7; + unsigned long EN : 1; +#endif +}; + +union un_glcdc_bgmon +{ + unsigned long LONG; + struct st_glcdc_bgmon_bit BIT; +}; + +struct st_glcdc_gr1ven_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long VEN : 1; + unsigned long : 31; +#else + unsigned long : 31; + unsigned long VEN : 1; +#endif +}; + +union un_glcdc_gr1ven +{ + unsigned long LONG; + struct st_glcdc_gr1ven_bit BIT; +}; + +struct st_glcdc_grlflmrd_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long RENB : 1; + unsigned long : 31; +#else + unsigned long : 31; + unsigned long RENB : 1; +#endif +}; + +union un_glcdc_grlflmrd +{ + unsigned long LONG; + struct st_glcdc_grlflmrd_bit BIT; +}; + +struct st_glcdc_grlflm3_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long : 16; + unsigned long LNOFF : 16; +#else + unsigned long LNOFF : 16; + unsigned long : 16; +#endif +}; + +union un_glcdc_gr1flm3 +{ + unsigned long LONG; + struct st_glcdc_grlflm3_bit BIT; +}; + +struct st_glcdc_grlflm5_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long DATANUM : 16; + unsigned long LNNUM : 11; + unsigned long : 5; +#else + unsigned long : 5; + unsigned long LNNUM : 11; + unsigned long DATANUM : 16; +#endif +}; + +union un_glcdc_gr1flm5 +{ + unsigned long LONG; + struct st_glcdc_grlflm5_bit BIT; +}; + +struct st_glcdc_grlflm6_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long : 28; + unsigned long FORMAT : 3; + unsigned long : 1; +#else + unsigned long : 1; + unsigned long FORMAT : 3; + unsigned long : 28; +#endif +}; + +union un_glcdc_gr1flm6 +{ + unsigned long LONG; + struct st_glcdc_grlflm6_bit BIT; +}; + +struct st_glcdc_gr1ab1_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long DISPSEL : 2; + unsigned long : 2; + unsigned long GRCDISPON : 1; + unsigned long : 3; + unsigned long ARCDISPON : 1; + unsigned long : 3; + unsigned long ARCON : 1; + unsigned long : 19; +#else + unsigned long : 19; + unsigned long ARCON : 1; + unsigned long : 3; + unsigned long ARCDISPON : 1; + unsigned long : 3; + unsigned long GRCDISPON : 1; + unsigned long : 2; + unsigned long DISPSEL : 2; +#endif +}; + +union un_glcdc_gr1ab1 +{ + unsigned long LONG; + struct st_glcdc_gr1ab1_bit BIT; +}; + +struct st_glcdc_gr1ab2_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long GRCVW : 11; + unsigned long : 5; + unsigned long GRCVS : 11; + unsigned long : 5; +#else + unsigned long : 5; + unsigned long GRCVS : 11; + unsigned long : 5; + unsigned long GRCVW : 11; +#endif +}; +union un_glcdc_gr1ab2 +{ + unsigned long LONG; + struct st_glcdc_gr1ab2_bit BIT; +}; + +struct st_glcdc_gr1ab3_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long GRCHW : 11; + unsigned long : 5; + unsigned long GRCHS : 11; + unsigned long : 5; +#else + unsigned long : 5; + unsigned long GRCHS : 11; + unsigned long : 5; + unsigned long GRCHW : 11; +#endif +}; + +union un_glcdc_gr1ab3 +{ + unsigned long LONG; + struct st_glcdc_gr1ab3_bit BIT; +}; + +struct st_glcdc_gr1ab4_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long ARCVW : 11; + unsigned long : 5; + unsigned long ARCVS : 11; + unsigned long : 5; +#else + unsigned long : 5; + unsigned long ARCVS : 11; + unsigned long : 5; + unsigned long ARCVW : 11; +#endif +}; + +union un_glcdc_gr1ab4 +{ + unsigned long LONG; + struct st_glcdc_gr1ab4_bit BIT; +}; + +struct st_glcdc_gr1ab5_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long ARCHW : 11; + unsigned long : 5; + unsigned long ARCHS : 11; + unsigned long : 5; +#else + unsigned long : 5; + unsigned long ARCHS : 11; + unsigned long : 5; + unsigned long ARCHW : 11; +#endif +}; + +union un_glcdc_gr1ab5 +{ + unsigned long LONG; + struct st_glcdc_gr1ab5_bit BIT; +}; + +struct st_glcdc_gr1ab6_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long ARCRATE : 8; + unsigned long : 8; + unsigned long ARCCOEF : 9; + unsigned long : 7; +#else + unsigned long : 7; + unsigned long ARCCOEF : 9; + unsigned long : 8; + unsigned long ARCRATE : 8; +#endif +}; + +union un_glcdc_gr1ab6 +{ + unsigned long LONG; + struct st_glcdc_gr1ab6_bit BIT; +}; + +struct st_glcdc_gr1ab7_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long CKON : 1; + unsigned long : 15; + unsigned long ARCDEF : 8; + unsigned long : 8; +#else + unsigned long : 8; + unsigned long ARCDEF : 8; + unsigned long : 15; + unsigned long CKON : 1; +#endif +}; + +union un_glcdc_gr1ab7 +{ + unsigned long LONG; + struct st_glcdc_gr1ab7_bit BIT; +}; + +struct st_glcdc_gr1ab8_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long CKKR : 8; + unsigned long CKKB : 8; + unsigned long CKKG : 8; + unsigned long : 8; +#else + unsigned long : 8; + unsigned long CKKG : 8; + unsigned long CKKB : 8; + unsigned long CKKR : 8; +#endif +}; + +union un_glcdc_gr1ab8 +{ + unsigned long LONG; + struct st_glcdc_gr1ab8_bit BIT; +}; + +struct st_glcdc_gr1ab9_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long CKR : 8; + unsigned long CKB : 8; + unsigned long CKG : 8; + unsigned long CKA : 8; +#else + unsigned long CKA : 8; + unsigned long CKG : 8; + unsigned long CKB : 8; + unsigned long CKR : 8; +#endif +}; + +union un_glcdc_gr1ab9 +{ + unsigned long LONG; + struct st_glcdc_gr1ab9_bit BIT; +}; + +struct st_glcdc_gr1base_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long R : 8; + unsigned long B : 8; + unsigned long G : 8; + unsigned long : 8; +#else + unsigned long : 8; + unsigned long G : 8; + unsigned long B : 8; + unsigned long R : 8; +#endif +}; + +union un_glcdc_gr1base +{ + unsigned long LONG; + struct st_glcdc_gr1base_bit BIT; +}; + +struct st_glcdc_gr1clutint_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long LINE : 11; + unsigned long : 5; + unsigned long SEL : 1; + unsigned long : 15; +#else + unsigned long : 15; + unsigned long SEL : 1; + unsigned long : 5; + unsigned long LINE : 11; +#endif +}; + +union un_glcdc_gr1clutint +{ + unsigned long LONG; + struct st_glcdc_gr1clutint_bit BIT; +}; + +struct st_glcdc_gr1mon_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long ARCST : 1; + unsigned long : 15; + unsigned long UFST : 1; + unsigned long : 15; +#else + unsigned long : 15; + unsigned long UFST : 1; + unsigned long : 15; + unsigned long ARCST : 1; +#endif +}; + +union un_glcdc_gr1mon +{ + unsigned long LONG; + struct st_glcdc_gr1mon_bit BIT; +}; + +struct st_glcdc_gr2ven_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long VEN : 1; + unsigned long : 31; +#else + unsigned long : 31; + unsigned long VEN : 1; +#endif +}; + +union un_glcdc_gr2ven +{ + unsigned long LONG; + struct st_glcdc_gr2ven_bit BIT; +}; + +struct st_glcdc_gr2flmrd_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long RENB : 1; + unsigned long : 31; +#else + unsigned long : 31; + unsigned long RENB : 1; +#endif +}; + +union un_glcdc_gr2flmrd +{ + unsigned long LONG; + struct st_glcdc_gr2flmrd_bit BIT; +}; + +struct st_glcdc_gr2flm3_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long : 16; + unsigned long LNOFF : 16; +#else + unsigned long LNOFF : 16; + unsigned long : 16; +#endif +}; + +union un_glcdc_gr2flm3 +{ + unsigned long LONG; + struct st_glcdc_gr2flm3_bit BIT; +}; + +struct st_glcdc_gr2flm5_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long DATANUM : 16; + unsigned long LNNUM : 11; + unsigned long : 5; +#else + unsigned long : 5; + unsigned long LNNUM : 11; + unsigned long DATANUM : 16; +#endif +}; + +union un_glcdc_gr2flm5 +{ + unsigned long LONG; + struct st_glcdc_gr2flm5_bit BIT; +}; + +struct st_glcdc_gr2flm6_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long : 28; + unsigned long FORMAT : 3; + unsigned long : 1; +#else + unsigned long : 1; + unsigned long FORMAT : 3; + unsigned long : 28; +#endif +}; + +union un_glcdc_gr2flm6 +{ + unsigned long LONG; + struct st_glcdc_gr2flm6_bit BIT; +}; + +struct st_glcdc_gr2ab1_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long DISPSEL : 2; + unsigned long : 2; + unsigned long GRCDISPON : 1; + unsigned long : 3; + unsigned long ARCDISPON : 1; + unsigned long : 3; + unsigned long ARCON : 1; + unsigned long : 19; +#else + unsigned long : 19; + unsigned long ARCON : 1; + unsigned long : 3; + unsigned long ARCDISPON : 1; + unsigned long : 3; + unsigned long GRCDISPON : 1; + unsigned long : 2; + unsigned long DISPSEL : 2; +#endif +}; + +union un_glcdc_gr2ab1 +{ + unsigned long LONG; + struct st_glcdc_gr2ab1_bit BIT; +}; + +struct st_glcdc_gr2ab2_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long GRCVW : 11; + unsigned long : 5; + unsigned long GRCVS : 11; + unsigned long : 5; +#else + unsigned long : 5; + unsigned long GRCVS : 11; + unsigned long : 5; + unsigned long GRCVW : 11; +#endif +}; + +union un_glcdc_gr2ab2 +{ + unsigned long LONG; + struct st_glcdc_gr2ab2_bit BIT; +}; + +struct st_glcdc_gr2ab3_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long GRCHW : 11; + unsigned long : 5; + unsigned long GRCHS : 11; + unsigned long : 5; +#else + unsigned long : 5; + unsigned long GRCHS : 11; + unsigned long : 5; + unsigned long GRCHW : 11; +#endif +}; + +union un_glcdc_gr2ab3 +{ + unsigned long LONG; + struct st_glcdc_gr2ab3_bit BIT; +}; + +struct st_glcdc_gr2ab4_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long ARCVW : 11; + unsigned long : 5; + unsigned long ARCVS : 11; + unsigned long : 5; +#else + unsigned long : 5; + unsigned long ARCVS : 11; + unsigned long : 5; + unsigned long ARCVW : 11; +#endif +}; + +union un_glcdc_gr2ab4 +{ + unsigned long LONG; + struct st_glcdc_gr2ab4_bit BIT; +}; + +struct st_glcdc_gr2ab5_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long ARCHW : 11; + unsigned long : 5; + unsigned long ARCHS : 11; + unsigned long : 5; +#else + unsigned long : 5; + unsigned long ARCHS : 11; + unsigned long : 5; + unsigned long ARCHW : 11; +#endif +}; + +union un_glcdc_gr2ab5 +{ + unsigned long LONG; + struct st_glcdc_gr2ab5_bit BIT; +}; + +struct st_glcdc_gr2ab6_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long ARCRATE : 8; + unsigned long : 8; + unsigned long ARCCOEF : 9; + unsigned long : 7; +#else + unsigned long : 7; + unsigned long ARCCOEF : 9; + unsigned long : 8; + unsigned long ARCRATE : 8; +#endif +}; + +union un_glcdc_gr2ab6 +{ + unsigned long LONG; + struct st_glcdc_gr2ab6_bit BIT; +}; + +struct st_glcdc_gr2ab7_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long CKON : 1; + unsigned long : 15; + unsigned long ARCDEF : 8; + unsigned long : 8; +#else + unsigned long : 8; + unsigned long ARCDEF : 8; + unsigned long : 15; + unsigned long CKON : 1; +#endif +}; + +union un_glcdc_gr2ab7 +{ + unsigned long LONG; + struct st_glcdc_gr2ab7_bit BIT; +}; + +struct st_glcdc_gr2ab8_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long CKKR : 8; + unsigned long CKKB : 8; + unsigned long CKKG : 8; + unsigned long : 8; +#else + unsigned long : 8; + unsigned long CKKG : 8; + unsigned long CKKB : 8; + unsigned long CKKR : 8; +#endif +}; + +union un_glcdc_gr2ab8 +{ + unsigned long LONG; + struct st_glcdc_gr2ab8_bit BIT; +}; + +struct st_glcdc_gr2ab9_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long CKR : 8; + unsigned long CKB : 8; + unsigned long CKG : 8; + unsigned long CKA : 8; +#else + unsigned long CKA : 8; + unsigned long CKG : 8; + unsigned long CKB : 8; + unsigned long CKR : 8; +#endif +}; + +union un_glcdc_gr2ab9 +{ + unsigned long LONG; + struct st_glcdc_gr2ab9_bit BIT; +}; + +struct st_glcdc_gr2base_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long R : 8; + unsigned long B : 8; + unsigned long G : 8; + unsigned long : 8; +#else + unsigned long : 8; + unsigned long G : 8; + unsigned long B : 8; + unsigned long R : 8; +#endif +}; + +union un_glcdc_gr2base +{ + unsigned long LONG; + struct st_glcdc_gr2base_bit BIT; +}; + +struct st_glcdc_gr2clutint_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long LINE : 11; + unsigned long : 5; + unsigned long SEL : 1; + unsigned long : 15; +#else + unsigned long : 15; + unsigned long SEL : 1; + unsigned long : 5; + unsigned long LINE : 11; +#endif +}; + +union un_glcdc_gr2clutint +{ + unsigned long LONG; + struct st_glcdc_gr2clutint_bit BIT; +}; + +struct st_glcdc_gr2mon_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long ARCST : 1; + unsigned long : 15; + unsigned long UFST : 1; + unsigned long : 15; +#else + unsigned long : 15; + unsigned long UFST : 1; + unsigned long : 15; + unsigned long ARCST : 1; +#endif +}; + +union un_glcdc_gr2mon +{ + unsigned long LONG; + struct st_glcdc_gr2mon_bit BIT; +}; + +struct st_glcdc_gamgven_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long VEN : 1; + unsigned long : 31; +#else + unsigned long : 31; + unsigned long VEN : 1; +#endif +}; + +union un_glcdc_gamgven +{ + unsigned long LONG; + struct st_glcdc_gamgven_bit BIT; +}; + +struct st_glcdc_gamsw_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long GAMON : 1; + unsigned long : 31; +#else + unsigned long : 31; + unsigned long GAMON : 1; +#endif +}; + +union un_glcdc_gamsw +{ + unsigned long LONG; + struct st_glcdc_gamsw_bit BIT; +}; + +struct st_glcdc_gamglut1_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long GAIN01 : 11; + unsigned long : 5; + unsigned long GAIN00 : 11; + unsigned long : 5; +#else + unsigned long : 5; + unsigned long GAIN00 : 11; + unsigned long : 5; + unsigned long GAIN01 : 11; +#endif +}; + +union un_glcdc_gamglut1 +{ + unsigned long LONG; + struct st_glcdc_gamglut1_bit BIT; +}; + +struct st_glcdc_gamglut2_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long GAIN03 : 11; + unsigned long : 5; + unsigned long GAIN02 : 11; + unsigned long : 5; +#else + unsigned long : 5; + unsigned long GAIN02 : 11; + unsigned long : 5; + unsigned long GAIN03 : 11; +#endif +}; + +union un_glcdc_gamglut2 +{ + unsigned long LONG; + struct st_glcdc_gamglut2_bit BIT; +}; + +struct st_glcdc_gamglut3_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long GAIN05 : 11; + unsigned long : 5; + unsigned long GAIN04 : 11; + unsigned long : 5; +#else + unsigned long : 5; + unsigned long GAIN04 : 11; + unsigned long : 5; + unsigned long GAIN05 : 11; +#endif +}; + +union un_glcdc_gamglut3 +{ + unsigned long LONG; + struct st_glcdc_gamglut3_bit BIT; +}; + +struct st_glcdc_gamglut4_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long GAIN07 : 11; + unsigned long : 5; + unsigned long GAIN06 : 11; + unsigned long : 5; +#else + unsigned long : 5; + unsigned long GAIN06 : 11; + unsigned long : 5; + unsigned long GAIN07 : 11; +#endif +}; + +union un_glcdc_gamglut4 +{ + unsigned long LONG; + struct st_glcdc_gamglut4_bit BIT; +}; + +struct st_glcdc_gamglut5_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long GAIN09 : 11; + unsigned long : 5; + unsigned long GAIN08 : 11; + unsigned long : 5; +#else + unsigned long : 5; + unsigned long GAIN08 : 11; + unsigned long : 5; + unsigned long GAIN09 : 11; +#endif +}; + +union un_glcdc_gamglut5 +{ + unsigned long LONG; + struct st_glcdc_gamglut5_bit BIT; +}; + +struct st_glcdc_gamglut6_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long GAIN11 : 11; + unsigned long : 5; + unsigned long GAIN10 : 11; + unsigned long : 5; +#else + unsigned long : 5; + unsigned long GAIN10 : 11; + unsigned long : 5; + unsigned long GAIN11 : 11; +#endif +}; + +union un_glcdc_gamglut6 +{ + unsigned long LONG; + struct st_glcdc_gamglut6_bit BIT; +}; + +struct st_glcdc_gamglut7_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long GAIN13 : 11; + unsigned long : 5; + unsigned long GAIN12 : 11; + unsigned long : 5; +#else + unsigned long : 5; + unsigned long GAIN12 : 11; + unsigned long : 5; + unsigned long GAIN13 : 11; +#endif +}; + +union un_glcdc_gamglut7 +{ + unsigned long LONG; + struct st_glcdc_gamglut7_bit BIT; +}; + +struct st_glcdc_gamglut8_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long GAIN15 : 11; + unsigned long : 5; + unsigned long GAIN14 : 11; + unsigned long : 5; +#else + unsigned long : 5; + unsigned long GAIN14 : 11; + unsigned long : 5; + unsigned long GAIN15 : 11; +#endif +}; + +union un_glcdc_gamglut8 +{ + unsigned long LONG; + struct st_glcdc_gamglut8_bit BIT; +}; + +struct st_glcdc_gamgarea1_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long TH03 : 10; + unsigned long TH02 : 10; + unsigned long TH01 : 10; + unsigned long : 2; +#else + unsigned long : 2; + unsigned long TH01 : 10; + unsigned long TH02 : 10; + unsigned long TH03 : 10; +#endif +}; + +union un_glcdc_gamgarea1 +{ + unsigned long LONG; + struct st_glcdc_gamgarea1_bit BIT; +}; + +struct st_glcdc_gamgarea2_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long TH06 : 10; + unsigned long TH05 : 10; + unsigned long TH04 : 10; + unsigned long : 2; +#else + unsigned long : 2; + unsigned long TH04 : 10; + unsigned long TH05 : 10; + unsigned long TH06 : 10; +#endif +}; + +union un_glcdc_gamgarea2 +{ + unsigned long LONG; + struct st_glcdc_gamgarea2_bit BIT; +}; + +struct st_glcdc_gamgarea3_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long TH09 : 10; + unsigned long TH08 : 10; + unsigned long TH07 : 10; + unsigned long : 2; +#else + unsigned long : 2; + unsigned long TH07 : 10; + unsigned long TH08 : 10; + unsigned long TH09 : 10; +#endif +}; + +union un_glcdc_gamgarea3 +{ + unsigned long LONG; + struct st_glcdc_gamgarea3_bit BIT; +}; + +struct st_glcdc_gamgarea4_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long TH12 : 10; + unsigned long TH11 : 10; + unsigned long TH10 : 10; + unsigned long : 2; +#else + unsigned long : 2; + unsigned long TH10 : 10; + unsigned long TH11 : 10; + unsigned long TH12 : 10; +#endif +}; + +union un_glcdc_gamgarea4 +{ + unsigned long LONG; + struct st_glcdc_gamgarea4_bit BIT; +}; + +struct st_glcdc_gamgarea5_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long TH15 : 10; + unsigned long TH14 : 10; + unsigned long TH13 : 10; + unsigned long : 2; +#else + unsigned long : 2; + unsigned long TH13 : 10; + unsigned long TH14 : 10; + unsigned long TH15 : 10; +#endif +}; + +union un_glcdc_gamgarea5 +{ + unsigned long LONG; + struct st_glcdc_gamgarea5_bit BIT; +}; + +struct st_glcdc_gambven_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long VEN : 1; + unsigned long : 31; +#else + unsigned long : 31; + unsigned long VEN : 1; +#endif +}; + +union un_glcdc_gambven +{ + unsigned long LONG; + struct st_glcdc_gambven_bit BIT; +}; + +struct st_glcdc_gamblut1_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long GAIN01 : 11; + unsigned long : 5; + unsigned long GAIN00 : 11; + unsigned long : 5; +#else + unsigned long : 5; + unsigned long GAIN00 : 11; + unsigned long : 5; + unsigned long GAIN01 : 11; +#endif +}; + +union un_glcdc_gamblut1 +{ + unsigned long LONG; + struct st_glcdc_gamblut1_bit BIT; +}; + +struct st_glcdc_gamblut2_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long GAIN03 : 11; + unsigned long : 5; + unsigned long GAIN02 : 11; + unsigned long : 5; +#else + unsigned long : 5; + unsigned long GAIN02 : 11; + unsigned long : 5; + unsigned long GAIN03 : 11; +#endif +}; + +union un_glcdc_gamblut2 +{ + unsigned long LONG; + struct st_glcdc_gamblut2_bit BIT; +}; + +struct st_glcdc_gamblut3_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long GAIN05 : 11; + unsigned long : 5; + unsigned long GAIN04 : 11; + unsigned long : 5; +#else + unsigned long : 5; + unsigned long GAIN04 : 11; + unsigned long : 5; + unsigned long GAIN05 : 11; +#endif +}; + +union un_glcdc_gamblut3 +{ + unsigned long LONG; + struct st_glcdc_gamblut3_bit BIT; +}; + +struct st_glcdc_gamblut4_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long GAIN07 : 11; + unsigned long : 5; + unsigned long GAIN06 : 11; + unsigned long : 5; +#else + unsigned long : 5; + unsigned long GAIN06 : 11; + unsigned long : 5; + unsigned long GAIN07 : 11; +#endif +}; + +union un_glcdc_gamblut4 +{ + unsigned long LONG; + struct st_glcdc_gamblut4_bit BIT; +}; + +struct st_glcdc_gamblut5_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long GAIN09 : 11; + unsigned long : 5; + unsigned long GAIN08 : 11; + unsigned long : 5; +#else + unsigned long : 5; + unsigned long GAIN08 : 11; + unsigned long : 5; + unsigned long GAIN09 : 11; +#endif +}; + +union un_glcdc_gamblut5 +{ + unsigned long LONG; + struct st_glcdc_gamblut5_bit BIT; +}; + +struct st_glcdc_gamblut6_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long GAIN11 : 11; + unsigned long : 5; + unsigned long GAIN10 : 11; + unsigned long : 5; +#else + unsigned long : 5; + unsigned long GAIN10 : 11; + unsigned long : 5; + unsigned long GAIN11 : 11; +#endif +}; + +union un_glcdc_gamblut6 +{ + unsigned long LONG; + struct st_glcdc_gamblut6_bit BIT; +}; + +struct st_glcdc_gamblut7_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long GAIN13 : 11; + unsigned long : 5; + unsigned long GAIN12 : 11; + unsigned long : 5; +#else + unsigned long : 5; + unsigned long GAIN12 : 11; + unsigned long : 5; + unsigned long GAIN13 : 11; +#endif +}; + +union un_glcdc_gamblut7 +{ + unsigned long LONG; + struct st_glcdc_gamblut7_bit BIT; +}; + +struct st_glcdc_gamblut8_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long GAIN15 : 11; + unsigned long : 5; + unsigned long GAIN14 : 11; + unsigned long : 5; +#else + unsigned long : 5; + unsigned long GAIN14 : 11; + unsigned long : 5; + unsigned long GAIN15 : 11; +#endif +}; + +union un_glcdc_gamblut8 +{ + unsigned long LONG; + struct st_glcdc_gamblut8_bit BIT; +}; + +struct st_glcdc_gambarea1_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long TH03 : 10; + unsigned long TH02 : 10; + unsigned long TH01 : 10; + unsigned long : 2; +#else + unsigned long : 2; + unsigned long TH01 : 10; + unsigned long TH02 : 10; + unsigned long TH03 : 10; +#endif +}; + +union un_glcdc_gambarea1 +{ + unsigned long LONG; + struct st_glcdc_gambarea1_bit BIT; +}; + +struct st_glcdc_gambarea2_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long TH06 : 10; + unsigned long TH05 : 10; + unsigned long TH04 : 10; + unsigned long : 2; +#else + unsigned long : 2; + unsigned long TH04 : 10; + unsigned long TH05 : 10; + unsigned long TH06 : 10; +#endif +}; + +union un_glcdc_gambarea2 +{ + unsigned long LONG; + struct st_glcdc_gambarea2_bit BIT; +}; + +struct st_glcdc_gambarea3_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long TH09 : 10; + unsigned long TH08 : 10; + unsigned long TH07 : 10; + unsigned long : 2; +#else + unsigned long : 2; + unsigned long TH07 : 10; + unsigned long TH08 : 10; + unsigned long TH09 : 10; +#endif +}; + +union un_glcdc_gambarea3 +{ + unsigned long LONG; + struct st_glcdc_gambarea3_bit BIT; +}; + +struct st_glcdc_gambarea4_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long TH12 : 10; + unsigned long TH11 : 10; + unsigned long TH10 : 10; + unsigned long : 2; +#else + unsigned long : 2; + unsigned long TH10 : 10; + unsigned long TH11 : 10; + unsigned long TH12 : 10; +#endif +}; + +union un_glcdc_gambarea4 +{ + unsigned long LONG; + struct st_glcdc_gambarea4_bit BIT; +}; + +struct st_glcdc_gambarea5_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long TH15 : 10; + unsigned long TH14 : 10; + unsigned long TH13 : 10; + unsigned long : 2; +#else + unsigned long : 2; + unsigned long TH13 : 10; + unsigned long TH14 : 10; + unsigned long TH15 : 10; +#endif +}; + +union un_glcdc_gambarea5 +{ + unsigned long LONG; + struct st_glcdc_gambarea5_bit BIT; +}; + +struct st_glcdc_gamrven_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long VEN : 1; + unsigned long : 31; +#else + unsigned long : 31; + unsigned long VEN : 1; +#endif +}; + +union un_glcdc_gamrven +{ + unsigned long LONG; + struct st_glcdc_gamrven_bit BIT; +}; + +struct st_glcdc_gamrlut1_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long GAIN01 : 11; + unsigned long : 5; + unsigned long GAIN00 : 11; + unsigned long : 5; +#else + unsigned long : 5; + unsigned long GAIN00 : 11; + unsigned long : 5; + unsigned long GAIN01 : 11; +#endif +}; + +union un_glcdc_gamrlut1 +{ + unsigned long LONG; + struct st_glcdc_gamrlut1_bit BIT; +}; + +struct st_glcdc_gamrlut2_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long GAIN03 : 11; + unsigned long : 5; + unsigned long GAIN02 : 11; + unsigned long : 5; +#else + unsigned long : 5; + unsigned long GAIN02 : 11; + unsigned long : 5; + unsigned long GAIN03 : 11; +#endif +}; + +union un_glcdc_gamrlut2 +{ + unsigned long LONG; + struct st_glcdc_gamrlut2_bit BIT; +}; +struct st_glcdc_gamrlut3_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long GAIN05 : 11; + unsigned long : 5; + unsigned long GAIN04 : 11; + unsigned long : 5; +#else + unsigned long : 5; + unsigned long GAIN04 : 11; + unsigned long : 5; + unsigned long GAIN05 : 11; +#endif +}; + +union un_glcdc_gamrlut3 +{ + unsigned long LONG; + struct st_glcdc_gamrlut3_bit BIT; +}; + +struct st_glcdc_gamrlut4_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long GAIN07 : 11; + unsigned long : 5; + unsigned long GAIN06 : 11; + unsigned long : 5; +#else + unsigned long : 5; + unsigned long GAIN06 : 11; + unsigned long : 5; + unsigned long GAIN07 : 11; +#endif +}; + +union un_glcdc_gamrlut4 +{ + unsigned long LONG; + struct st_glcdc_gamrlut4_bit BIT; +}; +struct st_glcdc_gamrlut5_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long GAIN09 : 11; + unsigned long : 5; + unsigned long GAIN08 : 11; + unsigned long : 5; +#else + unsigned long : 5; + unsigned long GAIN08 : 11; + unsigned long : 5; + unsigned long GAIN09 : 11; +#endif +}; + +union un_glcdc_gamrlut5 +{ + unsigned long LONG; + struct st_glcdc_gamrlut5_bit BIT; +}; + +struct st_glcdc_gamrlut6_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long GAIN11 : 11; + unsigned long : 5; + unsigned long GAIN10 : 11; + unsigned long : 5; +#else + unsigned long : 5; + unsigned long GAIN10 : 11; + unsigned long : 5; + unsigned long GAIN11 : 11; +#endif +}; + +union un_glcdc_gamrlut6 +{ + unsigned long LONG; + struct st_glcdc_gamrlut6_bit BIT; +}; + +struct st_glcdc_gamrlut7_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long GAIN13 : 11; + unsigned long : 5; + unsigned long GAIN12 : 11; + unsigned long : 5; +#else + unsigned long : 5; + unsigned long GAIN12 : 11; + unsigned long : 5; + unsigned long GAIN13 : 11; +#endif +}; + +union un_glcdc_gamrlut7 +{ + unsigned long LONG; + struct st_glcdc_gamrlut7_bit BIT; +}; + +struct st_glcdc_gamrlut8_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long GAIN15 : 11; + unsigned long : 5; + unsigned long GAIN14 : 11; + unsigned long : 5; +#else + unsigned long : 5; + unsigned long GAIN14 : 11; + unsigned long : 5; + unsigned long GAIN15 : 11; +#endif +}; + +union un_glcdc_gamrlut8 +{ + unsigned long LONG; + struct st_glcdc_gamrlut8_bit BIT; +}; + +struct st_glcdc_gamrarea1_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long TH03 : 10; + unsigned long TH02 : 10; + unsigned long TH01 : 10; + unsigned long : 2; +#else + unsigned long : 2; + unsigned long TH01 : 10; + unsigned long TH02 : 10; + unsigned long TH03 : 10; +#endif +}; + +union un_glcdc_gamrarea1 +{ + unsigned long LONG; + struct st_glcdc_gamrarea1_bit BIT; +}; + +struct st_glcdc_gamrarea2_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long TH06 : 10; + unsigned long TH05 : 10; + unsigned long TH04 : 10; + unsigned long : 2; +#else + unsigned long : 2; + unsigned long TH04 : 10; + unsigned long TH05 : 10; + unsigned long TH06 : 10; +#endif +}; + +union un_glcdc_gamrarea2 +{ + unsigned long LONG; + struct st_glcdc_gamrarea2_bit BIT; +}; + +struct st_glcdc_gamrarea3_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long TH09 : 10; + unsigned long TH08 : 10; + unsigned long TH07 : 10; + unsigned long : 2; +#else + unsigned long : 2; + unsigned long TH07 : 10; + unsigned long TH08 : 10; + unsigned long TH09 : 10; +#endif +}; + +union un_glcdc_gamrarea3 +{ + unsigned long LONG; + struct st_glcdc_gamrarea3_bit BIT; +}; + +struct st_glcdc_gamrarea4_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long TH12 : 10; + unsigned long TH11 : 10; + unsigned long TH10 : 10; + unsigned long : 2; +#else + unsigned long : 2; + unsigned long TH10 : 10; + unsigned long TH11 : 10; + unsigned long TH12 : 10; +#endif +}; + +union un_glcdc_gamrarea4 +{ + unsigned long LONG; + struct st_glcdc_gamrarea4_bit BIT; +}; + +struct st_glcdc_gamrarea5_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long TH15 : 10; + unsigned long TH14 : 10; + unsigned long TH13 : 10; + unsigned long : 2; +#else + unsigned long : 2; + unsigned long TH13 : 10; + unsigned long TH14 : 10; + unsigned long TH15 : 10; +#endif +}; + +union un_glcdc_gamrarea5 +{ + unsigned long LONG; + struct st_glcdc_gamrarea5_bit BIT; +}; + +struct st_glcdc_outven_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long VEN : 1; + unsigned long : 31; +#else + unsigned long : 31; + unsigned long VEN : 1; +#endif +}; + +union un_glcdc_outven +{ + unsigned long LONG; + struct st_glcdc_outven_bit BIT; +}; + +struct st_glcdc_outset_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long PHASE : 2; + unsigned long : 2; + unsigned long DIRSEL : 1; + unsigned long : 4; + unsigned long FRQSEL : 1; + unsigned long : 2; + unsigned long FORMAT : 2; + unsigned long : 10; + unsigned long SWAPON : 1; + unsigned long : 3; + unsigned long ENDIANON : 1; + unsigned long : 3; +#else + unsigned long : 3; + unsigned long ENDIANON : 1; + unsigned long : 3; + unsigned long SWAPON : 1; + unsigned long : 10; + unsigned long FORMAT : 2; + unsigned long : 2; + unsigned long FRQSEL : 1; + unsigned long : 4; + unsigned long DIRSEL : 1; + unsigned long : 2; + unsigned long PHASE : 2; +#endif +}; + +union un_glcdc_outset +{ + unsigned long LONG; + struct st_glcdc_outset_bit BIT; +}; + +struct st_glcdc_bright1_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long BRTG : 10; + unsigned long : 22; +#else + unsigned long : 22; + unsigned long BRTG : 10; +#endif +}; + +union un_glcdc_bright1 +{ + unsigned long LONG; + struct st_glcdc_bright1_bit BIT; +}; + +struct st_glcdc_bright2_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long BRTR : 10; + unsigned long : 6; + unsigned long BRTB : 10; + unsigned long : 6; +#else + unsigned long : 6; + unsigned long BRTB : 10; + unsigned long : 6; + unsigned long BRTR : 10; +#endif +}; + +union un_glcdc_bright2 +{ + unsigned long LONG; + struct st_glcdc_bright2_bit BIT; +}; + +struct st_glcdc_contrast_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long CONTR : 8; + unsigned long CONTB : 8; + unsigned long CONTG : 8; + unsigned long : 8; +#else + unsigned long : 8; + unsigned long CONTG : 8; + unsigned long CONTB : 8; + unsigned long CONTR : 8; +#endif +}; + +union un_glcdc_contrast +{ + unsigned long LONG; + struct st_glcdc_contrast_bit BIT; +}; + +struct st_glcdc_paneldtha_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long PD : 2; + unsigned long : 2; + unsigned long PC : 2; + unsigned long : 2; + unsigned long PB : 2; + unsigned long : 2; + unsigned long PA : 2; + unsigned long : 2; + unsigned long FORM : 2; + unsigned long : 2; + unsigned long SEL : 2; + unsigned long : 10; +#else + unsigned long : 10; + unsigned long SEL : 2; + unsigned long : 2; + unsigned long FORM : 2; + unsigned long : 2; + unsigned long PA : 2; + unsigned long : 2; + unsigned long PB : 2; + unsigned long : 2; + unsigned long PC : 2; + unsigned long : 2; + unsigned long PD : 2; +#endif +}; + +union un_glcdc_paneldtha +{ + unsigned long LONG; + struct st_glcdc_paneldtha_bit BIT; +}; + +struct st_glcdc_clkphase_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long : 3; + unsigned long TCON3EDG : 1; + unsigned long TCON2EDG : 1; + unsigned long TCON1EDG : 1; + unsigned long TCON0EDG : 1; + unsigned long : 1; + unsigned long LCDEDG : 1; + unsigned long : 3; + unsigned long FRONTGAM : 1; + unsigned long : 19; +#else + unsigned long : 19; + unsigned long FRONTGAM : 1; + unsigned long : 3; + unsigned long LCDEDG : 1; + unsigned long : 1; + unsigned long TCON0EDG : 1; + unsigned long TCON1EDG : 1; + unsigned long TCON2EDG : 1; + unsigned long TCON3EDG : 1; + unsigned long : 3; +#endif +}; + +union un_glcdc_clkphase +{ + unsigned long LONG; + struct st_glcdc_clkphase_bit BIT; +}; + +struct st_glcdc_tcontim_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long OFFSET : 11; + unsigned long : 5; + unsigned long HALF : 11; + unsigned long : 5; +#else + unsigned long : 5; + unsigned long HALF : 11; + unsigned long : 5; + unsigned long OFFSET : 11; +#endif +}; + +union un_glcdc_tcontim +{ + unsigned long LONG; + struct st_glcdc_tcontim_bit BIT; +}; + +struct st_glcdc_tconstva1_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long VW : 11; + unsigned long : 5; + unsigned long VS : 11; + unsigned long : 5; +#else + unsigned long : 5; + unsigned long VS : 11; + unsigned long : 5; + unsigned long VW : 11; +#endif +}; + +union un_glcdc_tconstva1 +{ + unsigned long LONG; + struct st_glcdc_tconstva1_bit BIT; +}; + +struct st_glcdc_tconstvat2_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long SEL : 3; + unsigned long : 1; + unsigned long INV : 1; + unsigned long : 27; +#else + unsigned long : 27; + unsigned long INV : 1; + unsigned long : 1; + unsigned long SEL : 3; +#endif +}; + +union un_glcdc_tconstvat2 +{ + unsigned long LONG; + struct st_glcdc_tconstvat2_bit BIT; +}; + +struct st_glcdc_tconstvb1_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long VW : 11; + unsigned long : 5; + unsigned long VS : 11; + unsigned long : 5; +#else + unsigned long : 5; + unsigned long VS : 11; + unsigned long : 5; + unsigned long VW : 11; +#endif +}; + +union un_glcdc_tconstvb1 +{ + unsigned long LONG; + struct st_glcdc_tconstvb1_bit BIT; +}; + +struct st_glcdc_tconstvb2_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long SEL : 3; + unsigned long : 1; + unsigned long INV : 1; + unsigned long : 27; +#else + unsigned long : 27; + unsigned long INV : 1; + unsigned long : 1; + unsigned long SEL : 3; +#endif +}; + +union un_glcdc_tconstvb2 +{ + unsigned long LONG; + struct st_glcdc_tconstvb2_bit BIT; +}; + +struct st_glcdc_tconstha1_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long HW : 11; + unsigned long : 5; + unsigned long HS : 11; + unsigned long : 5; +#else + unsigned long : 5; + unsigned long HS : 11; + unsigned long : 5; + unsigned long HW : 11; +#endif +}; + +union un_glcdc_tconstha1 +{ + unsigned long LONG; + struct st_glcdc_tconstha1_bit BIT; +}; + +struct st_glcdc_tconstha2_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long SEL : 3; + unsigned long : 1; + unsigned long INV : 1; + unsigned long : 3; + unsigned long HSSEL : 1; + unsigned long : 23; +#else + unsigned long : 23; + unsigned long HSSEL : 1; + unsigned long : 3; + unsigned long INV : 1; + unsigned long : 1; + unsigned long SEL : 3; +#endif +}; + +union un_glcdc_tconstha2 +{ + unsigned long LONG; + struct st_glcdc_tconstha2_bit BIT; +}; + +struct st_glcdc_tconsthb1_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long HW : 11; + unsigned long : 5; + unsigned long HS : 11; + unsigned long : 5; +#else + unsigned long : 5; + unsigned long HS : 11; + unsigned long : 5; + unsigned long HW : 11; +#endif +}; + +union un_glcdc_tconsthb1 +{ + unsigned long LONG; + struct st_glcdc_tconsthb1_bit BIT; +}; + +struct st_glcdc_tconsthb2_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long SEL : 3; + unsigned long : 1; + unsigned long INV : 1; + unsigned long : 3; + unsigned long HSSEL : 1; + unsigned long : 23; +#else + unsigned long : 23; + unsigned long HSSEL : 1; + unsigned long : 3; + unsigned long INV : 1; + unsigned long : 1; + unsigned long SEL : 3; +#endif +}; + +union un_glcdc_tconsthb2 +{ + unsigned long LONG; + struct st_glcdc_tconsthb2_bit BIT; +}; + +struct st_glcdc_tconde_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long INV : 1; + unsigned long : 31; +#else + unsigned long : 31; + unsigned long INV : 1; +#endif +}; + +union un_glcdc_tconde +{ + unsigned long LONG; + struct st_glcdc_tconde_bit BIT; +}; + +struct st_glcdc_dtcten_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long VPOSDTC : 1; + unsigned long GR1UFDTC : 1; + unsigned long GR2UFDTC : 1; + unsigned long : 29; +#else + unsigned long : 29; + unsigned long GR2UFDTC : 1; + unsigned long GR1UFDTC : 1; + unsigned long VPOSDTC : 1; +#endif +}; + +union un_glcdc_dtcten +{ + unsigned long LONG; + struct st_glcdc_dtcten_bit BIT; +}; + +struct st_glcdc_inten_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long VPOSINTEN : 1; + unsigned long GR1UFINTEN : 1; + unsigned long GR2UFINTEN : 1; + unsigned long : 29; +#else + unsigned long : 29; + unsigned long GR2UFINTEN : 1; + unsigned long GR1UFINTEN : 1; + unsigned long VPOSINTEN : 1; +#endif +}; + +union un_glcdc_inten +{ + unsigned long LONG; + struct st_glcdc_inten_bit BIT; +}; + +struct st_glcdc_stclr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long VPOSCLR : 1; + unsigned long GR1UFCLR : 1; + unsigned long GR2UFCLR : 1; + unsigned long : 29; +#else + unsigned long : 29; + unsigned long GR2UFCLR : 1; + unsigned long GR1UFCLR : 1; + unsigned long VPOSCLR : 1; +#endif +}; + +union un_glcdc_stclr +{ + unsigned long LONG; + struct st_glcdc_stclr_bit BIT; +}; + +struct st_glcdc_stmon_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long VPOS : 1; + unsigned long GR1UF : 1; + unsigned long GR2UF : 1; + unsigned long : 29; +#else + unsigned long : 29; + unsigned long GR2UF : 1; + unsigned long GR1UF : 1; + unsigned long VPOS : 1; +#endif +}; + +union un_glcdc_stmon +{ + unsigned long LONG; + struct st_glcdc_stmon_bit BIT; +}; + +struct st_glcdc_panelclk_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long DCDR : 6; + unsigned long CLKEN : 1; + unsigned long : 1; + unsigned long CLKSEL : 1; + unsigned long : 3; + unsigned long PIXSEL : 1; + unsigned long : 19; +#else + unsigned long : 19; + unsigned long PIXSEL : 1; + unsigned long : 3; + unsigned long CLKSEL : 1; + unsigned long : 1; + unsigned long CLKEN : 1; + unsigned long DCDR : 6; +#endif +}; + +union un_glcdc_panelclk +{ + unsigned long LONG; + struct st_glcdc_panelclk_bit BIT; +}; + +struct st_mtu4_tcr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char TPSC : 3; + unsigned char CKEG : 2; + unsigned char CCLR : 3; +#else + unsigned char CCLR : 3; + unsigned char CKEG : 2; + unsigned char TPSC : 3; +#endif +}; + +union un_mtu4_tcr +{ + unsigned char BYTE; + struct st_mtu4_tcr_bit BIT; +}; + +struct st_mtu4_tmdr1_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char MD : 4; + unsigned char BFA : 1; + unsigned char BFB : 1; + unsigned char : 2; +#else + unsigned char : 2; + unsigned char BFB : 1; + unsigned char BFA : 1; + unsigned char MD : 4; +#endif +}; + +union un_mtu4_tmdr1 +{ + unsigned char BYTE; + struct st_mtu4_tmdr1_bit BIT; +}; + +struct st_mtu4_tiorh_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char IOA : 4; + unsigned char IOB : 4; +#else + unsigned char IOB : 4; + unsigned char IOA : 4; +#endif +}; + +union un_mtu4_tiorh +{ + unsigned char BYTE; + struct st_mtu4_tiorh_bit BIT; +}; + +struct st_mtu4_tiorl_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char IOC : 4; + unsigned char IOD : 4; +#else + unsigned char IOD : 4; + unsigned char IOC : 4; +#endif +}; + +union un_mtu4_tiorl +{ + unsigned char BYTE; + struct st_mtu4_tiorl_bit BIT; +}; + +struct st_mtu4_tier_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char TGIEA : 1; + unsigned char TGIEB : 1; + unsigned char TGIEC : 1; + unsigned char TGIED : 1; + unsigned char TCIEV : 1; + unsigned char : 1; + unsigned char TTGE2 : 1; + unsigned char TTGE : 1; +#else + unsigned char TTGE : 1; + unsigned char TTGE2 : 1; + unsigned char : 1; + unsigned char TCIEV : 1; + unsigned char TGIED : 1; + unsigned char TGIEC : 1; + unsigned char TGIEB : 1; + unsigned char TGIEA : 1; +#endif +}; + +union un_mtu4_tier +{ + unsigned char BYTE; + struct st_mtu4_tier_bit BIT; +}; + +struct st_mtu4_tsr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char : 7; + unsigned char TCFD : 1; +#else + unsigned char TCFD : 1; + unsigned char : 7; +#endif +}; + +union un_mtu4_tsr +{ + unsigned char BYTE; + struct st_mtu4_tsr_bit BIT; +}; + +struct st_mtu4_tbtm_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char TTSA : 1; + unsigned char TTSB : 1; + unsigned char : 6; +#else + unsigned char : 6; + unsigned char TTSB : 1; + unsigned char TTSA : 1; +#endif +}; + +union un_mtu4_tbtm +{ + unsigned char BYTE; + struct st_mtu4_tbtm_bit BIT; +}; + +struct st_mtu4_tadcr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned short ITB4VE : 1; + unsigned short ITB3AE : 1; + unsigned short ITA4VE : 1; + unsigned short ITA3AE : 1; + unsigned short DT4BE : 1; + unsigned short UT4BE : 1; + unsigned short DT4AE : 1; + unsigned short UT4AE : 1; + unsigned short : 6; + unsigned short BF : 2; +#else + unsigned short BF : 2; + unsigned short : 6; + unsigned short UT4AE : 1; + unsigned short DT4AE : 1; + unsigned short UT4BE : 1; + unsigned short DT4BE : 1; + unsigned short ITA3AE : 1; + unsigned short ITA4VE : 1; + unsigned short ITB3AE : 1; + unsigned short ITB4VE : 1; +#endif +}; + +union un_mtu4_tadcr +{ + unsigned char BYTE; + struct st_mtu4_tadcr_bit BIT; +}; + +struct st_mtu4_tcr2_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char TPSC2 : 3; + unsigned char : 5; +#else + unsigned char : 5; + unsigned char TPSC2 : 3; +#endif +}; + +union un_mtu4_tcr2 +{ + unsigned char BYTE; + struct st_mtu4_tcr2_bit BIT; +}; + +struct st_mtu4_nfcr4_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char NFAEN : 1; + unsigned char NFBEN : 1; + unsigned char NFCEN : 1; + unsigned char NFDEN : 1; + unsigned char NFCS : 2; + unsigned char : 2; +#else + unsigned char : 2; + unsigned char NFCS : 2; + unsigned char NFDEN : 1; + unsigned char NFCEN : 1; + unsigned char NFBEN : 1; + unsigned char NFAEN : 1; +#endif +}; + +union un_mtu4_nfcr4 +{ + unsigned char BYTE; + struct st_mtu4_nfcr4_bit BIT; +}; + +struct st_mtu5_nfcr5_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char NFUEN : 1; + unsigned char NFVEN : 1; + unsigned char NFWEN : 1; + unsigned char : 1; + unsigned char NFCS : 2; + unsigned char : 2; +#else + unsigned char : 2; + unsigned char NFCS : 2; + unsigned char : 1; + unsigned char NFWEN : 1; + unsigned char NFVEN : 1; + unsigned char NFUEN : 1; +#endif +}; + +union un_mtu5_nfcr5 +{ + unsigned char BYTE; + struct st_mtu5_nfcr5_bit BIT; +}; + +struct st_mtu5_tcru_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char TPSC : 2; + unsigned char : 6; +#else + unsigned char : 6; + unsigned char TPSC : 2; +#endif +}; + +union un_mtu5_tcru +{ + unsigned char BYTE; + struct st_mtu5_tcru_bit BIT; +}; + +struct st_mtu5_tcr2u_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char TPSC2 : 3; + unsigned char CKEG : 2; + unsigned char : 3; +#else + unsigned char : 3; + unsigned char CKEG : 2; + unsigned char TPSC2 : 3; +#endif +}; + +union un_mtu5_tcr2u +{ + unsigned char BYTE; + struct st_mtu5_tcr2u_bit BIT; +}; + +struct st_mtu5_tioru_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char IOC : 5; + unsigned char : 3; +#else + unsigned char : 3; + unsigned char IOC : 5; +#endif +}; + +union un_mtu5_tioru +{ + unsigned char BYTE; + struct st_mtu5_tioru_bit BIT; +}; + +struct st_mtu5_tcrv_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char TPSC : 2; + unsigned char : 6; +#else + unsigned char : 6; + unsigned char TPSC : 2; +#endif +}; + +union un_mtu5_tcrv +{ + unsigned char BYTE; + struct st_mtu5_tcrv_bit BIT; +}; + +struct st_mtu5_tcr2v_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char TPSC2 : 3; + unsigned char CKEG : 2; + unsigned char : 3; +#else + unsigned char : 3; + unsigned char CKEG : 2; + unsigned char TPSC2 : 3; +#endif +}; + +union un_mtu5_tcr2v +{ + unsigned char BYTE; + struct st_mtu5_tcr2v_bit BIT; +}; + +struct st_mtu5_tiorv_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char IOC : 5; + unsigned char : 3; +#else + unsigned char : 3; + unsigned char IOC : 5; +#endif +}; + +union un_mtu5_tiorv +{ + unsigned char BYTE; + struct st_mtu5_tiorv_bit BIT; +}; + +struct st_mtu5_tcrw_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char TPSC : 2; + unsigned char : 6; +#else + unsigned char : 6; + unsigned char TPSC : 2; +#endif +}; + +union un_mtu5_tcrw +{ + unsigned char BYTE; + struct st_mtu5_tcrw_bit BIT; +}; + +struct st_mtu5_tcr2w_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char TPSC2 : 3; + unsigned char CKEG : 2; + unsigned char : 3; +#else + unsigned char : 3; + unsigned char CKEG : 2; + unsigned char TPSC2 : 3; +#endif +}; + +union un_mtu5_tcr2w +{ + unsigned char BYTE; + struct st_mtu5_tcr2w_bit BIT; +}; + +struct st_mtu5_tiorw_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char IOC : 5; + unsigned char : 3; +#else + unsigned char : 3; + unsigned char IOC : 5; +#endif +}; + +union un_mtu5_tiorw +{ + unsigned char BYTE; + struct st_mtu5_tiorw_bit BIT; +}; + +struct st_mtu5_tier_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char TGIE5W : 1; + unsigned char TGIE5V : 1; + unsigned char TGIE5U : 1; + unsigned char : 5; +#else + unsigned char : 5; + unsigned char TGIE5U : 1; + unsigned char TGIE5V : 1; + unsigned char TGIE5W : 1; +#endif +}; + +union un_mtu5_tier +{ + unsigned char BYTE; + struct st_mtu5_tier_bit BIT; +}; + +struct st_mtu5_tstr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char CSTW5 : 1; + unsigned char CSTV5 : 1; + unsigned char CSTU5 : 1; + unsigned char : 5; +#else + unsigned char : 5; + unsigned char CSTU5 : 1; + unsigned char CSTV5 : 1; + unsigned char CSTW5 : 1; +#endif +}; + +union un_mtu5_tstr +{ + unsigned char BYTE; + struct st_mtu5_tstr_bit BIT; +}; + +struct st_mtu5_tcntcmpclr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char CMPCLR5W : 1; + unsigned char CMPCLR5V : 1; + unsigned char CMPCLR5U : 1; + unsigned char : 5; +#else + unsigned char : 5; + unsigned char CMPCLR5U : 1; + unsigned char CMPCLR5V : 1; + unsigned char CMPCLR5W : 1; +#endif +}; + +union un_mtu5_tcntcmpclr +{ + unsigned char BYTE; + struct st_mtu5_tcntcmpclr_bit BIT; +}; + +struct st_smci0_smr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char CKS : 2; + unsigned char BCP : 2; + unsigned char PM : 1; + unsigned char PE : 1; + unsigned char BLK : 1; + unsigned char GM : 1; +#else + unsigned char GM : 1; + unsigned char BLK : 1; + unsigned char PE : 1; + unsigned char PM : 1; + unsigned char BCP : 2; + unsigned char CKS : 2; +#endif +}; + +union un_smcio_smr +{ + unsigned char BYTE; + struct st_smci0_smr_bit BIT; +}; + +struct st_smci0_scr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char CKE : 2; + unsigned char TEIE : 1; + unsigned char MPIE : 1; + unsigned char RE : 1; + unsigned char TE : 1; + unsigned char RIE : 1; + unsigned char TIE : 1; +#else + unsigned char TIE : 1; + unsigned char RIE : 1; + unsigned char TE : 1; + unsigned char RE : 1; + unsigned char MPIE : 1; + unsigned char TEIE : 1; + unsigned char CKE : 2; +#endif +}; + +union un_smcio_scr +{ + unsigned char BYTE; + struct st_smci0_scr_bit BIT; +}; +struct st_smci0_ssr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char MPBT : 1; + unsigned char MPB : 1; + unsigned char TEND : 1; + unsigned char PER : 1; + unsigned char ERS : 1; + unsigned char ORER : 1; + unsigned char RDRF : 1; + unsigned char TDRE : 1; +#else + unsigned char TDRE : 1; + unsigned char RDRF : 1; + unsigned char ORER : 1; + unsigned char ERS : 1; + unsigned char PER : 1; + unsigned char TEND : 1; + unsigned char MPB : 1; + unsigned char MPBT : 1; +#endif +}; + +union un_smcio_ssr +{ + unsigned char BYTE; + struct st_smci0_ssr_bit BIT; +}; + +struct st_smci0_smcr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char SMIF : 1; + unsigned char : 1; + unsigned char SINV : 1; + unsigned char SDIR : 1; + unsigned char CHR1 : 1; + unsigned char : 2; + unsigned char BCP2 : 1; +#else + unsigned char BCP2 : 1; + unsigned char : 2; + unsigned char CHR1 : 1; + unsigned char SDIR : 1; + unsigned char SINV : 1; + unsigned char : 1; + unsigned char SMIF : 1; +#endif +}; + +union un_smcio_smcr +{ + unsigned char BYTE; + struct st_smci0_smcr_bit BIT; +}; + +struct st_riic_iccr1_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char SDAI : 1; + unsigned char SCLI : 1; + unsigned char SDAO : 1; + unsigned char SCLO : 1; + unsigned char SOWP : 1; + unsigned char CLO : 1; + unsigned char IICRST : 1; + unsigned char ICE : 1; +#else + unsigned char ICE : 1; + unsigned char IICRST : 1; + unsigned char CLO : 1; + unsigned char SOWP : 1; + unsigned char SCLO : 1; + unsigned char SDAO : 1; + unsigned char SCLI : 1; + unsigned char SDAI : 1; +#endif +}; + +union un_riic_iccr1 +{ + unsigned char BYTE; + struct st_riic_iccr1_bit BIT; +}; + +struct st_riic_iccr2_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char : 1; + unsigned char ST : 1; + unsigned char RS : 1; + unsigned char SP : 1; + unsigned char : 1; + unsigned char TRS : 1; + unsigned char MST : 1; + unsigned char BBSY : 1; +#else + unsigned char BBSY : 1; + unsigned char MST : 1; + unsigned char TRS : 1; + unsigned char : 1; + unsigned char SP : 1; + unsigned char RS : 1; + unsigned char ST : 1; + unsigned char : 1; +#endif +}; + +union un_riic_iccr2 +{ + unsigned char BYTE; + struct st_riic_iccr2_bit BIT; +}; + +struct st_riic_icmr1_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char BC : 3; + unsigned char BCWP : 1; + unsigned char CKS : 3; + unsigned char MTWP : 1; +#else + unsigned char MTWP : 1; + unsigned char CKS : 3; + unsigned char BCWP : 1; + unsigned char BC : 3; +#endif +}; + +union un_riic_icmr1 +{ + unsigned char BYTE; + struct st_riic_icmr1_bit BIT; +}; + +struct st_riic_icmr2_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char TMOS : 1; + unsigned char TMOL : 1; + unsigned char TMOH : 1; + unsigned char : 1; + unsigned char SDDL : 3; + unsigned char DLCS : 1; +#else + unsigned char DLCS : 1; + unsigned char SDDL : 3; + unsigned char : 1; + unsigned char TMOH : 1; + unsigned char TMOL : 1; + unsigned char TMOS : 1; +#endif +}; + +union un_riic_icmr2 +{ + unsigned char BYTE; + struct st_riic_icmr2_bit BIT; +}; + +struct st_riic_icmr3_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char NF : 2; + unsigned char ACKBR : 1; + unsigned char ACKBT : 1; + unsigned char ACKWP : 1; + unsigned char RDRFS : 1; + unsigned char WAIT : 1; + unsigned char SMBS : 1; +#else + unsigned char SMBS : 1; + unsigned char WAIT : 1; + unsigned char RDRFS : 1; + unsigned char ACKWP : 1; + unsigned char ACKBT : 1; + unsigned char ACKBR : 1; + unsigned char NF : 2; +#endif +}; + +union un_riic_icmr3 +{ + unsigned char BYTE; + struct st_riic_icmr3_bit BIT; +}; + +struct st_riic_icfer_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char TMOE : 1; + unsigned char MALE : 1; + unsigned char NALE : 1; + unsigned char SALE : 1; + unsigned char NACKE : 1; + unsigned char NFE : 1; + unsigned char SCLE : 1; + unsigned char FMPE : 1; +#else + unsigned char FMPE : 1; + unsigned char SCLE : 1; + unsigned char NFE : 1; + unsigned char NACKE : 1; + unsigned char SALE : 1; + unsigned char NALE : 1; + unsigned char MALE : 1; + unsigned char TMOE : 1; +#endif +}; + +union un_riic_icfer +{ + unsigned char BYTE; + struct st_riic_icfer_bit BIT; +}; + +struct st_riic_icser_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char SAR0E : 1; + unsigned char SAR1E : 1; + unsigned char SAR2E : 1; + unsigned char GCAE : 1; + unsigned char : 1; + unsigned char DIDE : 1; + unsigned char : 1; + unsigned char HOAE : 1; +#else + unsigned char HOAE : 1; + unsigned char : 1; + unsigned char DIDE : 1; + unsigned char : 1; + unsigned char GCAE : 1; + unsigned char SAR2E : 1; + unsigned char SAR1E : 1; + unsigned char SAR0E : 1; +#endif +}; + +union un_riic_icser +{ + unsigned char BYTE; + struct st_riic_icser_bit BIT; +}; + +struct st_riic_icier_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char TMOIE : 1; + unsigned char ALIE : 1; + unsigned char STIE : 1; + unsigned char SPIE : 1; + unsigned char NAKIE : 1; + unsigned char RIE : 1; + unsigned char TEIE : 1; + unsigned char TIE : 1; +#else + unsigned char TIE : 1; + unsigned char TEIE : 1; + unsigned char RIE : 1; + unsigned char NAKIE : 1; + unsigned char SPIE : 1; + unsigned char STIE : 1; + unsigned char ALIE : 1; + unsigned char TMOIE : 1; +#endif +}; + +union un_riic_icier +{ + unsigned char BYTE; + struct st_riic_icier_bit BIT; +}; + +struct st_riic_icsr1_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char AAS0 : 1; + unsigned char AAS1 : 1; + unsigned char AAS2 : 1; + unsigned char GCA : 1; + unsigned char : 1; + unsigned char DID : 1; + unsigned char : 1; + unsigned char HOA : 1; +#else + unsigned char HOA : 1; + unsigned char : 1; + unsigned char DID : 1; + unsigned char : 1; + unsigned char GCA : 1; + unsigned char AAS2 : 1; + unsigned char AAS1 : 1; + unsigned char AAS0 : 1; +#endif +}; + +union un_riic_icsr1 +{ + unsigned char BYTE; + struct st_riic_icsr1_bit BIT; +}; + +struct st_riic_icsr2_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char TMOF : 1; + unsigned char AL : 1; + unsigned char START : 1; + unsigned char STOP : 1; + unsigned char NACKF : 1; + unsigned char RDRF : 1; + unsigned char TEND : 1; + unsigned char TDRE : 1; +#else + unsigned char TDRE : 1; + unsigned char TEND : 1; + unsigned char RDRF : 1; + unsigned char NACKF : 1; + unsigned char STOP : 1; + unsigned char START : 1; + unsigned char AL : 1; + unsigned char TMOF : 1; +#endif +}; + +union un_riic_icsr2 +{ + unsigned char BYTE; + struct st_riic_icsr2_bit BIT; +}; + +struct st_riic_sarl0_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char SVA0 : 1; + unsigned char SVA : 7; +#else + unsigned char SVA : 7; + unsigned char SVA0 : 1; +#endif +}; + +union un_riic_sarl0 +{ + unsigned char BYTE; + struct st_riic_sarl0_bit BIT; +}; + +struct st_riic_saru0_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char FS : 1; + unsigned char SVA : 2; + unsigned char : 5; +#else + unsigned char : 5; + unsigned char SVA : 2; + unsigned char FS : 1; +#endif +}; + +union un_riic_saru0 +{ + unsigned char BYTE; + struct st_riic_saru0_bit BIT; +}; + +struct st_riic_sarl1_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char SVA0 : 1; + unsigned char SVA : 7; +#else + unsigned char SVA : 7; + unsigned char SVA0 : 1; +#endif +}; + +union un_riic_sarl1 +{ + unsigned char BYTE; + struct st_riic_sarl1_bit BIT; +}; + +struct st_riic_saru1_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char FS : 1; + unsigned char SVA : 2; + unsigned char : 5; +#else + unsigned char : 5; + unsigned char SVA : 2; + unsigned char FS : 1; +#endif +}; + +union un_riic_saru1 +{ + unsigned char BYTE; + struct st_riic_saru1_bit BIT; +}; + +struct st_riic_sarl2_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char SVA0 : 1; + unsigned char SVA : 7; +#else + unsigned char SVA : 7; + unsigned char SVA0 : 1; +#endif +}; + +union un_riic_sarl2 +{ + unsigned char BYTE; + struct st_riic_sarl2_bit BIT; +}; + +struct st_riic_saru2_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char FS : 1; + unsigned char SVA : 2; + unsigned char : 5; +#else + unsigned char : 5; + unsigned char SVA : 2; + unsigned char FS : 1; +#endif +}; + +union un_riic_saru2 +{ + unsigned char BYTE; + struct st_riic_saru2_bit BIT; +}; + +struct st_riic_icbrl_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char BRL : 5; + unsigned char : 3; +#else + unsigned char : 3; + unsigned char BRL : 5; +#endif +}; + +union un_riic_icbrl +{ + unsigned char BYTE; + struct st_riic_icbrl_bit BIT; +}; + +struct st_riic_icbrh_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char BRH : 5; + unsigned char : 3; +#else + unsigned char : 3; + unsigned char BRH : 5; +#endif +}; + +union un_riic_icbrh +{ + unsigned char BYTE; + struct st_riic_icbrh_bit BIT; +}; + +struct st_rspi_spcr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char SPMS : 1; + unsigned char TXMD : 1; + unsigned char MODFEN : 1; + unsigned char MSTR : 1; + unsigned char SPEIE : 1; + unsigned char SPTIE : 1; + unsigned char SPE : 1; + unsigned char SPRIE : 1; +#else + unsigned char SPRIE : 1; + unsigned char SPE : 1; + unsigned char SPTIE : 1; + unsigned char SPEIE : 1; + unsigned char MSTR : 1; + unsigned char MODFEN : 1; + unsigned char TXMD : 1; + unsigned char SPMS : 1; +#endif +}; + +union un_rspi_spcr +{ + unsigned char BYTE; + struct st_rspi_spcr_bit BIT; +}; + +struct st_rspi_sslp_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char SSL0P : 1; + unsigned char SSL1P : 1; + unsigned char SSL2P : 1; + unsigned char SSL3P : 1; + unsigned char : 4; +#else + unsigned char : 4; + unsigned char SSL3P : 1; + unsigned char SSL2P : 1; + unsigned char SSL1P : 1; + unsigned char SSL0P : 1; +#endif +}; + +union un_rspi_sslp +{ + unsigned char BYTE; + struct st_rspi_sslp_bit BIT; +}; + +struct st_rspi_sppcr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char SPLP : 1; + unsigned char SPLP2 : 1; + unsigned char : 2; + unsigned char MOIFV : 1; + unsigned char MOIFE : 1; + unsigned char : 2; +#else + unsigned char : 2; + unsigned char MOIFE : 1; + unsigned char MOIFV : 1; + unsigned char : 2; + unsigned char SPLP2 : 1; + unsigned char SPLP : 1; +#endif +}; + +union un_rspi_sppcr +{ + unsigned char BYTE; + struct st_rspi_sppcr_bit BIT; +}; + +struct st_rspi_spsr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char OVRF : 1; + unsigned char IDLNF : 1; + unsigned char MODF : 1; + unsigned char PERF : 1; + unsigned char UDRF : 1; + unsigned char SPTEF : 1; + unsigned char : 1; + unsigned char SPRF : 1; +#else + unsigned char SPRF : 1; + unsigned char : 1; + unsigned char SPTEF : 1; + unsigned char UDRF : 1; + unsigned char PERF : 1; + unsigned char MODF : 1; + unsigned char IDLNF : 1; + unsigned char OVRF : 1; +#endif +}; + +union un_rspi_spsr +{ + unsigned char BYTE; + struct st_rspi_spsr_bit BIT; +}; + +struct st_rspi_spdr_word +{ + unsigned short H; +}; + +struct st_rspi_spdr_byte +{ + unsigned char HH; +}; + +union un_rspi_spdr +{ + unsigned long LONG; + struct st_rspi_spdr_word WORD; +}; + +struct st_rspi_spscr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char SPSLN : 3; + unsigned char : 5; +#else + unsigned char : 5; + unsigned char SPSLN : 3; +#endif +}; + +union un_rspi_spscr +{ + unsigned char BYTE; + struct st_rspi_spscr_bit BIT; +}; + +struct st_rspi_spssr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char SPCP : 3; + unsigned char : 1; + unsigned char SPECM : 3; + unsigned char : 1; +#else + unsigned char : 1; + unsigned char SPECM : 3; + unsigned char : 1; + unsigned char SPCP : 3; +#endif +}; + +union un_rspi_spssr +{ + unsigned char BYTE; + struct st_rspi_spssr_bit BIT; +}; + +struct st_rspi_spdcr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char SPFC : 2; + unsigned char : 2; + unsigned char SPRDTD : 1; + unsigned char SPLW : 1; + unsigned char SPBYT : 1; + unsigned char : 1; +#else + unsigned char : 1; + unsigned char SPBYT : 1; + unsigned char SPLW : 1; + unsigned char SPRDTD : 1; + unsigned char : 2; + unsigned char SPFC : 2; +#endif +}; + +union un_rspi_spdcr +{ + unsigned char BYTE; + struct st_rspi_spdcr_bit BIT; +}; + +struct st_rspi_spckd_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char SCKDL : 3; + unsigned char : 5; +#else + unsigned char : 5; + unsigned char SCKDL : 3; +#endif +}; + +union un_rspi_spckd +{ + unsigned char BYTE; + struct st_rspi_spckd_bit BIT; +}; + +struct st_rspi_sslnd_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char SLNDL : 3; + unsigned char : 5; +#else + unsigned char : 5; + unsigned char SLNDL : 3; +#endif +}; + +union un_rspi_sslnd +{ + unsigned char BYTE; + struct st_rspi_sslnd_bit BIT; +}; + +struct st_rspi_spnd_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char SPNDL : 3; + unsigned char : 5; +#else + unsigned char : 5; + unsigned char SPNDL : 3; +#endif +}; + +union un_rspi_spnd +{ + unsigned char BYTE; + struct st_rspi_spnd_bit BIT; +}; + +struct st_rspi_spcr2_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char SPPE : 1; + unsigned char SPOE : 1; + unsigned char SPIIE : 1; + unsigned char PTE : 1; + unsigned char SCKASE : 1; + unsigned char : 3; +#else + unsigned char : 3; + unsigned char SCKASE : 1; + unsigned char PTE : 1; + unsigned char SPIIE : 1; + unsigned char SPOE : 1; + unsigned char SPPE : 1; +#endif +}; + +union un_rspi_spcr2 +{ + unsigned char BYTE; + struct st_rspi_spcr2_bit BIT; +}; + +struct st_rspi_spcmd0_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned short CPHA : 1; + unsigned short CPOL : 1; + unsigned short BRDV : 2; + unsigned short SSLA : 3; + unsigned short SSLKP : 1; + unsigned short SPB : 4; + unsigned short LSBF : 1; + unsigned short SPNDEN : 1; + unsigned short SLNDEN : 1; + unsigned short SCKDEN : 1; +#else + unsigned short SCKDEN : 1; + unsigned short SLNDEN : 1; + unsigned short SPNDEN : 1; + unsigned short LSBF : 1; + unsigned short SPB : 4; + unsigned short SSLKP : 1; + unsigned short SSLA : 3; + unsigned short BRDV : 2; + unsigned short CPOL : 1; + unsigned short CPHA : 1; +#endif +}; + +union un_rspi_spcmd0 +{ + unsigned char BYTE; + struct st_rspi_spcmd0_bit BIT; +}; + +struct st_rspi_spcmd1_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned short CPHA : 1; + unsigned short CPOL : 1; + unsigned short BRDV : 2; + unsigned short SSLA : 3; + unsigned short SSLKP : 1; + unsigned short SPB : 4; + unsigned short LSBF : 1; + unsigned short SPNDEN : 1; + unsigned short SLNDEN : 1; + unsigned short SCKDEN : 1; +#else + unsigned short SCKDEN : 1; + unsigned short SLNDEN : 1; + unsigned short SPNDEN : 1; + unsigned short LSBF : 1; + unsigned short SPB : 4; + unsigned short SSLKP : 1; + unsigned short SSLA : 3; + unsigned short BRDV : 2; + unsigned short CPOL : 1; + unsigned short CPHA : 1; +#endif +}; + +union un_rspi_spcmd1 +{ + unsigned char BYTE; + struct st_rspi_spcmd1_bit BIT; +}; + +struct st_rspi_spcmd2_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned short CPHA : 1; + unsigned short CPOL : 1; + unsigned short BRDV : 2; + unsigned short SSLA : 3; + unsigned short SSLKP : 1; + unsigned short SPB : 4; + unsigned short LSBF : 1; + unsigned short SPNDEN : 1; + unsigned short SLNDEN : 1; + unsigned short SCKDEN : 1; +#else + unsigned short SCKDEN : 1; + unsigned short SLNDEN : 1; + unsigned short SPNDEN : 1; + unsigned short LSBF : 1; + unsigned short SPB : 4; + unsigned short SSLKP : 1; + unsigned short SSLA : 3; + unsigned short BRDV : 2; + unsigned short CPOL : 1; + unsigned short CPHA : 1; +#endif +}; + +union un_rspi_spcmd2 +{ + unsigned char BYTE; + struct st_rspi_spcmd2_bit BIT; +}; + +struct st_rspi_spcmd3_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned short CPHA : 1; + unsigned short CPOL : 1; + unsigned short BRDV : 2; + unsigned short SSLA : 3; + unsigned short SSLKP : 1; + unsigned short SPB : 4; + unsigned short LSBF : 1; + unsigned short SPNDEN : 1; + unsigned short SLNDEN : 1; + unsigned short SCKDEN : 1; +#else + unsigned short SCKDEN : 1; + unsigned short SLNDEN : 1; + unsigned short SPNDEN : 1; + unsigned short LSBF : 1; + unsigned short SPB : 4; + unsigned short SSLKP : 1; + unsigned short SSLA : 3; + unsigned short BRDV : 2; + unsigned short CPOL : 1; + unsigned short CPHA : 1; +#endif +}; + +union un_rspi_spcmd3 +{ + unsigned char BYTE; + struct st_rspi_spcmd3_bit BIT; +}; + +struct st_rspi_spcmd4_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned short CPHA : 1; + unsigned short CPOL : 1; + unsigned short BRDV : 2; + unsigned short SSLA : 3; + unsigned short SSLKP : 1; + unsigned short SPB : 4; + unsigned short LSBF : 1; + unsigned short SPNDEN : 1; + unsigned short SLNDEN : 1; + unsigned short SCKDEN : 1; +#else + unsigned short SCKDEN : 1; + unsigned short SLNDEN : 1; + unsigned short SPNDEN : 1; + unsigned short LSBF : 1; + unsigned short SPB : 4; + unsigned short SSLKP : 1; + unsigned short SSLA : 3; + unsigned short BRDV : 2; + unsigned short CPOL : 1; + unsigned short CPHA : 1; +#endif +}; + +union un_rspi_spcmd4 +{ + unsigned char BYTE; + struct st_rspi_spcmd4_bit BIT; +}; + +struct st_rspi_spcmd5_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned short CPHA : 1; + unsigned short CPOL : 1; + unsigned short BRDV : 2; + unsigned short SSLA : 3; + unsigned short SSLKP : 1; + unsigned short SPB : 4; + unsigned short LSBF : 1; + unsigned short SPNDEN : 1; + unsigned short SLNDEN : 1; + unsigned short SCKDEN : 1; +#else + unsigned short SCKDEN : 1; + unsigned short SLNDEN : 1; + unsigned short SPNDEN : 1; + unsigned short LSBF : 1; + unsigned short SPB : 4; + unsigned short SSLKP : 1; + unsigned short SSLA : 3; + unsigned short BRDV : 2; + unsigned short CPOL : 1; + unsigned short CPHA : 1; +#endif +}; + +union un_rspi_spcmd5 +{ + unsigned char BYTE; + struct st_rspi_spcmd5_bit BIT; +}; + +struct st_rspi_spcmd6_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned short CPHA : 1; + unsigned short CPOL : 1; + unsigned short BRDV : 2; + unsigned short SSLA : 3; + unsigned short SSLKP : 1; + unsigned short SPB : 4; + unsigned short LSBF : 1; + unsigned short SPNDEN : 1; + unsigned short SLNDEN : 1; + unsigned short SCKDEN : 1; +#else + unsigned short SCKDEN : 1; + unsigned short SLNDEN : 1; + unsigned short SPNDEN : 1; + unsigned short LSBF : 1; + unsigned short SPB : 4; + unsigned short SSLKP : 1; + unsigned short SSLA : 3; + unsigned short BRDV : 2; + unsigned short CPOL : 1; + unsigned short CPHA : 1; +#endif +}; + +union un_rspi_spcmd6 +{ + unsigned char BYTE; + struct st_rspi_spcmd6_bit BIT; +}; + +struct st_rspi_spcmd7_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned short CPHA : 1; + unsigned short CPOL : 1; + unsigned short BRDV : 2; + unsigned short SSLA : 3; + unsigned short SSLKP : 1; + unsigned short SPB : 4; + unsigned short LSBF : 1; + unsigned short SPNDEN : 1; + unsigned short SLNDEN : 1; + unsigned short SCKDEN : 1; +#else + unsigned short SCKDEN : 1; + unsigned short SLNDEN : 1; + unsigned short SPNDEN : 1; + unsigned short LSBF : 1; + unsigned short SPB : 4; + unsigned short SSLKP : 1; + unsigned short SSLA : 3; + unsigned short BRDV : 2; + unsigned short CPOL : 1; + unsigned short CPHA : 1; +#endif +}; + +union un_rspi_spcmd7 +{ + unsigned char BYTE; + struct st_rspi_spcmd7_bit BIT; +}; + +struct st_rspi_spdcr2_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char BYSW : 1; + unsigned char : 7; +#else + unsigned char : 7; + unsigned char BYSW : 1; +#endif +}; + +union un_rspi_spdcr2 +{ + unsigned char BYTE; + struct st_rspi_spdcr2_bit BIT; +}; + +struct st_sdhi_spcmd_bit +{ + unsigned long :16; + unsigned long CMD12AT:2; + unsigned long TRSTP:1; + unsigned long CMDRW:1; + unsigned long CMDTP:1; + unsigned long RSPTP:3; + unsigned long ACMD:2; + unsigned long CMDIDX:6; +}; + +union un_sdhi_spcmd +{ + unsigned long LONG; + struct st_sdhi_spcmd_bit BIT; +}; + +struct st_sdhi_sdstop_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long STP : 1; + unsigned long : 7; + unsigned long SDBLKCNTEN : 1; + unsigned long : 23; +#else + unsigned long : 23; + unsigned long SDBLKCNTEN : 1; + unsigned long : 7; + unsigned long STP : 1; +#endif +}; + +union un_sdhi_sdstop +{ + unsigned long LONG; + struct st_sdhi_sdstop_bit BIT; +}; + +struct st_sdhi_sdsts1_bit +{ + unsigned long :21; + unsigned long SDD3MON:1; + unsigned long SDD3IN:1; + unsigned long SDD3RM:1; + unsigned long SDWPMON:1; + unsigned long :1; + unsigned long SDCDMON:1; + unsigned long SDCDIN:1; + unsigned long SDCDRM:1; + unsigned long ACEND:1; + unsigned long :1; + unsigned long RSPEND:1; +}; + +union un_sdhi_sdsts1 +{ + unsigned long LONG; + struct st_sdhi_sdsts1_bit BIT; +}; + +struct st_sdhi_sdsts2_bit +{ + unsigned long :16; + unsigned long ILA:1; + unsigned long CBSY:1; + unsigned long SDCLKCREN:1; + unsigned long :3; + unsigned long BWE:1; + unsigned long BRE:1; + unsigned long SDD0MON:1; + unsigned long RSPTO:1; + unsigned long ILR:1; + unsigned long ILW:1; + unsigned long DTO:1; + unsigned long ENDE:1; + unsigned long CRCE:1; + unsigned long CMDE:1; +}; + +union un_sdhi_sdsts2 +{ + unsigned long LONG; + struct st_sdhi_sdsts2_bit BIT; +}; + +struct st_sdhi_sdimsk1_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long RSPENDM : 1; + unsigned long : 1; + unsigned long ACENDM : 1; + unsigned long SDCDRMM : 1; + unsigned long SDCDINM : 1; + unsigned long : 3; + unsigned long SDD3RMM : 1; + unsigned long SDD3INM : 1; + unsigned long : 22; +#else + unsigned long : 22; + unsigned long SDD3INM : 1; + unsigned long SDD3RMM : 1; + unsigned long : 3; + unsigned long SDCDINM : 1; + unsigned long SDCDRMM : 1; + unsigned long ACENDM : 1; + unsigned long : 1; + unsigned long RSPENDM : 1; +#endif +}; + +union un_sdhi_sdimsk1 +{ + unsigned long LONG; + struct st_sdhi_sdimsk1_bit BIT; +}; + +struct st_sdhi_sdimsk2_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long CMDEM : 1; + unsigned long CRCEM : 1; + unsigned long ENDEM : 1; + unsigned long DTTOM : 1; + unsigned long ILWM : 1; + unsigned long ILRM : 1; + unsigned long RSPTOM : 1; + unsigned long : 1; + unsigned long BREM : 1; + unsigned long BWEM : 1; + unsigned long : 5; + unsigned long ILAM : 1; + unsigned long : 16; +#else + unsigned long : 16; + unsigned long ILAM : 1; + unsigned long : 5; + unsigned long BWEM : 1; + unsigned long BREM : 1; + unsigned long : 1; + unsigned long RSPTOM : 1; + unsigned long ILRM : 1; + unsigned long ILWM : 1; + unsigned long DTTOM : 1; + unsigned long ENDEM : 1; + unsigned long CRCEM : 1; + unsigned long CMDEM : 1; +#endif +}; + +union un_sdhi_sdimsk2 +{ + unsigned long LONG; + struct st_sdhi_sdimsk2_bit BIT; +}; + +struct st_sdhi_sdclkcr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long CLKSEL : 8; + unsigned long CLKEN : 1; + unsigned long CLKCTRLEN : 1; + unsigned long : 22; +#else + unsigned long : 22; + unsigned long CLKCTRLEN : 1; + unsigned long CLKEN : 1; + unsigned long CLKSEL : 8; +#endif +}; + +union un_sdhi_sdclkcr +{ + unsigned long LONG; + struct st_sdhi_sdclkcr_bit BIT; +}; + +struct st_sdhi_sdsize_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long LEN : 10; + unsigned long : 22; +#else + unsigned long : 22; + unsigned long LEN : 10; +#endif +}; + +union un_sdhi_sdsize +{ + unsigned long LONG; + struct st_sdhi_sdsize_bit BIT; +}; + +struct st_sdhi_sdopt_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long CTOP : 4; + unsigned long TOP : 4; + unsigned long : 7; + unsigned long WIDTH : 1; + unsigned long : 16; +#else + unsigned long : 16; + unsigned long WIDTH : 1; + unsigned long : 7; + unsigned long TOP : 4; + unsigned long CTOP : 4; +#endif +}; + +union un_sdhi_sdopt +{ + unsigned long LONG; + struct st_sdhi_sdopt_bit BIT; +}; + +struct st_sdhi_sdersts1_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long CMDE0 : 1; + unsigned long CMDE1 : 1; + unsigned long RSPLENE0 : 1; + unsigned long RSPLENE1 : 1; + unsigned long RDLENE : 1; + unsigned long CRCLENE : 1; + unsigned long : 2; + unsigned long RSPCRCE0 : 1; + unsigned long RSPCRCE1 : 1; + unsigned long RDCRCE : 1; + unsigned long CRCTKE : 1; + unsigned long CRCTK : 3; + unsigned long : 17; +#else + unsigned long : 17; + unsigned long CRCTK : 3; + unsigned long CRCTKE : 1; + unsigned long RDCRCE : 1; + unsigned long RSPCRCE1 : 1; + unsigned long RSPCRCE0 : 1; + unsigned long : 2; + unsigned long CRCLENE : 1; + unsigned long RDLENE : 1; + unsigned long RSPLENE1 : 1; + unsigned long RSPLENE0 : 1; + unsigned long CMDE1 : 1; + unsigned long CMDE0 : 1; +#endif +}; + +union un_sdhi_sdersts1 +{ + unsigned long LONG; + struct st_sdhi_sdersts1_bit BIT; +}; + +struct st_sdhi_sdersts2_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long RSPTO0 : 1; + unsigned long RSPTO1 : 1; + unsigned long BSYTO0 : 1; + unsigned long BSYTO1 : 1; + unsigned long RDTO : 1; + unsigned long CRCTO : 1; + unsigned long CRCBSYTO : 1; + unsigned long : 25; +#else + unsigned long : 25; + unsigned long CRCBSYTO : 1; + unsigned long CRCTO : 1; + unsigned long RDTO : 1; + unsigned long BSYTO1 : 1; + unsigned long BSYTO0 : 1; + unsigned long RSPTO1 : 1; + unsigned long RSPTO0 : 1; +#endif +}; + +union un_sdhi_sdersts2 +{ + unsigned long LONG; + struct st_sdhi_sdersts2_bit BIT; +}; + +struct st_sdhi_sdiomd_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long INTEN : 1; + unsigned long : 1; + unsigned long RWREQ : 1; + unsigned long : 5; + unsigned long IOABT : 1; + unsigned long C52PUB : 1; + unsigned long : 22; +#else + unsigned long : 22; + unsigned long C52PUB : 1; + unsigned long IOABT : 1; + unsigned long : 5; + unsigned long RWREQ : 1; + unsigned long : 1; + unsigned long INTEN : 1; +#endif +}; + +union un_sdhi_sdiomd +{ + unsigned long LONG; + struct st_sdhi_sdiomd_bit BIT; +}; + +struct st_sdhi_sdiosts_bit +{ + unsigned long :16; + unsigned long EXWT:1; + unsigned long EXPUB52:1; + unsigned long :13; + unsigned long IOIRQ:1; +}; + +union un_sdhi_sdiosts +{ + unsigned long LONG; + struct st_sdhi_sdiosts_bit BIT; +}; + +struct st_sdhi_sdioimsk_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long IOIRQM : 1; + unsigned long : 13; + unsigned long EXPUB52M : 1; + unsigned long EXWTM : 1; + unsigned long : 16; +#else + unsigned long : 16; + unsigned long EXWTM : 1; + unsigned long EXPUB52M : 1; + unsigned long : 13; + unsigned long IOIRQM : 1; +#endif +}; + +union un_sdhi_sdioimsk +{ + unsigned long LONG; + struct st_sdhi_sdioimsk_bit BIT; +}; + +struct st_sdhi_sddmaen_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long : 1; + unsigned long DMAEN : 1; + unsigned long : 30; +#else + unsigned long : 30; + unsigned long DMAEN : 1; + unsigned long : 1; +#endif +}; + +union un_sdhi_sddmaen +{ + unsigned long LONG; + struct st_sdhi_sddmaen_bit BIT; +}; + +struct st_sdhi_sdrst_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long SDRST : 1; + unsigned long : 31; +#else + unsigned long : 31; + unsigned long SDRST : 1; +#endif +}; + +union un_sdhi_sdrst +{ + unsigned long LONG; + struct st_sdhi_sdrst_bit BIT; +}; + +struct st_sdhi_sdver_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long IP1 : 8; + unsigned long IP2 : 4; + unsigned long : 2; + unsigned long CLKRAT : 1; + unsigned long CPRM : 1; + unsigned long : 16; +#else + unsigned long : 16; + unsigned long CPRM : 1; + unsigned long CLKRAT : 1; + unsigned long : 2; + unsigned long IP2 : 4; + unsigned long IP1 : 8; +#endif +}; + +union un_sdhi_sdver +{ + unsigned long LONG; + struct st_sdhi_sdver_bit BIT; +}; + +struct st_sdhi_sdswap_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long : 6; + unsigned long BWSWP : 1; + unsigned long BRSWP : 1; + unsigned long : 24; +#else + unsigned long : 24; + unsigned long BRSWP : 1; + unsigned long BWSWP : 1; + unsigned long : 6; +#endif +}; + +union un_sdhi_sdswap +{ + unsigned long LONG; + struct st_sdhi_sdswap_bit BIT; +}; + +struct st_sdsi_fn1accr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long : 11; + unsigned long FN1ACC : 1; + unsigned long : 20; +#else + unsigned long : 20; + unsigned long FN1ACC : 1; + unsigned long : 11; +#endif +}; + +union un_sdsi_fn1accr +{ + unsigned long LONG; + struct st_sdsi_fn1accr_bit BIT; +}; + +struct st_sdsi_intencr1_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char CMD52WIREN : 1; + unsigned char CMD53WIREN : 1; + unsigned char CMD53RIREN : 1; + unsigned char : 5; +#else + unsigned char : 5; + unsigned char CMD53RIREN : 1; + unsigned char CMD53WIREN : 1; + unsigned char CMD52WIREN : 1; +#endif +}; + +union un_sdsi_intencr1 +{ + unsigned char BYTE; + struct st_sdsi_intencr1_bit BIT; +}; + +struct st_sdsi_intsr1_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char CMD52W : 1; + unsigned char CMD53W : 1; + unsigned char CMD53R : 1; + unsigned char : 5; +#else + unsigned char : 5; + unsigned char CMD53R : 1; + unsigned char CMD53W : 1; + unsigned char CMD52W : 1; +#endif +}; + +union un_sdsi_intsr1 +{ + unsigned char BYTE; + struct st_sdsi_intsr1_bit BIT; +}; + +struct st_sdsi_sdcmdcr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char SDCMDINDEX : 1; + unsigned char SDWNRFLG : 1; + unsigned char SDRAWFLG : 1; + unsigned char SDBMODE : 1; + unsigned char SDOPCODE : 1; + unsigned char : 3; +#else + unsigned char : 3; + unsigned char SDOPCODE : 1; + unsigned char SDBMODE : 1; + unsigned char SDRAWFLG : 1; + unsigned char SDWNRFLG : 1; + unsigned char SDCMDINDEX : 1; +#endif +}; + +union un_sdsi_sdcmdcr +{ + unsigned char BYTE; + struct st_sdsi_sdcmdcr_bit BIT; +}; + +struct st_sdsi_sdcadd0r_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char SDCMDACCADD : 8; +#else + unsigned char SDCMDACCADD : 8; +#endif +}; + +union un_sdsi_sdcadd0r +{ + unsigned char BYTE; + struct st_sdsi_sdcadd0r_bit BIT; +}; + +struct st_sdsi_sdcadd1r_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char SDCMDACCADD : 8; +#else + unsigned char SDCMDACCADD : 8; +#endif +}; + +union un_sdsi_sdcadd1r +{ + unsigned char BYTE; + struct st_sdsi_sdcadd1r_bit BIT; +}; + +struct st_sdsi_sdcadd2r_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char SDCMDACCADD : 1; + unsigned char : 7; +#else + unsigned char : 7; + unsigned char SDCMDACCADD : 1; +#endif +}; + +union un_sdsi_sdcadd2r +{ + unsigned char BYTE; + struct st_sdsi_sdcadd2r_bit BIT; +}; + +struct st_sdsi_sdsicr1_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char IOE1IOR1 : 1; + unsigned char EPS : 1; + unsigned char EMPC : 1; + unsigned char : 5; +#else + unsigned char : 5; + unsigned char EMPC : 1; + unsigned char EPS : 1; + unsigned char IOE1IOR1 : 1; +#endif +}; + +union un_sdsi_sdsicr1 +{ + unsigned char BYTE; + struct st_sdsi_sdsicr1_bit BIT; +}; + +struct st_sdsi_dmacr1_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char DMAEN : 1; + unsigned char DMALOCKEN : 1; + unsigned char : 6; +#else + unsigned char : 6; + unsigned char DMALOCKEN : 1; + unsigned char DMAEN : 1; +#endif +}; + +union un_sdsi_dmacr1 +{ + unsigned char BYTE; + struct st_sdsi_dmacr1_bit BIT; +}; + +struct st_sdsi_blkcnt_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned short CMD53BLK : 9; + unsigned short : 7; +#else + unsigned short : 7; + unsigned short CMD53BLK : 9; +#endif +}; + +union un_sdsi_blkcnt +{ + unsigned short WORD; + struct st_sdsi_blkcnt_bit BIT; +}; + +struct st_sdsi_bytcnt_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned short CMD53BYT : 12; + unsigned short : 4; +#else + unsigned short : 4; + unsigned short CMD53BYT : 12; +#endif +}; + +union un_sdsi_bytcnt +{ + unsigned short WORD; + struct st_sdsi_bytcnt_bit BIT; +}; + +struct st_sdsi_dmatraddr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long DMAADD : 32; +#else + unsigned long DMAADD : 32; +#endif +}; + +union un_sdsi_dmatraddr +{ + unsigned long LONG; + struct st_sdsi_dmatraddr_bit BIT; +}; + +struct st_sdsi_sdsicr2_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long RSWAP : 1; + unsigned long : 1; + unsigned long WSWAP : 1; + unsigned long : 1; + unsigned long REG5EN : 1; + unsigned long : 27; +#else + unsigned long : 27; + unsigned long REG5EN : 1; + unsigned long : 1; + unsigned long WSWAP : 1; + unsigned long : 1; + unsigned long RSWAP : 1; +#endif +}; + +union un_sdsi_sdsicr2 +{ + unsigned long LONG; + struct st_sdsi_sdsicr2_bit BIT; +}; + +struct st_sdsi_sdsicr3_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long SRST : 1; + unsigned long : 1; + unsigned long IOR0 : 1; + unsigned long CEN : 1; + unsigned long : 14; + unsigned long SPS : 1; + unsigned long SMPC : 1; + unsigned long : 12; +#else + unsigned long : 12; + unsigned long SMPC : 1; + unsigned long SPS : 1; + unsigned long : 14; + unsigned long CEN : 1; + unsigned long IOR0 : 1; + unsigned long : 1; + unsigned long SRST : 1; +#endif +}; + +union un_sdsi_sdsicr3 +{ + unsigned long LONG; + struct st_sdsi_sdsicr3_bit BIT; +}; + +struct st_sdsi_intencr2_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long CDFEN : 1; + unsigned long CDREN : 1; + unsigned long DTEEN : 1; + unsigned long : 29; +#else + unsigned long : 29; + unsigned long DTEEN : 1; + unsigned long CDREN : 1; + unsigned long CDFEN : 1; +#endif +}; + +union un_sdsi_intencr2 +{ + unsigned long LONG; + struct st_sdsi_intencr2_bit BIT; +}; + +struct st_sdsi_intsr2_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long CDF : 1; + unsigned long CDR : 1; + unsigned long DTE : 1; + unsigned long : 29; +#else + unsigned long : 29; + unsigned long DTE : 1; + unsigned long CDR : 1; + unsigned long CDF : 1; +#endif +}; + +union un_sdsi_intsr2 +{ + unsigned long LONG; + struct st_sdsi_intsr2_bit BIT; +}; + +struct st_sdsi_dmacr2_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long DMARSWAP : 2; + unsigned long DMAWSWAP : 2; + unsigned long : 4; + unsigned long DMASDSEL : 1; + unsigned long : 23; +#else + unsigned long : 23; + unsigned long DMASDSEL : 1; + unsigned long : 4; + unsigned long DMAWSWAP : 2; + unsigned long DMARSWAP : 2; +#endif +}; + +union un_sdsi_dmacr2 +{ + unsigned long LONG; + struct st_sdsi_dmacr2_bit BIT; +}; + +struct st_sdsi_fbr1_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long FBR1L : 4; + unsigned long : 4; + unsigned long FBR1U : 8; + unsigned long : 16; +#else + unsigned long : 16; + unsigned long FBR1U : 8; + unsigned long : 4; + unsigned long FBR1L : 4; +#endif +}; + +union un_sdsi_fbr1 +{ + unsigned long LONG; + struct st_sdsi_fbr1_bit BIT; +}; + +struct st_sdsi_fbr2_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long FBR2 : 8; + unsigned long : 24; +#else + unsigned long : 24; + unsigned long FBR2 : 8; +#endif +}; + +union un_sdsi_fbr2 +{ + unsigned long LONG; + struct st_sdsi_fbr2_bit BIT; +}; + +struct st_sdsi_fbr3_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long FBR3 : 16; + unsigned long : 16; +#else + unsigned long : 16; + unsigned long FBR3 : 16; +#endif +}; + +union un_sdsi_fbr3 +{ + unsigned long LONG; + struct st_sdsi_fbr3_bit BIT; +}; + +struct st_sdsi_fbr4_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long FBR4 : 16; + unsigned long : 16; +#else + unsigned long : 16; + unsigned long FBR4 : 16; +#endif +}; + +union un_sdsi_fbr4 +{ + unsigned long LONG; + struct st_sdsi_fbr4_bit BIT; +}; + +struct st_sdsi_fbr5_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long FBR5 : 8; + unsigned long : 24; +#else + unsigned long : 24; + unsigned long FBR5 : 8; +#endif +}; + +union un_sdsi_fbr5 +{ + unsigned long LONG; + struct st_sdsi_fbr5_bit BIT; +}; + +struct st_sdsi_fn1datar1_byte +{ + unsigned char HH; + unsigned char HL; + unsigned char LH; + unsigned char LL; +}; + +union un_sdsi_fn1datar1 +{ + unsigned long LONG; + struct st_sdsi_fn1datar1_byte BYTE; +}; + +struct st_sdsi_fn1datar2_byte +{ + unsigned char HH; + unsigned char HL; + unsigned char LH; + unsigned char LL; +}; + +union un_sdsi_fn1datar2 +{ + unsigned long LONG; + struct st_sdsi_fn1datar2_byte BYTE; +}; + +struct st_sdsi_fn1datar3_byte +{ + unsigned char HH; + unsigned char HL; + unsigned char LH; + unsigned char LL; +}; + +union un_sdsi_fn1datar3 +{ + unsigned long LONG; + struct st_sdsi_fn1datar3_byte BYTE; +}; + +struct st_sdsi_fn1intvecr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char INTVEC : 8; +#else + unsigned char INTVEC : 8; +#endif +}; + +union un_sdsi_fn1intvecr +{ + unsigned char BYTE; + struct st_sdsi_fn1intvecr_bit BIT; +}; + +struct st_sdsi_fn1intclrr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char INTCTR : 8; +#else + unsigned char INTCTR : 8; +#endif +}; + +union un_sdsi_fn1intclrr +{ + unsigned char BYTE; + struct st_sdsi_fn1intclrr_bit BIT; +}; + +struct st_sdsi_fn1datar5_byte +{ + unsigned char HH; + unsigned char HL; + unsigned char LH; + unsigned char LL; +}; + +union un_sdsi_fn1datar5 +{ + unsigned long LONG; + struct st_sdsi_fn1datar5_byte BYTE; +}; + +struct st_mtu6_tcr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char TPSC : 3; + unsigned char CKEG : 2; + unsigned char CCLR : 3; +#else + unsigned char CCLR : 3; + unsigned char CKEG : 2; + unsigned char TPSC : 3; +#endif +}; + +union un_mtu6_tcr +{ + unsigned char BYTE; + struct st_mtu6_tcr_bit BIT; +}; + +struct st_mtu6_tmdr1_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char MD : 4; + unsigned char BFA : 1; + unsigned char BFB : 1; + unsigned char : 2; +#else + unsigned char : 2; + unsigned char BFB : 1; + unsigned char BFA : 1; + unsigned char MD : 4; +#endif +}; + +union un_mtu6_tmdr1 +{ + unsigned char BYTE; + struct st_mtu6_tmdr1_bit BIT; +}; + +struct st_mtu6_tiorh_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char IOA : 4; + unsigned char IOB : 4; +#else + unsigned char IOB : 4; + unsigned char IOA : 4; +#endif +}; + +union un_mtu6_tiorh +{ + unsigned char BYTE; + struct st_mtu6_tiorh_bit BIT; +}; + +struct st_mtu6_tiorl_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char IOC : 4; + unsigned char IOD : 4; +#else + unsigned char IOD : 4; + unsigned char IOC : 4; +#endif +}; + +union un_mtu6_tiorl +{ + unsigned char BYTE; + struct st_mtu6_tiorl_bit BIT; +}; + +struct st_mtu6_tier_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char TGIEA : 1; + unsigned char TGIEB : 1; + unsigned char TGIEC : 1; + unsigned char TGIED : 1; + unsigned char TCIEV : 1; + unsigned char : 2; + unsigned char TTGE : 1; +#else + unsigned char TTGE : 1; + unsigned char : 2; + unsigned char TCIEV : 1; + unsigned char TGIED : 1; + unsigned char TGIEC : 1; + unsigned char TGIEB : 1; + unsigned char TGIEA : 1; +#endif +}; + +union un_mtu6_tier +{ + unsigned char BYTE; + struct st_mtu6_tier_bit BIT; +}; + +struct st_mtu6_tsr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char : 7; + unsigned char TCFD : 1; +#else + unsigned char TCFD : 1; + unsigned char : 7; +#endif +}; + +union un_mtu6_tsr +{ + unsigned char BYTE; + struct st_mtu6_tsr_bit BIT; +}; + +struct st_mtu6_tbtm_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char TTSA : 1; + unsigned char TTSB : 1; + unsigned char : 6; +#else + unsigned char : 6; + unsigned char TTSB : 1; + unsigned char TTSA : 1; +#endif +}; + +union un_mtu6_tbtm +{ + unsigned char BYTE; + struct st_mtu6_tbtm_bit BIT; +}; + +struct st_mtu6_tcr2_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char TPSC2 : 3; + unsigned char : 5; +#else + unsigned char : 5; + unsigned char TPSC2 : 3; +#endif +}; + +union un_mtu6_tcr2 +{ + unsigned char BYTE; + struct st_mtu6_tcr2_bit BIT; +}; + +struct st_mtu6_tsycr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char CE2B : 1; + unsigned char CE2A : 1; + unsigned char CE1B : 1; + unsigned char CE1A : 1; + unsigned char CE0D : 1; + unsigned char CE0C : 1; + unsigned char CE0B : 1; + unsigned char CE0A : 1; +#else + unsigned char CE0A : 1; + unsigned char CE0B : 1; + unsigned char CE0C : 1; + unsigned char CE0D : 1; + unsigned char CE1A : 1; + unsigned char CE1B : 1; + unsigned char CE2A : 1; + unsigned char CE2B : 1; +#endif +}; + +union un_mtu6_tsycr +{ + unsigned char BYTE; + struct st_mtu6_tsycr_bit BIT; +}; + +struct st_mtu7_tcr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char TPSC : 3; + unsigned char CKEG : 2; + unsigned char CCLR : 3; +#else + unsigned char CCLR : 3; + unsigned char CKEG : 2; + unsigned char TPSC : 3; +#endif +}; + +union un_mtu7_tcr +{ + unsigned char BYTE; + struct st_mtu7_tcr_bit BIT; +}; + +struct st_mtu7_tmdr1_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char MD : 4; + unsigned char BFA : 1; + unsigned char BFB : 1; + unsigned char : 2; +#else + unsigned char : 2; + unsigned char BFB : 1; + unsigned char BFA : 1; + unsigned char MD : 4; +#endif +}; + +union un_mtu7_tmdr1 +{ + unsigned char BYTE; + struct st_mtu7_tmdr1_bit BIT; +}; + +struct st_mtu7_tiorh_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char IOA : 4; + unsigned char IOB : 4; +#else + unsigned char IOB : 4; + unsigned char IOA : 4; +#endif +}; + +union un_mtu7_tiorh +{ + unsigned char BYTE; + struct st_mtu7_tiorh_bit BIT; +}; + +struct st_mtu7_tiorl_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char IOC : 4; + unsigned char IOD : 4; +#else + unsigned char IOD : 4; + unsigned char IOC : 4; +#endif +}; + +union un_mtu7_tiorl +{ + unsigned char BYTE; + struct st_mtu7_tiorl_bit BIT; +}; + +struct st_mtu7_tier_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char TGIEA : 1; + unsigned char TGIEB : 1; + unsigned char TGIEC : 1; + unsigned char TGIED : 1; + unsigned char TCIEV : 1; + unsigned char : 1; + unsigned char TTGE2 : 1; + unsigned char TTGE : 1; +#else + unsigned char TTGE : 1; + unsigned char TTGE2 : 1; + unsigned char : 1; + unsigned char TCIEV : 1; + unsigned char TGIED : 1; + unsigned char TGIEC : 1; + unsigned char TGIEB : 1; + unsigned char TGIEA : 1; +#endif +}; + +union un_mtu7_tier +{ + unsigned char BYTE; + struct st_mtu7_tier_bit BIT; +}; + +struct st_mtu7_tsr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char : 7; + unsigned char TCFD : 1; +#else + unsigned char TCFD : 1; + unsigned char : 7; +#endif +}; + +union un_mtu7_tsr +{ + unsigned char BYTE; + struct st_mtu7_tsr_bit BIT; +}; + +struct st_mtu7_tbtm_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char TTSA : 1; + unsigned char TTSB : 1; + unsigned char : 6; +#else + unsigned char : 6; + unsigned char TTSB : 1; + unsigned char TTSA : 1; +#endif +}; + +union un_mtu7_tbtm +{ + unsigned char BYTE; + struct st_mtu7_tbtm_bit BIT; +}; + +struct st_mtu7_tadcr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned short ITB7VE : 1; + unsigned short ITB6AE : 1; + unsigned short ITA7VE : 1; + unsigned short ITA6AE : 1; + unsigned short DT7BE : 1; + unsigned short UT7BE : 1; + unsigned short DT7AE : 1; + unsigned short UT7AE : 1; + unsigned short : 6; + unsigned short BF : 2; +#else + unsigned short BF : 2; + unsigned short : 6; + unsigned short UT7AE : 1; + unsigned short DT7AE : 1; + unsigned short UT7BE : 1; + unsigned short DT7BE : 1; + unsigned short ITA6AE : 1; + unsigned short ITA7VE : 1; + unsigned short ITB6AE : 1; + unsigned short ITB7VE : 1; +#endif +}; + +union un_mtu7_tadcr +{ + unsigned char BYTE; + struct st_mtu7_tadcr_bit BIT; +}; +struct st_mtu7_tcr2_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char TPSC2 : 3; + unsigned char : 5; +#else + unsigned char : 5; + unsigned char TPSC2 : 3; +#endif +}; + +union un_mtu7_tcr2 +{ + unsigned char BYTE; + struct st_mtu7_tcr2_bit BIT; +}; + +struct st_mtu7_nfcr7_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char NFAEN : 1; + unsigned char NFBEN : 1; + unsigned char NFCEN : 1; + unsigned char NFDEN : 1; + unsigned char NFCS : 2; + unsigned char : 2; +#else + unsigned char : 2; + unsigned char NFCS : 2; + unsigned char NFDEN : 1; + unsigned char NFCEN : 1; + unsigned char NFBEN : 1; + unsigned char NFAEN : 1; +#endif +}; + +union un_mtu7_nfcr7 +{ + unsigned char BYTE; + struct st_mtu7_nfcr7_bit BIT; +}; + +struct st_mtu8_nfcr8_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char NFAEN : 1; + unsigned char NFBEN : 1; + unsigned char NFCEN : 1; + unsigned char NFDEN : 1; + unsigned char NFCS : 2; + unsigned char : 2; +#else + unsigned char : 2; + unsigned char NFCS : 2; + unsigned char NFDEN : 1; + unsigned char NFCEN : 1; + unsigned char NFBEN : 1; + unsigned char NFAEN : 1; +#endif +}; + +union un_mtu8_nfcr8 +{ + unsigned char BYTE; + struct st_mtu8_nfcr8_bit BIT; +}; +struct st_mtu8_tcr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char TPSC : 3; + unsigned char CKEG : 2; + unsigned char CCLR : 3; +#else + unsigned char CCLR : 3; + unsigned char CKEG : 2; + unsigned char TPSC : 3; +#endif +}; + +union un_mtu8_tcr +{ + unsigned char BYTE; + struct st_mtu8_tcr_bit BIT; +}; + +struct st_mtu8_tmdr1_bit +{ + #ifdef __RX_LITTLE_ENDIAN__ + unsigned char MD : 4; + unsigned char BFA : 1; + unsigned char BFB : 1; + unsigned char : 2; +#else + unsigned char : 2; + unsigned char BFB : 1; + unsigned char BFA : 1; + unsigned char MD : 4; +#endif +}; + +union un_mtu8_tmdr1 +{ + unsigned char BYTE; + struct st_mtu8_tmdr1_bit BIT; +}; + +struct st_mtu8_tiorh_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char IOA : 4; + unsigned char IOB : 4; +#else + unsigned char IOB : 4; + unsigned char IOA : 4; +#endif +}; + +union un_mtu8_tiorh +{ + unsigned char BYTE; + struct st_mtu8_tiorh_bit BIT; +}; + +struct st_mtu8_tiorl_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char IOC : 4; + unsigned char IOD : 4; +#else + unsigned char IOD : 4; + unsigned char IOC : 4; +#endif +}; + +union un_mtu8_tiorl +{ + unsigned char BYTE; + struct st_mtu8_tiorl_bit BIT; +}; + +struct st_mtu8_tier_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char TGIEA : 1; + unsigned char TGIEB : 1; + unsigned char TGIEC : 1; + unsigned char TGIED : 1; + unsigned char TCIEV : 1; + unsigned char : 3; +#else + unsigned char : 3; + unsigned char TCIEV : 1; + unsigned char TGIED : 1; + unsigned char TGIEC : 1; + unsigned char TGIEB : 1; + unsigned char TGIEA : 1; +#endif +}; + +union un_mtu8_tier +{ + unsigned char BYTE; + struct st_mtu8_tier_bit BIT; +}; + +struct st_mtu8_tcr2_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char TPSC2 : 3; + unsigned char : 5; +#else + unsigned char : 5; + unsigned char TPSC2 : 3; +#endif +}; + +union un_mtu8_tcr2 +{ + unsigned char BYTE; + struct st_mtu8_tcr2_bit BIT; +}; + +struct st_port6_pdr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char B0 : 1; + unsigned char B1 : 1; + unsigned char B2 : 1; + unsigned char B3 : 1; + unsigned char B4 : 1; + unsigned char B5 : 1; + unsigned char B6 : 1; + unsigned char B7 : 1; +#else + unsigned char B7 : 1; + unsigned char B6 : 1; + unsigned char B5 : 1; + unsigned char B4 : 1; + unsigned char B3 : 1; + unsigned char B2 : 1; + unsigned char B1 : 1; + unsigned char B0 : 1; +#endif +}; + +union un_port6_pdr +{ + unsigned char BYTE; + struct st_port6_pdr_bit BIT; +}; + +struct st_port6_podr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char B0 : 1; + unsigned char B1 : 1; + unsigned char B2 : 1; + unsigned char B3 : 1; + unsigned char B4 : 1; + unsigned char B5 : 1; + unsigned char B6 : 1; + unsigned char B7 : 1; +#else + unsigned char B7 : 1; + unsigned char B6 : 1; + unsigned char B5 : 1; + unsigned char B4 : 1; + unsigned char B3 : 1; + unsigned char B2 : 1; + unsigned char B1 : 1; + unsigned char B0 : 1; +#endif +}; + +union un_port6_podr +{ + unsigned char BYTE; + struct st_port6_podr_bit BIT; +}; + +struct st_port6_pidr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char B0 : 1; + unsigned char B1 : 1; + unsigned char B2 : 1; + unsigned char B3 : 1; + unsigned char B4 : 1; + unsigned char B5 : 1; + unsigned char B6 : 1; + unsigned char B7 : 1; +#else + unsigned char B7 : 1; + unsigned char B6 : 1; + unsigned char B5 : 1; + unsigned char B4 : 1; + unsigned char B3 : 1; + unsigned char B2 : 1; + unsigned char B1 : 1; + unsigned char B0 : 1; +#endif +}; + +union un_port6_pidr +{ + unsigned char BYTE; + struct st_port6_pidr_bit BIT; +}; + +struct st_port6_pmr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char B0 : 1; + unsigned char B1 : 1; + unsigned char B2 : 1; + unsigned char B3 : 1; + unsigned char B4 : 1; + unsigned char B5 : 1; + unsigned char B6 : 1; + unsigned char B7 : 1; +#else + unsigned char B7 : 1; + unsigned char B6 : 1; + unsigned char B5 : 1; + unsigned char B4 : 1; + unsigned char B3 : 1; + unsigned char B2 : 1; + unsigned char B1 : 1; + unsigned char B0 : 1; +#endif +}; + +union un_port6_pmr +{ + unsigned char BYTE; + struct st_port6_pmr_bit BIT; +}; + +struct st_port6_ord0_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char B0 : 1; + unsigned char : 1; + unsigned char B2 : 1; + unsigned char : 1; + unsigned char B4 : 1; + unsigned char : 1; + unsigned char B6 : 1; + unsigned char : 1; +#else + unsigned char : 1; + unsigned char B6 : 1; + unsigned char : 1; + unsigned char B4 : 1; + unsigned char : 1; + unsigned char B2 : 1; + unsigned char : 1; + unsigned char B0 : 1; +#endif +}; + +union un_port6_ord0 +{ + unsigned char BYTE; + struct st_port6_ord0_bit BIT; +}; + +struct st_port6_ord1_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char B0 : 1; + unsigned char : 1; + unsigned char B2 : 1; + unsigned char : 1; + unsigned char B4 : 1; + unsigned char : 1; + unsigned char B6 : 1; + unsigned char : 1; +#else + unsigned char : 1; + unsigned char B6 : 1; + unsigned char : 1; + unsigned char B4 : 1; + unsigned char : 1; + unsigned char B2 : 1; + unsigned char : 1; + unsigned char B0 : 1; +#endif +}; + +union un_port6_ord1 +{ + unsigned char BYTE; + struct st_port6_ord1_bit BIT; +}; + +struct st_port6_pcr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char B0 : 1; + unsigned char B1 : 1; + unsigned char B2 : 1; + unsigned char B3 : 1; + unsigned char B4 : 1; + unsigned char B5 : 1; + unsigned char B6 : 1; + unsigned char B7 : 1; +#else + unsigned char B7 : 1; + unsigned char B6 : 1; + unsigned char B5 : 1; + unsigned char B4 : 1; + unsigned char B3 : 1; + unsigned char B2 : 1; + unsigned char B1 : 1; + unsigned char B0 : 1; +#endif +}; + +union un_port6_pcr +{ + unsigned char BYTE; + struct st_port6_pcr_bit BIT; +}; + +struct st_can_mb_id_word +{ + unsigned short H; + unsigned short L; +}; + +struct st_can_mb_id_byte +{ + unsigned char HH; + unsigned char HL; + unsigned char LH; + unsigned char LL; +}; + +struct st_can_mb_id_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long EID : 18; + unsigned long SID : 11; + unsigned long : 1; + unsigned long RTR : 1; + unsigned long IDE : 1; +#else + unsigned long IDE : 1; + unsigned long RTR : 1; + unsigned long : 1; + unsigned long SID : 11; + unsigned long EID : 18; +#endif +}; + +union un_can_id +{ + unsigned long LONG; + struct st_can_mb_id_word WORD; + struct st_can_mb_id_byte BYTE; + struct st_can_mb_id_bit BIT; +}; + +struct st_can_mb +{ + union un_can_id ID; + unsigned short DLC; + unsigned char DATA[8]; + unsigned short TS; +}; + +struct st_can_mkr_word +{ + unsigned short H; + unsigned short L; +}; + +struct st_can_mkr_byte +{ + unsigned char HH; + unsigned char HL; + unsigned char LH; + unsigned char LL; +}; + +struct st_can_mkr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long EID : 18; + unsigned long SID : 11; + unsigned long : 3; +#else + unsigned long : 3; + unsigned long SID : 11; + unsigned long EID : 18; +#endif +}; + +union un_can_mkr +{ + unsigned long LONG; + struct st_can_mkr_word WORD; + struct st_can_mkr_byte BYTE; + struct st_can_mkr_bit BIT; +}; + +struct st_can_fidcr0_word +{ + unsigned short H; + unsigned short L; +}; + +struct st_can_fidcr0_byte +{ + unsigned char HH; + unsigned char HL; + unsigned char LH; + unsigned char LL; +}; + +struct st_can_fidcr0_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long EID : 18; + unsigned long SID : 11; + unsigned long : 1; + unsigned long RTR : 1; + unsigned long IDE : 1; +#else + unsigned long IDE : 1; + unsigned long RTR : 1; + unsigned long : 1; + unsigned long SID : 11; + unsigned long EID : 18; +#endif +}; + +union un_can_fidcr0 +{ + unsigned long LONG; + struct st_can_fidcr0_word WORD; + struct st_can_fidcr0_byte BYTE; + struct st_can_fidcr0_bit BIT; +}; + +struct st_can_fidcr1_word +{ + unsigned short H; + unsigned short L; +}; + +struct st_can_fidcr1_byte +{ + unsigned char HH; + unsigned char HL; + unsigned char LH; + unsigned char LL; +}; + +struct st_can_fidcr1_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long EID : 18; + unsigned long SID : 11; + unsigned long : 1; + unsigned long RTR : 1; + unsigned long IDE : 1; +#else + unsigned long IDE : 1; + unsigned long RTR : 1; + unsigned long : 1; + unsigned long SID : 11; + unsigned long EID : 18; +#endif +}; + +union un_can_fidcr1 +{ + unsigned long LONG; + struct st_can_fidcr1_word WORD; + struct st_can_fidcr1_byte BYTE; + struct st_can_fidcr1_bit BIT; +}; + +struct st_can_mkivlr_word +{ + unsigned short H; + unsigned short L; +}; + +struct st_can_mkivlr_byte +{ + unsigned char HH; + unsigned char HL; + unsigned char LH; + unsigned char LL; +}; + +struct st_can_mkivlr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long MB0 : 1; + unsigned long MB1 : 1; + unsigned long MB2 : 1; + unsigned long MB3 : 1; + unsigned long MB4 : 1; + unsigned long MB5 : 1; + unsigned long MB6 : 1; + unsigned long MB7 : 1; + unsigned long MB8 : 1; + unsigned long MB9 : 1; + unsigned long MB10 : 1; + unsigned long MB11 : 1; + unsigned long MB12 : 1; + unsigned long MB13 : 1; + unsigned long MB14 : 1; + unsigned long MB15 : 1; + unsigned long MB16 : 1; + unsigned long MB17 : 1; + unsigned long MB18 : 1; + unsigned long MB19 : 1; + unsigned long MB20 : 1; + unsigned long MB21 : 1; + unsigned long MB22 : 1; + unsigned long MB23 : 1; + unsigned long MB24 : 1; + unsigned long MB25 : 1; + unsigned long MB26 : 1; + unsigned long MB27 : 1; + unsigned long MB28 : 1; + unsigned long MB29 : 1; + unsigned long MB30 : 1; + unsigned long MB31 : 1; +#else + unsigned long MB31 : 1; + unsigned long MB30 : 1; + unsigned long MB29 : 1; + unsigned long MB28 : 1; + unsigned long MB27 : 1; + unsigned long MB26 : 1; + unsigned long MB25 : 1; + unsigned long MB24 : 1; + unsigned long MB23 : 1; + unsigned long MB22 : 1; + unsigned long MB21 : 1; + unsigned long MB20 : 1; + unsigned long MB19 : 1; + unsigned long MB18 : 1; + unsigned long MB17 : 1; + unsigned long MB16 : 1; + unsigned long MB15 : 1; + unsigned long MB14 : 1; + unsigned long MB13 : 1; + unsigned long MB12 : 1; + unsigned long MB11 : 1; + unsigned long MB10 : 1; + unsigned long MB9 : 1; + unsigned long MB8 : 1; + unsigned long MB7 : 1; + unsigned long MB6 : 1; + unsigned long MB5 : 1; + unsigned long MB4 : 1; + unsigned long MB3 : 1; + unsigned long MB2 : 1; + unsigned long MB1 : 1; + unsigned long MB0 : 1; +#endif +}; + +union un_can_mkivlr +{ + unsigned long LONG; + struct st_can_mkivlr_word WORD; + struct st_can_mkivlr_byte BYTE; + struct st_can_mkivlr_bit BIT; +}; + +struct st_can_mier_word +{ + unsigned short H; + unsigned short L; +}; + +struct st_can_mier_byte +{ + unsigned char HH; + unsigned char HL; + unsigned char LH; + unsigned char LL; +}; + +struct st_can_mier_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long MB0 : 1; + unsigned long MB1 : 1; + unsigned long MB2 : 1; + unsigned long MB3 : 1; + unsigned long MB4 : 1; + unsigned long MB5 : 1; + unsigned long MB6 : 1; + unsigned long MB7 : 1; + unsigned long MB8 : 1; + unsigned long MB9 : 1; + unsigned long MB10 : 1; + unsigned long MB11 : 1; + unsigned long MB12 : 1; + unsigned long MB13 : 1; + unsigned long MB14 : 1; + unsigned long MB15 : 1; + unsigned long MB16 : 1; + unsigned long MB17 : 1; + unsigned long MB18 : 1; + unsigned long MB19 : 1; + unsigned long MB20 : 1; + unsigned long MB21 : 1; + unsigned long MB22 : 1; + unsigned long MB23 : 1; + unsigned long MB24 : 1; + unsigned long MB25 : 1; + unsigned long MB26 : 1; + unsigned long MB27 : 1; + unsigned long MB28 : 1; + unsigned long MB29 : 1; + unsigned long MB30 : 1; + unsigned long MB31 : 1; +#else + unsigned long MB31 : 1; + unsigned long MB30 : 1; + unsigned long MB29 : 1; + unsigned long MB28 : 1; + unsigned long MB27 : 1; + unsigned long MB26 : 1; + unsigned long MB25 : 1; + unsigned long MB24 : 1; + unsigned long MB23 : 1; + unsigned long MB22 : 1; + unsigned long MB21 : 1; + unsigned long MB20 : 1; + unsigned long MB19 : 1; + unsigned long MB18 : 1; + unsigned long MB17 : 1; + unsigned long MB16 : 1; + unsigned long MB15 : 1; + unsigned long MB14 : 1; + unsigned long MB13 : 1; + unsigned long MB12 : 1; + unsigned long MB11 : 1; + unsigned long MB10 : 1; + unsigned long MB9 : 1; + unsigned long MB8 : 1; + unsigned long MB7 : 1; + unsigned long MB6 : 1; + unsigned long MB5 : 1; + unsigned long MB4 : 1; + unsigned long MB3 : 1; + unsigned long MB2 : 1; + unsigned long MB1 : 1; + unsigned long MB0 : 1; +#endif +}; + +union un_can_mier +{ + unsigned long LONG; + struct st_can_mier_word WORD; + struct st_can_mier_byte BYTE; + struct st_can_mier_bit BIT; +}; + +struct st_can_mctl_bit_tx +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char SENTDATA : 1; + unsigned char TRMACTIVE : 1; + unsigned char TRMABT : 1; + unsigned char : 1; + unsigned char ONESHOT : 1; + unsigned char : 1; + unsigned char RECREQ : 1; + unsigned char TRMREQ : 1; +#else + unsigned char TRMREQ : 1; + unsigned char RECREQ : 1; + unsigned char : 1; + unsigned char ONESHOT : 1; + unsigned char : 1; + unsigned char TRMABT : 1; + unsigned char TRMACTIVE : 1; + unsigned char SENTDATA : 1; +#endif +}; + +struct st_can_mctl_bit_rx +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char NEWDATA : 1; + unsigned char INVALDATA : 1; + unsigned char MSGLOST : 1; + unsigned char : 1; + unsigned char ONESHOT : 1; + unsigned char : 1; + unsigned char RECREQ : 1; + unsigned char TRMREQ : 1; +#else + unsigned char TRMREQ : 1; + unsigned char RECREQ : 1; + unsigned char : 1; + unsigned char ONESHOT : 1; + unsigned char : 1; + unsigned char MSGLOST : 1; + unsigned char INVALDATA : 1; + unsigned char NEWDATA : 1; +#endif +}; + +union un_can_mctl_bit +{ + struct st_can_mctl_bit_tx TX; + struct st_can_mctl_bit_rx RX; +}; + +union un_can_mctl +{ + unsigned char BYTE; +}; + +struct st_can_ctlr_byte +{ + unsigned char H; + unsigned char L; +}; + +struct st_can_ctlr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned short MBM : 1; + unsigned short IDFM : 2; + unsigned short MLM : 1; + unsigned short TPM : 1; + unsigned short TSRC : 1; + unsigned short TSPS : 2; + unsigned short CANM : 2; + unsigned short SLPM : 1; + unsigned short BOM : 2; + unsigned short RBOC : 1; + unsigned short : 2; +#else + unsigned short : 2; + unsigned short RBOC : 1; + unsigned short BOM : 2; + unsigned short SLPM : 1; + unsigned short CANM : 2; + unsigned short TSPS : 2; + unsigned short TSRC : 1; + unsigned short TPM : 1; + unsigned short MLM : 1; + unsigned short IDFM : 2; + unsigned short MBM : 1; +#endif +}; + +union un_can_ctlr +{ + unsigned short WORD; + struct st_can_ctlr_byte BYTE; + struct st_can_ctlr_bit BIT; +}; + +struct st_can_str_byte +{ + unsigned char H; + unsigned char L; +}; + +struct st_can_str_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned short NDST : 1; + unsigned short SDST : 1; + unsigned short RFST : 1; + unsigned short TFST : 1; + unsigned short NMLST : 1; + unsigned short FMLST : 1; + unsigned short TABST : 1; + unsigned short EST : 1; + unsigned short RSTST : 1; + unsigned short HLTST : 1; + unsigned short SLPST : 1; + unsigned short EPST : 1; + unsigned short BOST : 1; + unsigned short TRMST : 1; + unsigned short RECST : 1; + unsigned short : 1; +#else + unsigned short : 1; + unsigned short RECST : 1; + unsigned short TRMST : 1; + unsigned short BOST : 1; + unsigned short EPST : 1; + unsigned short SLPST : 1; + unsigned short HLTST : 1; + unsigned short RSTST : 1; + unsigned short EST : 1; + unsigned short TABST : 1; + unsigned short FMLST : 1; + unsigned short NMLST : 1; + unsigned short TFST : 1; + unsigned short RFST : 1; + unsigned short SDST : 1; + unsigned short NDST : 1; +#endif +}; + +union un_can_str +{ + unsigned short WORD; + struct st_can_str_byte BYTE; + struct st_can_str_bit BIT; +}; + +struct st_can_bcr_word +{ + unsigned short H; + unsigned short L; +}; + +struct st_can_bcr_byte +{ + unsigned char HH; + unsigned char HL; + unsigned char LH; + unsigned char LL; +}; + +struct st_can_bcr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long CCLKS : 1; + unsigned long : 7; + unsigned long TSEG2 : 3; + unsigned long : 1; + unsigned long SJW : 2; + unsigned long : 2; + unsigned long BRP : 10; + unsigned long : 2; + unsigned long TSEG1 : 4; +#else + unsigned long TSEG1 : 4; + unsigned long : 2; + unsigned long BRP : 10; + unsigned long : 2; + unsigned long SJW : 2; + unsigned long : 1; + unsigned long TSEG2 : 3; + unsigned long : 7; + unsigned long CCLKS : 1; +#endif +}; + +union un_can_bcr +{ + unsigned long LONG; + struct st_can_bcr_word WORD; + struct st_can_bcr_byte BYTE; + struct st_can_bcr_bit BIT; +}; + +struct st_can_rfcr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char RFE : 1; + unsigned char RFUST : 3; + unsigned char RFMLF : 1; + unsigned char RFFST : 1; + unsigned char RFWST : 1; + unsigned char RFEST : 1; +#else + unsigned char RFEST : 1; + unsigned char RFWST : 1; + unsigned char RFFST : 1; + unsigned char RFMLF : 1; + unsigned char RFUST : 3; + unsigned char RFE : 1; +#endif +}; + +union un_can_rfcr +{ + unsigned char BYTE; + struct st_can_rfcr_bit BIT; +}; + +struct st_can_tfcr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char TFE : 1; + unsigned char TFUST : 3; + unsigned char : 2; + unsigned char TFFST : 1; + unsigned char TFEST : 1; +#else + unsigned char TFEST : 1; + unsigned char TFFST : 1; + unsigned char : 2; + unsigned char TFUST : 3; + unsigned char TFE : 1; +#endif +}; + +union un_can_tfcr +{ + unsigned char BYTE; + struct st_can_tfcr_bit BIT; +}; + +struct st_can_eier_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char BEIE : 1; + unsigned char EWIE : 1; + unsigned char EPIE : 1; + unsigned char BOEIE : 1; + unsigned char BORIE : 1; + unsigned char ORIE : 1; + unsigned char OLIE : 1; + unsigned char BLIE : 1; +#else + unsigned char BLIE : 1; + unsigned char OLIE : 1; + unsigned char ORIE : 1; + unsigned char BORIE : 1; + unsigned char BOEIE : 1; + unsigned char EPIE : 1; + unsigned char EWIE : 1; + unsigned char BEIE : 1; +#endif +}; + +union un_can_eier +{ + unsigned char BYTE; + struct st_can_eier_bit BIT; +}; + +struct st_can_eifr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char BEIF : 1; + unsigned char EWIF : 1; + unsigned char EPIF : 1; + unsigned char BOEIF : 1; + unsigned char BORIF : 1; + unsigned char ORIF : 1; + unsigned char OLIF : 1; + unsigned char BLIF : 1; +#else + unsigned char BLIF : 1; + unsigned char OLIF : 1; + unsigned char ORIF : 1; + unsigned char BORIF : 1; + unsigned char BOEIF : 1; + unsigned char EPIF : 1; + unsigned char EWIF : 1; + unsigned char BEIF : 1; +#endif +}; + +union un_can_eifr +{ + unsigned char BYTE; + struct st_can_eifr_bit BIT; +}; + +struct st_can_ecsr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char SEF : 1; + unsigned char FEF : 1; + unsigned char AEF : 1; + unsigned char CEF : 1; + unsigned char BE1F : 1; + unsigned char BE0F : 1; + unsigned char ADEF : 1; + unsigned char EDPM : 1; +#else + unsigned char EDPM : 1; + unsigned char ADEF : 1; + unsigned char BE0F : 1; + unsigned char BE1F : 1; + unsigned char CEF : 1; + unsigned char AEF : 1; + unsigned char FEF : 1; + unsigned char SEF : 1; +#endif +}; + +union un_can_ecsr +{ + unsigned char BYTE; + struct st_can_ecsr_bit BIT; +}; + +struct st_can_mssr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char MBNST : 5; + unsigned char : 2; + unsigned char SEST : 1; +#else + unsigned char SEST : 1; + unsigned char : 2; + unsigned char MBNST : 5; +#endif +}; + +union un_can_mssr +{ + unsigned char BYTE; + struct st_can_mssr_bit BIT; +}; + +struct st_can_msmr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char MBSM : 2; + unsigned char : 6; +#else + unsigned char : 6; + unsigned char MBSM : 2; +#endif +}; + +union un_can_msmr +{ + unsigned char BYTE; + struct st_can_msmr_bit BIT; +}; + +struct st_can_tcr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char TSTE : 1; + unsigned char TSTM : 2; + unsigned char : 5; +#else + unsigned char : 5; + unsigned char TSTM : 2; + unsigned char TSTE : 1; +#endif +}; + +union un_can_tcr +{ + unsigned char BYTE; + struct st_can_tcr_bit BIT; +}; + +struct st_dmac_dmast_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char DMST : 1; + unsigned char : 7; +#else + unsigned char : 7; + unsigned char DMST : 1; +#endif +}; + +union un_dmac_dmast +{ + unsigned char BYTE; + struct st_dmac_dmast_bit BIT; +}; + +struct st_dmac_dmist_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char : 4; + unsigned char DMIS4 : 1; + unsigned char DMIS5 : 1; + unsigned char DMIS6 : 1; + unsigned char DMIS7 : 1; +#else + unsigned char DMIS7 : 1; + unsigned char DMIS6 : 1; + unsigned char DMIS5 : 1; + unsigned char DMIS4 : 1; + unsigned char : 4; +#endif +}; + +union un_dmac_dmist +{ + unsigned char BYTE; + struct st_dmac_dmist_bit BIT; +}; + +struct st_dmac0_dmtmd_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned short DCTG : 2; + unsigned short : 6; + unsigned short SZ : 2; + unsigned short : 2; + unsigned short DTS : 2; + unsigned short MD : 2; +#else + unsigned short MD : 2; + unsigned short DTS : 2; + unsigned short : 2; + unsigned short SZ : 2; + unsigned short : 6; + unsigned short DCTG : 2; +#endif +}; + +union un_dmac0_dmtmd +{ + unsigned short WORD; + struct st_dmac0_dmtmd_bit BIT; +}; + +struct st_dmac0_dmint_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char DARIE : 1; + unsigned char SARIE : 1; + unsigned char RPTIE : 1; + unsigned char ESIE : 1; + unsigned char DTIE : 1; + unsigned char : 3; +#else + unsigned char : 3; + unsigned char DTIE : 1; + unsigned char ESIE : 1; + unsigned char RPTIE : 1; + unsigned char SARIE : 1; + unsigned char DARIE : 1; +#endif +}; + +union un_dmac0_dmint +{ + unsigned char BYTE; + struct st_dmac0_dmint_bit BIT; +}; + +struct un_dmac0_dmamd_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned short DARA : 5; + unsigned short : 1; + unsigned short DM : 2; + unsigned short SARA : 5; + unsigned short : 1; + unsigned short SM : 2; +#else + unsigned short SM : 2; + unsigned short : 1; + unsigned short SARA : 5; + unsigned short DM : 2; + unsigned short : 1; + unsigned short DARA : 5; +#endif +}; + +union un_dmac0_dmamd +{ + unsigned short WORD; + struct un_dmac0_dmamd_bit BIT; +}; + +struct st_dmac0_dmcnt_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char DTE : 1; + unsigned char : 7; +#else + unsigned char : 7; + unsigned char DTE : 1; +#endif +}; + +union un_dmac0_dmcnt +{ + unsigned char BYTE; + struct st_dmac0_dmcnt_bit BIT; +}; + +struct st_dmac0_dmreq_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char SWREQ : 1; + unsigned char : 3; + unsigned char CLRS : 1; + unsigned char : 3; +#else + unsigned char : 3; + unsigned char CLRS : 1; + unsigned char : 3; + unsigned char SWREQ : 1; +#endif +}; + +union un_dmac0_dmreq +{ + unsigned char BYTE; + struct st_dmac0_dmreq_bit BIT; +}; + +struct st_dmac0_dmsts_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char ESIF : 1; + unsigned char : 3; + unsigned char DTIF : 1; + unsigned char : 2; + unsigned char ACT : 1; +#else + unsigned char ACT : 1; + unsigned char : 2; + unsigned char DTIF : 1; + unsigned char : 3; + unsigned char ESIF : 1; +#endif +}; + +union un_dmac0_dmsts +{ + unsigned char BYTE; + struct st_dmac0_dmsts_bit BIT; +}; + +struct st_dmac0_dmcsl_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char DISEL : 1; + unsigned char : 7; +#else + unsigned char : 7; + unsigned char DISEL : 1; +#endif +}; + +union un_dmac0_dmcsl +{ + unsigned char BYTE; + struct st_dmac0_dmcsl_bit BIT; +}; + +struct st_dmac1_dmtmd_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned short DCTG : 2; + unsigned short : 6; + unsigned short SZ : 2; + unsigned short : 2; + unsigned short DTS : 2; + unsigned short MD : 2; +#else + unsigned short MD : 2; + unsigned short DTS : 2; + unsigned short : 2; + unsigned short SZ : 2; + unsigned short : 6; + unsigned short DCTG : 2; +#endif +}; + +union un_dmac1_dmtmd +{ + unsigned short WORD; + struct st_dmac1_dmtmd_bit BIT; +}; + +struct st_dmac1_dmint_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char DARIE : 1; + unsigned char SARIE : 1; + unsigned char RPTIE : 1; + unsigned char ESIE : 1; + unsigned char DTIE : 1; + unsigned char : 3; +#else + unsigned char : 3; + unsigned char DTIE : 1; + unsigned char ESIE : 1; + unsigned char RPTIE : 1; + unsigned char SARIE : 1; + unsigned char DARIE : 1; +#endif +}; + +union un_dmac1_dmint +{ + unsigned char BYTE; + struct st_dmac1_dmint_bit BIT; +}; + +struct st_dmac1_dmamd_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned short DARA : 5; + unsigned short : 1; + unsigned short DM : 2; + unsigned short SARA : 5; + unsigned short : 1; + unsigned short SM : 2; +#else + unsigned short SM : 2; + unsigned short : 1; + unsigned short SARA : 5; + unsigned short DM : 2; + unsigned short : 1; + unsigned short DARA : 5; +#endif +}; + +union un_dmac1_dmamd +{ + unsigned short WORD; + struct st_dmac1_dmamd_bit BIT; +}; + +struct st_dmac1_dmcnt_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char DTE : 1; + unsigned char : 7; +#else + unsigned char : 7; + unsigned char DTE : 1; +#endif +}; + +union un_dmac1_dmcnt +{ + unsigned char BYTE; + struct st_dmac1_dmcnt_bit BIT; +}; + +struct st_dmac1_dmreq_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char SWREQ : 1; + unsigned char : 3; + unsigned char CLRS : 1; + unsigned char : 3; +#else + unsigned char : 3; + unsigned char CLRS : 1; + unsigned char : 3; + unsigned char SWREQ : 1; +#endif +}; + +union un_dmac1_dmreq +{ + unsigned char BYTE; + struct st_dmac1_dmreq_bit BIT; +}; + +struct st_dmac1_dmsts_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char ESIF : 1; + unsigned char : 3; + unsigned char DTIF : 1; + unsigned char : 2; + unsigned char ACT : 1; +#else + unsigned char ACT : 1; + unsigned char : 2; + unsigned char DTIF : 1; + unsigned char : 3; + unsigned char ESIF : 1; +#endif +}; + +union un_dmac1_dmsts +{ + unsigned char BYTE; + struct st_dmac1_dmsts_bit BIT; +}; + +struct st_dmac1_dmcsl_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char DISEL : 1; + unsigned char : 7; +#else + unsigned char : 7; + unsigned char DISEL : 1; +#endif +}; + +union un_dmac1_dmcsl +{ + unsigned char BYTE; + struct st_dmac1_dmcsl_bit BIT; +}; + +struct st_drw2d_control_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long LIM1EN : 1; + unsigned long LIM2EN : 1; + unsigned long LIM3EN : 1; + unsigned long LIM4EN : 1; + unsigned long LIM5EN : 1; + unsigned long LIM6EN : 1; + unsigned long QUAD1EN : 1; + unsigned long QUAD2EN : 1; + unsigned long QUAD3EN : 1; + unsigned long LIM1TH : 1; + unsigned long LIM2TH : 1; + unsigned long LIM3TH : 1; + unsigned long LIM4TH : 1; + unsigned long LIM5TH : 1; + unsigned long LIM6TH : 1; + unsigned long BAND1EN : 1; + unsigned long BAND2EN : 1; + unsigned long UNION12 : 1; + unsigned long UNION34 : 1; + unsigned long UNION56 : 1; + unsigned long UNIONAB : 1; + unsigned long UNIONCD : 1; + unsigned long SPANABT : 1; + unsigned long SPANSTR : 1; + unsigned long : 8; +#else + unsigned long : 8; + unsigned long SPANSTR : 1; + unsigned long SPANABT : 1; + unsigned long UNIONCD : 1; + unsigned long UNIONAB : 1; + unsigned long UNION56 : 1; + unsigned long UNION34 : 1; + unsigned long UNION12 : 1; + unsigned long BAND2EN : 1; + unsigned long BAND1EN : 1; + unsigned long LIM6TH : 1; + unsigned long LIM5TH : 1; + unsigned long LIM4TH : 1; + unsigned long LIM3TH : 1; + unsigned long LIM2TH : 1; + unsigned long LIM1TH : 1; + unsigned long QUAD3EN : 1; + unsigned long QUAD2EN : 1; + unsigned long QUAD1EN : 1; + unsigned long LIM6EN : 1; + unsigned long LIM5EN : 1; + unsigned long LIM4EN : 1; + unsigned long LIM3EN : 1; + unsigned long LIM2EN : 1; + unsigned long LIM1EN : 1; +#endif +}; + +union un_drw2d_control +{ + unsigned long LONG; + struct st_drw2d_control_bit BIT; +}; + +struct st_drw2d_status_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long BSYENUM : 1; + unsigned long BSYWR : 1; + unsigned long CACHEDTY : 1; + unsigned long DLSTACT : 1; + unsigned long ENUIR : 1; + unsigned long DLIR : 1; + unsigned long : 26; +#else + unsigned long : 26; + unsigned long DLIR : 1; + unsigned long ENUIR : 1; + unsigned long DLSTACT : 1; + unsigned long CACHEDTY : 1; + unsigned long BSYWR : 1; + unsigned long BSYENUM : 1; +#endif +}; + +union un_drw2d_status +{ + unsigned long LONG; + struct st_drw2d_status_bit BIT; +}; + +struct st_drw2d_control2_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long PTNEN : 1; + unsigned long TEXENA : 1; + unsigned long PTNSRCL5 : 1; + unsigned long USEACB : 1; + unsigned long RDFMT2 : 2; + unsigned long BSFA : 1; + unsigned long BDFA : 1; + unsigned long WRFMT2 : 1; + unsigned long BSF : 1; + unsigned long BDF : 1; + unsigned long BSI : 1; + unsigned long BDI : 1; + unsigned long BC2 : 1; + unsigned long TEXCLPX : 1; + unsigned long TEXCLPY : 1; + unsigned long TEXFILTX : 1; + unsigned long TEXFILTY : 1; + unsigned long RDFMT : 2; + unsigned long WRFMT : 2; + unsigned long WRALPHA : 2; + unsigned long RLEEN : 1; + unsigned long CLUTEN : 1; + unsigned long COLKEYEN : 1; + unsigned long CLUTFORM : 1; + unsigned long BSIA : 1; + unsigned long BDIA : 1; + unsigned long RLEPIXW : 2; +#else + unsigned long RLEPIXW : 2; + unsigned long BDIA : 1; + unsigned long BSIA : 1; + unsigned long CLUTFORM : 1; + unsigned long COLKEYEN : 1; + unsigned long CLUTEN : 1; + unsigned long RLEEN : 1; + unsigned long WRALPHA : 2; + unsigned long WRFMT : 2; + unsigned long RDFMT : 2; + unsigned long TEXFILTY : 1; + unsigned long TEXFILTX : 1; + unsigned long TEXCLPY : 1; + unsigned long TEXCLPX : 1; + unsigned long BC2 : 1; + unsigned long BDI : 1; + unsigned long BSI : 1; + unsigned long BDF : 1; + unsigned long BSF : 1; + unsigned long WRFMT2 : 1; + unsigned long BDFA : 1; + unsigned long BSFA : 1; + unsigned long RDFMT2 : 2; + unsigned long USEACB : 1; + unsigned long PTNSRCL5 : 1; + unsigned long TEXENA : 1; + unsigned long PTNEN : 1; +#endif +}; + +union un_drw2d_control2 +{ + unsigned long LONG; + struct st_drw2d_control2_bit BIT; +}; + +struct st_drw2d_hwver_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long REV : 12; + unsigned long : 5; + unsigned long DLR : 1; + unsigned long FBCACHE : 1; + unsigned long TXCACHE : 1; + unsigned long PERFCNT : 1; + unsigned long TEXCLUT : 1; + unsigned long : 1; + unsigned long RLEUNIT : 1; + unsigned long TEXCLUT256 : 1; + unsigned long COLKEY : 1; + unsigned long : 1; + unsigned long ACBLD : 1; + unsigned long : 4; +#else + unsigned long : 4; + unsigned long ACBLD : 1; + unsigned long : 1; + unsigned long COLKEY : 1; + unsigned long TEXCLUT256 : 1; + unsigned long RLEUNIT : 1; + unsigned long : 1; + unsigned long TEXCLUT : 1; + unsigned long PERFCNT : 1; + unsigned long TXCACHE : 1; + unsigned long FBCACHE : 1; + unsigned long DLR : 1; + unsigned long : 5; + unsigned long REV : 12; +#endif +}; + +union un_drw2d_hwver +{ + unsigned long LONG; + struct st_drw2d_hwver_bit BIT; +}; + +struct st_drw2d_color1_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long COL1B : 8; + unsigned long COL1G : 8; + unsigned long COL1R : 8; + unsigned long COL1A : 8; +#else + unsigned long COL1A : 8; + unsigned long COL1R : 8; + unsigned long COL1G : 8; + unsigned long COL1B : 8; +#endif +}; + +union un_drw2d_color1 +{ + unsigned long LONG; + struct st_drw2d_color1_bit BIT; +}; + +struct st_drw2d_color2_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long COL2B : 8; + unsigned long COL2G : 8; + unsigned long COL2R : 8; + unsigned long COL2A : 8; +#else + unsigned long COL2A : 8; + unsigned long COL2R : 8; + unsigned long COL2G : 8; + unsigned long COL2B : 8; +#endif +}; + +union un_drw2d_color2 +{ + unsigned long LONG; + struct st_drw2d_color2_bit BIT; +}; + +struct st_drw2d_size_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long X : 16; + unsigned long Y : 16; +#else + unsigned long Y : 16; + unsigned long X : 16; +#endif +}; + +union un_drw2d_size +{ + unsigned long LONG; + struct st_drw2d_size_bit BIT; +}; + +struct st_drw2d_pitch_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long PITCH : 16; + unsigned long SSD : 16; +#else + unsigned long SSD : 16; + unsigned long PITCH : 16; +#endif +}; + +union un_drw2d_pitch +{ + unsigned long LONG; + struct st_drw2d_pitch_bit BIT; +}; + +struct st_drw2d_lvyxaddf_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long LVXADDF : 16; + unsigned long LVYADDF : 16; +#else + unsigned long LVYADDF : 16; + unsigned long LVXADDF : 16; +#endif +}; + +union un_drw2d_lvyxaddf +{ + unsigned long LONG; + struct st_drw2d_lvyxaddf_bit BIT; +}; + +struct st_drw2d_texmsk_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long TEXUMSK : 11; + unsigned long TEXVMSK : 21; +#else + unsigned long TEXVMSK : 21; + unsigned long TEXUMSK : 11; +#endif +}; + +union un_drw2d_texmsk +{ + unsigned long LONG; + struct st_drw2d_texmsk_bit BIT; +}; + +struct st_drw2d_irqctl_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long ENUIREN : 1; + unsigned long DLIREN : 1; + unsigned long ENUIRCLR : 1; + unsigned long DLIRCLR : 1; + unsigned long : 28; +#else + unsigned long : 28; + unsigned long DLIRCLR : 1; + unsigned long ENUIRCLR : 1; + unsigned long DLIREN : 1; + unsigned long ENUIREN : 1; +#endif +}; + +union un_drw2d_irqctl +{ + unsigned long LONG; + struct st_drw2d_irqctl_bit BIT; +}; + +struct st_drw2d_cachectl_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long CENFX : 1; + unsigned long CFLUFX : 1; + unsigned long CENTX : 1; + unsigned long CFLUTX : 1; + unsigned long : 28; +#else + unsigned long : 28; + unsigned long CFLUTX : 1; + unsigned long CENTX : 1; + unsigned long CFLUFX : 1; + unsigned long CENFX : 1; +#endif +}; + +union un_drw2d_cachectl +{ + unsigned long LONG; + struct st_drw2d_cachectl_bit BIT; +}; + +struct st_drw2d_perftrg_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long TRG1 : 16; + unsigned long TRG2 : 16; +#else + unsigned long TRG2 : 16; + unsigned long TRG1 : 16; +#endif +}; + +union un_drw2d_perftrg +{ + unsigned long LONG; + struct st_drw2d_perftrg_bit BIT; +}; + +struct st_drw2d_colkey_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long B : 8; + unsigned long G : 8; + unsigned long R : 8; + unsigned long : 8; +#else + unsigned long : 8; + unsigned long R : 8; + unsigned long G : 8; + unsigned long B : 8; +#endif +}; + +union un_drw2d_colkey +{ + unsigned long LONG; + struct st_drw2d_colkey_bit BIT; +}; + +struct st_dtc_dtccr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char : 4; + unsigned char RRS : 1; + unsigned char : 3; +#else + unsigned char : 3; + unsigned char RRS : 1; + unsigned char : 4; +#endif +}; + +union un_dtc_dtccr +{ + unsigned char BYTE; + struct st_dtc_dtccr_bit BIT; +}; + +struct st_dtc_dtcadmod_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char SHORT : 1; + unsigned char : 7; +#else + unsigned char : 7; + unsigned char SHORT : 1; +#endif +}; + +union un_dtc_dtcadmod +{ + unsigned char BYTE; + struct st_dtc_dtcadmod_bit BIT; +}; + +struct st_dtc_dtcst_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char DTCST : 1; + unsigned char : 7; +#else + unsigned char : 7; + unsigned char DTCST : 1; +#endif +}; + +union un_dtc_dtcst +{ + unsigned char BYTE; + struct st_dtc_dtcst_bit BIT; +}; + +struct st_dtc_dtcsts_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned short VECN : 8; + unsigned short : 7; + unsigned short ACT : 1; +#else + unsigned short ACT : 1; + unsigned short : 7; + unsigned short VECN : 8; +#endif +}; + +union un_dtc_dtcsts +{ + unsigned short WORD; + struct st_dtc_dtcsts_bit BIT; +}; + +struct st_dtc_dtcor_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char SQTFRL : 1; + unsigned char : 7; +#else + unsigned char : 7; + unsigned char SQTFRL : 1; +#endif +}; + +union un_dtc_dtcor +{ + unsigned char BYTE; + struct st_dtc_dtcor_bit BIT; +}; + +struct st_dtc_dtcsqe_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned short VECN : 8; + unsigned short : 7; + unsigned short ESPSEL : 1; +#else + unsigned short ESPSEL : 1; + unsigned short : 7; + unsigned short VECN : 8; +#endif +}; + +union un_dtc_dtcsqe +{ + unsigned short WORD; + struct st_dtc_dtcsqe_bit BIT; +}; + +struct st_edmac_edmr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long SWR : 1; + unsigned long : 3; + unsigned long DL : 2; + unsigned long DE : 1; + unsigned long : 25; +#else + unsigned long : 25; + unsigned long DE : 1; + unsigned long DL : 2; + unsigned long : 3; + unsigned long SWR : 1; +#endif +}; + +union un_edmac_edmr +{ + unsigned long LONG; + struct st_edmac_edmr_bit BIT; +}; + +struct st_edmac_edtrr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long TR : 1; + unsigned long : 31; +#else + unsigned long : 31; + unsigned long TR : 1; +#endif +}; + +union un_edmac_edtrr +{ + unsigned long LONG; + struct st_edmac_edtrr_bit BIT; +}; + +struct st_edmac_edrrr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long RR : 1; + unsigned long : 31; +#else + unsigned long : 31; + unsigned long RR : 1; +#endif +}; + +union un_edmac_edrrr +{ + unsigned long LONG; + struct st_edmac_edrrr_bit BIT; +}; + +struct st_edmac_eesr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long CERF : 1; + unsigned long PRE : 1; + unsigned long RTSF : 1; + unsigned long RTLF : 1; + unsigned long RRF : 1; + unsigned long : 2; + unsigned long RMAF : 1; + unsigned long TRO : 1; + unsigned long CD : 1; + unsigned long DLC : 1; + unsigned long CND : 1; + unsigned long : 4; + unsigned long RFOF : 1; + unsigned long RDE : 1; + unsigned long FR : 1; + unsigned long TFUF : 1; + unsigned long TDE : 1; + unsigned long TC : 1; + unsigned long ECI : 1; + unsigned long : 1; + unsigned long RFCOF : 1; + unsigned long RABT : 1; + unsigned long TABT : 1; + unsigned long : 3; + unsigned long TWB : 1; + unsigned long : 1; +#else + unsigned long : 1; + unsigned long TWB : 1; + unsigned long : 3; + unsigned long TABT : 1; + unsigned long RABT : 1; + unsigned long RFCOF : 1; + unsigned long : 1; + unsigned long ECI : 1; + unsigned long TC : 1; + unsigned long TDE : 1; + unsigned long TFUF : 1; + unsigned long FR : 1; + unsigned long RDE : 1; + unsigned long RFOF : 1; + unsigned long : 4; + unsigned long CND : 1; + unsigned long DLC : 1; + unsigned long CD : 1; + unsigned long TRO : 1; + unsigned long RMAF : 1; + unsigned long : 2; + unsigned long RRF : 1; + unsigned long RTLF : 1; + unsigned long RTSF : 1; + unsigned long PRE : 1; + unsigned long CERF : 1; +#endif +}; + +union un_edmac_eesr +{ + unsigned long LONG; + struct st_edmac_eesr_bit BIT; +}; + +struct st_edmac_eesipr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long CERFIP : 1; + unsigned long PREIP : 1; + unsigned long RTSFIP : 1; + unsigned long RTLFIP : 1; + unsigned long RRFIP : 1; + unsigned long : 2; + unsigned long RMAFIP : 1; + unsigned long TROIP : 1; + unsigned long CDIP : 1; + unsigned long DLCIP : 1; + unsigned long CNDIP : 1; + unsigned long : 4; + unsigned long RFOFIP : 1; + unsigned long RDEIP : 1; + unsigned long FRIP : 1; + unsigned long TFUFIP : 1; + unsigned long TDEIP : 1; + unsigned long TCIP : 1; + unsigned long ECIIP : 1; + unsigned long : 1; + unsigned long RFCOFIP : 1; + unsigned long RABTIP : 1; + unsigned long TABTIP : 1; + unsigned long : 3; + unsigned long TWBIP : 1; + unsigned long : 1; +#else + unsigned long : 1; + unsigned long TWBIP : 1; + unsigned long : 3; + unsigned long TABTIP : 1; + unsigned long RABTIP : 1; + unsigned long RFCOFIP : 1; + unsigned long : 1; + unsigned long ECIIP : 1; + unsigned long TCIP : 1; + unsigned long TDEIP : 1; + unsigned long TFUFIP : 1; + unsigned long FRIP : 1; + unsigned long RDEIP : 1; + unsigned long RFOFIP : 1; + unsigned long : 4; + unsigned long CNDIP : 1; + unsigned long DLCIP : 1; + unsigned long CDIP : 1; + unsigned long TROIP : 1; + unsigned long RMAFIP : 1; + unsigned long : 2; + unsigned long RRFIP : 1; + unsigned long RTLFIP : 1; + unsigned long RTSFIP : 1; + unsigned long PREIP : 1; + unsigned long CERFIP : 1; +#endif +}; + +union un_edmac_eesipr +{ + unsigned long LONG; + struct st_edmac_eesipr_bit BIT; +}; + +struct st_edmac_trscer_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long : 4; + unsigned long RRFCE : 1; + unsigned long : 2; + unsigned long RMAFCE : 1; + unsigned long : 24; +#else + unsigned long : 24; + unsigned long RMAFCE : 1; + unsigned long : 2; + unsigned long RRFCE : 1; + unsigned long : 4; +#endif +}; + +union un_edmac_trscer +{ + unsigned long LONG; + struct st_edmac_trscer_bit BIT; +}; + +struct st_edmac_rmfcr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long MFC : 16; + unsigned long : 16; +#else + unsigned long : 16; + unsigned long MFC : 16; +#endif +}; + +union un_edmac_rmfcr +{ + unsigned long LONG; + struct st_edmac_rmfcr_bit BIT; +}; + +struct st_edmac_tftr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long TFT : 11; + unsigned long : 21; +#else + unsigned long : 21; + unsigned long TFT : 11; +#endif +}; + +union un_edmac_tftr +{ + unsigned long LONG; + struct st_edmac_tftr_bit BIT; +}; + +struct st_edamc_fdr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long RFD : 5; + unsigned long : 3; + unsigned long TFD : 5; + unsigned long : 19; +#else + unsigned long : 19; + unsigned long TFD : 5; + unsigned long : 3; + unsigned long RFD : 5; +#endif +}; + +union un_edmac_fdr +{ + unsigned long LONG; + struct st_edamc_fdr_bit BIT; +}; + +struct st_edmac_rmcr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long RNR : 1; + unsigned long : 31; +#else + unsigned long : 31; + unsigned long RNR : 1; +#endif +}; + +union un_edmac_rmcr +{ + unsigned long LONG; + struct st_edmac_rmcr_bit BIT; +}; + +struct st_edmac_tfucr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long UNDER : 16; + unsigned long : 16; +#else + unsigned long : 16; + unsigned long UNDER : 16; +#endif +}; + +union un_edmac_tfucr +{ + unsigned long LONG; + struct st_edmac_tfucr_bit BIT; +}; + +struct st_edmac_rfocr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long OVER : 16; + unsigned long : 16; +#else + unsigned long : 16; + unsigned long OVER : 16; +#endif +}; + +union un_edmac_rfocr +{ + unsigned long LONG; + struct st_edmac_rfocr_bit BIT; +}; + +struct st_edmac_iosr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long ELB : 1; + unsigned long : 31; +#else + unsigned long : 31; + unsigned long ELB : 1; +#endif +}; + +union un_edmac_iosr +{ + unsigned long LONG; + struct st_edmac_iosr_bit BIT; +}; + +struct st_edmac_fcftr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long RFDO : 3; + unsigned long : 13; + unsigned long RFFO : 3; + unsigned long : 13; +#else + unsigned long : 13; + unsigned long RFFO : 3; + unsigned long : 13; + unsigned long RFDO : 3; +#endif +}; + +union un_edmac_fcftr +{ + unsigned long LONG; + struct st_edmac_fcftr_bit BIT; +}; + +struct st_edmac_rpadir_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long PADR : 6; + unsigned long : 10; + unsigned long PADS : 2; + unsigned long : 14; +#else + unsigned long : 14; + unsigned long PADS : 2; + unsigned long : 10; + unsigned long PADR : 6; +#endif +}; + +union un_edmac_rpadir +{ + unsigned long LONG; + struct st_edmac_rpadir_bit BIT; +}; + +struct st_edmac_trmid_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long TIS : 1; + unsigned long : 3; + unsigned long TIM : 1; + unsigned long : 27; +#else + unsigned long : 27; + unsigned long TIM : 1; + unsigned long : 3; + unsigned long TIS : 1; +#endif +}; + +union un_edmac_trimd +{ + unsigned long LONG; + struct st_edmac_trmid_bit BIT; +}; + +struct st_elc_elcr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char : 7; + unsigned char ELCON : 1; +#else + unsigned char ELCON : 1; + unsigned char : 7; +#endif +}; + +union un_elc_elcr +{ + unsigned char BYTE; + struct st_elc_elcr_bit BIT; +}; + +struct st_elc_elsr0_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char ELS : 8; +#else + unsigned char ELS : 8; +#endif +}; + +union un_elc_elsr0 +{ + unsigned char BYTE; + struct st_elc_elsr0_bit BIT; +}; + +struct st_elc_elsr3_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char ELS : 8; +#else + unsigned char ELS : 8; +#endif +}; + +union un_elc_elsr3 +{ + unsigned char BYTE; + struct st_elc_elsr3_bit BIT; +}; + +struct st_elc_elsr4_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char ELS : 8; +#else + unsigned char ELS : 8; +#endif +}; + +union un_elc_elsr4 +{ + unsigned char BYTE; + struct st_elc_elsr4_bit BIT; +}; + +struct st_elc_elsr7_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char ELS : 8; +#else + unsigned char ELS : 8; +#endif +}; + +union un_elc_elsr7 +{ + unsigned char BYTE; + struct st_elc_elsr7_bit BIT; +}; + +struct st_elc_elsr10_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char ELS : 8; +#else + unsigned char ELS : 8; +#endif +}; + +union un_elc_elsr10 +{ + unsigned char BYTE; + struct st_elc_elsr10_bit BIT; +}; + +struct st_elc_elsr11_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char ELS : 8; +#else + unsigned char ELS : 8; +#endif +}; + +union un_elc_elsr11 +{ + unsigned char BYTE; + struct st_elc_elsr11_bit BIT; +}; + +struct st_elc_elsr12_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char ELS : 8; +#else + unsigned char ELS : 8; +#endif +}; + +union un_elc_elsr12 +{ + unsigned char BYTE; + struct st_elc_elsr12_bit BIT; +}; + +struct st_elc_elsr13_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char ELS : 8; +#else + unsigned char ELS : 8; +#endif +}; + +union un_elc_elsr13 +{ + unsigned char BYTE; + struct st_elc_elsr13_bit BIT; +}; + +struct st_elc_elsr15_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char ELS : 8; +#else + unsigned char ELS : 8; +#endif +}; + +union un_elc_elsr15 +{ + unsigned char BYTE; + struct st_elc_elsr15_bit BIT; +}; + +struct st_elc_elsr16_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char ELS : 8; +#else + unsigned char ELS : 8; +#endif +}; + +union un_elc_elsr16 +{ + unsigned char BYTE; + struct st_elc_elsr16_bit BIT; +}; + +struct st_elc_elsr18_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char ELS : 8; +#else + unsigned char ELS : 8; +#endif +}; + +union un_elc_elsr18 +{ + unsigned char BYTE; + struct st_elc_elsr18_bit BIT; +}; + +struct st_elc_elsr19_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char ELS : 8; +#else + unsigned char ELS : 8; +#endif +}; + +union un_elc_elsr19 +{ + unsigned char BYTE; + struct st_elc_elsr19_bit BIT; +}; + +struct st_elc_elsr20_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char ELS : 8; +#else + unsigned char ELS : 8; +#endif +}; + +union un_elc_elsr20 +{ + unsigned char BYTE; + struct st_elc_elsr20_bit BIT; +}; + +struct st_elc_elsr21_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char ELS : 8; +#else + unsigned char ELS : 8; +#endif +}; + +union un_elc_elsr21 +{ + unsigned char BYTE; + struct st_elc_elsr21_bit BIT; +}; + +struct st_elc_elsr22_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char ELS : 8; +#else + unsigned char ELS : 8; +#endif +}; + +union un_elc_elsr22 +{ + unsigned char BYTE; + struct st_elc_elsr22_bit BIT; +}; + +struct st_elc_elsr23_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char ELS : 8; +#else + unsigned char ELS : 8; +#endif +}; + +union un_elc_elsr23 +{ + unsigned char BYTE; + struct st_elc_elsr23_bit BIT; +}; + +struct st_elc_elsr24_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char ELS : 8; +#else + unsigned char ELS : 8; +#endif +}; + +union un_elc_elsr24 +{ + unsigned char BYTE; + struct st_elc_elsr24_bit BIT; +}; + +struct st_elc_elsr25_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char ELS : 8; +#else + unsigned char ELS : 8; +#endif +}; + +union un_elc_elsr25 +{ + unsigned char BYTE; + struct st_elc_elsr25_bit BIT; +}; + +struct st_elc_elsr26_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char ELS : 8; +#else + unsigned char ELS : 8; +#endif +}; + +union un_elc_elsr26 +{ + unsigned char BYTE; + struct st_elc_elsr26_bit BIT; +}; + +struct st_elc_elsr27_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char ELS : 8; +#else + unsigned char ELS : 8; +#endif +}; + +union un_elc_elsr27 +{ + unsigned char BYTE; + struct st_elc_elsr27_bit BIT; +}; + +struct st_elc_elsr28_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char ELS : 8; +#else + unsigned char ELS : 8; +#endif +}; + +union un_elc_elsr28 +{ + unsigned char BYTE; + struct st_elc_elsr28_bit BIT; +}; + +struct st_elc_elopa_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char MTU0MD : 2; + unsigned char : 4; + unsigned char MTU3MD : 2; +#else + unsigned char MTU3MD : 2; + unsigned char : 4; + unsigned char MTU0MD : 2; +#endif +}; + +union un_elc_elopa +{ + unsigned char BYTE; + struct st_elc_elopa_bit BIT; +}; + +struct st_elc_elopb_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char MTU4MD : 2; + unsigned char : 6; +#else + unsigned char : 6; + unsigned char MTU4MD : 2; +#endif +}; + +union un_elc_elopb +{ + unsigned char BYTE; + struct st_elc_elopb_bit BIT; +}; + +struct st_elc_elopc_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char : 2; + unsigned char CMT1MD : 2; + unsigned char : 4; +#else + unsigned char : 4; + unsigned char CMT1MD : 2; + unsigned char : 2; +#endif +}; + +union un_elc_elopc +{ + unsigned char BYTE; + struct st_elc_elopc_bit BIT; +}; + +struct st_elc_elopd_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char TMR0MD : 2; + unsigned char TMR1MD : 2; + unsigned char TMR2MD : 2; + unsigned char TMR3MD : 2; +#else + unsigned char TMR3MD : 2; + unsigned char TMR2MD : 2; + unsigned char TMR1MD : 2; + unsigned char TMR0MD : 2; +#endif +}; + +union un_elc_elopd +{ + unsigned char BYTE; + struct st_elc_elopd_bit BIT; +}; + +struct st_elc_pgr1_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char PGR0 : 1; + unsigned char PGR1 : 1; + unsigned char PGR2 : 1; + unsigned char PGR3 : 1; + unsigned char PGR4 : 1; + unsigned char PGR5 : 1; + unsigned char PGR6 : 1; + unsigned char PGR7 : 1; +#else + unsigned char PGR7 : 1; + unsigned char PGR6 : 1; + unsigned char PGR5 : 1; + unsigned char PGR4 : 1; + unsigned char PGR3 : 1; + unsigned char PGR2 : 1; + unsigned char PGR1 : 1; + unsigned char PGR0 : 1; +#endif +}; + +union un_elc_pgr1 +{ + unsigned char BYTE; + struct st_elc_pgr1_bit BIT; +}; + +struct st_elc_pgr2_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char PGR0 : 1; + unsigned char PGR1 : 1; + unsigned char PGR2 : 1; + unsigned char PGR3 : 1; + unsigned char PGR4 : 1; + unsigned char PGR5 : 1; + unsigned char PGR6 : 1; + unsigned char PGR7 : 1; +#else + unsigned char PGR7 : 1; + unsigned char PGR6 : 1; + unsigned char PGR5 : 1; + unsigned char PGR4 : 1; + unsigned char PGR3 : 1; + unsigned char PGR2 : 1; + unsigned char PGR1 : 1; + unsigned char PGR0 : 1; +#endif +}; + +union un_elc_pgr2 +{ + unsigned char BYTE; + struct st_elc_pgr2_bit BIT; +}; + +struct st_elc_pgc1_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char PGCI : 2; + unsigned char PGCOVE : 1; + unsigned char : 1; + unsigned char PGCO : 3; + unsigned char : 1; +#else + unsigned char : 1; + unsigned char PGCO : 3; + unsigned char : 1; + unsigned char PGCOVE : 1; + unsigned char PGCI : 2; +#endif +}; + +union un_elc_pgc1 +{ + unsigned char BYTE; + struct st_elc_pgc1_bit BIT; +}; + +struct st_elc_pgc2_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char PGCI : 2; + unsigned char PGCOVE : 1; + unsigned char : 1; + unsigned char PGCO : 3; + unsigned char : 1; +#else + unsigned char : 1; + unsigned char PGCO : 3; + unsigned char : 1; + unsigned char PGCOVE : 1; + unsigned char PGCI : 2; +#endif +}; + +union un_elc_pgc2 +{ + unsigned char BYTE; + struct st_elc_pgc2_bit BIT; +}; + +struct st_elc_pdbf1_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char PDBF0 : 1; + unsigned char PDBF1 : 1; + unsigned char PDBF2 : 1; + unsigned char PDBF3 : 1; + unsigned char PDBF4 : 1; + unsigned char PDBF5 : 1; + unsigned char PDBF6 : 1; + unsigned char PDBF7 : 1; +#else + unsigned char PDBF7 : 1; + unsigned char PDBF6 : 1; + unsigned char PDBF5 : 1; + unsigned char PDBF4 : 1; + unsigned char PDBF3 : 1; + unsigned char PDBF2 : 1; + unsigned char PDBF1 : 1; + unsigned char PDBF0 : 1; +#endif +}; + +union un_elc_pdbf1 +{ + unsigned char BYTE; + struct st_elc_pdbf1_bit BIT; +}; + +struct st_elc_pdbf2_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char PDBF0 : 1; + unsigned char PDBF1 : 1; + unsigned char PDBF2 : 1; + unsigned char PDBF3 : 1; + unsigned char PDBF4 : 1; + unsigned char PDBF5 : 1; + unsigned char PDBF6 : 1; + unsigned char PDBF7 : 1; +#else + unsigned char PDBF7 : 1; + unsigned char PDBF6 : 1; + unsigned char PDBF5 : 1; + unsigned char PDBF4 : 1; + unsigned char PDBF3 : 1; + unsigned char PDBF2 : 1; + unsigned char PDBF1 : 1; + unsigned char PDBF0 : 1; +#endif +}; + +union un_elc_pdbf2 +{ + unsigned char BYTE; + struct st_elc_pdbf2_bit BIT; +}; + +struct st_elc_pel0_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char PSB : 3; + unsigned char PSP : 2; + unsigned char PSM : 2; + unsigned char : 1; +#else + unsigned char : 1; + unsigned char PSM : 2; + unsigned char PSP : 2; + unsigned char PSB : 3; +#endif +}; + +union un_elc_pel0 +{ + unsigned char BYTE; + struct st_elc_pel0_bit BIT; +}; + +struct st_elc_pel1_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char PSB : 3; + unsigned char PSP : 2; + unsigned char PSM : 2; + unsigned char : 1; +#else + unsigned char : 1; + unsigned char PSM : 2; + unsigned char PSP : 2; + unsigned char PSB : 3; +#endif +}; + +union un_elc_pel1 +{ + unsigned char BYTE; + struct st_elc_pel1_bit BIT; +}; + +struct st_elc_pel2_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char PSB : 3; + unsigned char PSP : 2; + unsigned char PSM : 2; + unsigned char : 1; +#else + unsigned char : 1; + unsigned char PSM : 2; + unsigned char PSP : 2; + unsigned char PSB : 3; +#endif +}; + +union un_elc_pel2 +{ + unsigned char BYTE; + struct st_elc_pel2_bit BIT; +}; + +struct un_elc_pel3_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char PSB : 3; + unsigned char PSP : 2; + unsigned char PSM : 2; + unsigned char : 1; +#else + unsigned char : 1; + unsigned char PSM : 2; + unsigned char PSP : 2; + unsigned char PSB : 3; +#endif +}; + +union un_elc_pel3 +{ + unsigned char BYTE; + struct un_elc_pel3_bit BIT; +}; + +struct st_elc_elsegr_bit +{ + unsigned char WI:1; + unsigned char WE:1; + unsigned char :5; + unsigned char SEG:1; +}; + +union un_elc_elsegr +{ + unsigned char BYTE; +#ifdef IODEFINE_H_HISTORY + struct st_elc_elsegr_bit BIT; +#endif +}; + +struct st_elc_elsr33_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char ELS : 8; +#else + unsigned char ELS : 8; +#endif +}; + +union un_elc_elsr33 +{ + unsigned char BYTE; + struct st_elc_elsr33_bit BIT; +}; + +struct st_elc_elsr35_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char ELS : 8; +#else + unsigned char ELS : 8; +#endif +}; + +union un_elc_elsr35 +{ + unsigned char BYTE; + struct st_elc_elsr35_bit BIT; +}; + +struct st_elc_elsr36_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char ELS : 8; +#else + unsigned char ELS : 8; +#endif +}; + +union un_elc_elsr36 +{ + unsigned char BYTE; + struct st_elc_elsr36_bit BIT; +}; + +struct st_elc_elsr37_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char ELS : 8; +#else + unsigned char ELS : 8; +#endif +}; + +union un_elc_elsr37 +{ + unsigned char BYTE; + struct st_elc_elsr37_bit BIT; +}; + +struct st_elc_elsr38_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char ELS : 8; +#else + unsigned char ELS : 8; +#endif +}; + +union un_elc_elsr38 +{ + unsigned char BYTE; + struct st_elc_elsr38_bit BIT; +}; + +struct st_elc_elsr45_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char ELS : 8; +#else + unsigned char ELS : 8; +#endif +}; + +union un_elc_elsr45 +{ + unsigned char BYTE; + struct st_elc_elsr45_bit BIT; +}; + +struct st_elc_elopf_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char TPU0MD : 2; + unsigned char TPU1MD : 2; + unsigned char TPU2MD : 2; + unsigned char TPU3MD : 2; +#else + unsigned char TPU3MD : 2; + unsigned char TPU2MD : 2; + unsigned char TPU1MD : 2; + unsigned char TPU0MD : 2; +#endif +}; + +union un_elc_elopf +{ + unsigned char BYTE; + struct st_elc_elopf_bit BIT; +}; + +struct st_elc_eloph_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char CMTW0MD : 2; + unsigned char : 6; +#else + unsigned char : 6; + unsigned char CMTW0MD : 2; +#endif +}; + +union un_elc_eloph +{ + unsigned char BYTE; + struct st_elc_eloph_bit BIT; +}; + +struct st_etherc_ecmr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long PRM : 1; + unsigned long DM : 1; + unsigned long RTM : 1; + unsigned long ILB : 1; + unsigned long : 1; + unsigned long TE : 1; + unsigned long RE : 1; + unsigned long : 2; + unsigned long MPDE : 1; + unsigned long : 2; + unsigned long PRCEF : 1; + unsigned long : 3; + unsigned long TXF : 1; + unsigned long RXF : 1; + unsigned long PFR : 1; + unsigned long ZPF : 1; + unsigned long TPC : 1; + unsigned long : 11; +#else + unsigned long : 11; + unsigned long TPC : 1; + unsigned long ZPF : 1; + unsigned long PFR : 1; + unsigned long RXF : 1; + unsigned long TXF : 1; + unsigned long : 3; + unsigned long PRCEF : 1; + unsigned long : 2; + unsigned long MPDE : 1; + unsigned long : 2; + unsigned long RE : 1; + unsigned long TE : 1; + unsigned long : 1; + unsigned long ILB : 1; + unsigned long RTM : 1; + unsigned long DM : 1; + unsigned long PRM : 1; +#endif +}; + +union un_etherc_ecmr +{ + unsigned long LONG; + struct st_etherc_ecmr_bit BIT; +}; + +struct st_etherc_rflr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long RFL : 12; + unsigned long : 20; +#else + unsigned long : 20; + unsigned long RFL : 12; +#endif +}; + +union un_etherc_rflr +{ + unsigned long LONG; + struct st_etherc_rflr_bit BIT; +}; + +struct st_etherc_ecsr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long ICD : 1; + unsigned long MPD : 1; + unsigned long LCHNG : 1; + unsigned long : 1; + unsigned long PSRTO : 1; + unsigned long BFR : 1; + unsigned long : 26; +#else + unsigned long : 26; + unsigned long BFR : 1; + unsigned long PSRTO : 1; + unsigned long : 1; + unsigned long LCHNG : 1; + unsigned long MPD : 1; + unsigned long ICD : 1; +#endif +}; + +union un_etherc_ecsr +{ + unsigned long LONG; + struct st_etherc_ecsr_bit BIT; +}; + +struct st_etherc_ecsipr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long ICDIP : 1; + unsigned long MPDIP : 1; + unsigned long LCHNGIP : 1; + unsigned long : 1; + unsigned long PSRTOIP : 1; + unsigned long BFSIPR : 1; + unsigned long : 26; +#else + unsigned long : 26; + unsigned long BFSIPR : 1; + unsigned long PSRTOIP : 1; + unsigned long : 1; + unsigned long LCHNGIP : 1; + unsigned long MPDIP : 1; + unsigned long ICDIP : 1; +#endif +}; + +union un_etherc_ecsipr +{ + unsigned long LONG; + struct st_etherc_ecsipr_bit BIT; +}; + +struct st_etherc_pir_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long MDC : 1; + unsigned long MMD : 1; + unsigned long MDO : 1; + unsigned long MDI : 1; + unsigned long : 28; +#else + unsigned long : 28; + unsigned long MDI : 1; + unsigned long MDO : 1; + unsigned long MMD : 1; + unsigned long MDC : 1; +#endif +}; + +union un_etherc_pir +{ + unsigned long LONG; + struct st_etherc_pir_bit BIT; +}; + +struct st_etherc_psr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long LMON : 1; + unsigned long : 31; +#else + unsigned long : 31; + unsigned long LMON : 1; +#endif +}; + +union un_etherc_psr +{ + unsigned long LONG; + struct st_etherc_psr_bit BIT; +}; + +struct st_etherc_rdmlr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long RMD : 20; + unsigned long : 12; +#else + unsigned long : 12; + unsigned long RMD : 20; +#endif +}; + +union un_etherc_rdmlr +{ + unsigned long LONG; + struct st_etherc_rdmlr_bit BIT; +}; + +struct st_etherc_ipgr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long IPG : 5; + unsigned long : 27; +#else + unsigned long : 27; + unsigned long IPG : 5; +#endif +}; + +union un_etherc_ipgr +{ + unsigned long LONG; + struct st_etherc_ipgr_bit BIT; +}; + +struct st_etherc_apr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long AP : 16; + unsigned long : 16; +#else + unsigned long : 16; + unsigned long AP : 16; +#endif +}; + +union un_etherc_apr +{ + unsigned long LONG; + struct st_etherc_apr_bit BIT; +}; + +struct st_etherc_mpr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long MP : 16; + unsigned long : 16; +#else + unsigned long : 16; + unsigned long MP : 16; +#endif +}; + +union un_etherc_mpr +{ + unsigned long LONG; + struct st_etherc_mpr_bit BIT; +}; + +struct st_etherc_rfcf_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long RPAUSE : 8; + unsigned long : 24; +#else + unsigned long : 24; + unsigned long RPAUSE : 8; +#endif +}; + +union un_etherc_rfcf +{ + unsigned long LONG; + struct st_etherc_rfcf_bit BIT; +}; + +struct st_etherc_tpauser_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long TPAUSE : 16; + unsigned long : 16; +#else + unsigned long : 16; + unsigned long TPAUSE : 16; +#endif +}; + +union un_etherc_tpauser +{ + unsigned long LONG; + struct st_etherc_tpauser_bit BIT; +}; + +struct st_etherc_tpausecr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long TXP : 8; + unsigned long : 24; +#else + unsigned long : 24; + unsigned long TXP : 8; +#endif +}; + +union un_etherc_tpausecr +{ + unsigned long LONG; + struct st_etherc_tpausecr_bit BIT; +}; + +struct st_etherc_bcfrr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long BCF : 16; + unsigned long : 16; +#else + unsigned long : 16; + unsigned long BCF : 16; +#endif +}; + +union un_etherc_bcfrr +{ + unsigned long LONG; + struct st_etherc_bcfrr_bit BIT; +}; + +struct st_etherc_malr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long MA : 16; + unsigned long : 16; +#else + unsigned long : 16; + unsigned long MA : 16; +#endif +}; + +union un_etherc_malr +{ + unsigned long LONG; + struct st_etherc_malr_bit BIT; +}; + +struct st_exdmac_edmast_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char DMST : 1; + unsigned char : 7; +#else + unsigned char : 7; + unsigned char DMST : 1; +#endif +}; + +union un_exdmac_edmast +{ + unsigned char BYTE; + struct st_exdmac_edmast_bit BIT; +}; + +struct st_exdmac0_edmtmd_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned short DCTG : 2; + unsigned short : 6; + unsigned short SZ : 2; + unsigned short : 2; + unsigned short DTS : 2; + unsigned short MD : 2; +#else + unsigned short MD : 2; + unsigned short DTS : 2; + unsigned short : 2; + unsigned short SZ : 2; + unsigned short : 6; + unsigned short DCTG : 2; +#endif +}; + +union un_exdmac0_edmtmd +{ + unsigned short WORD; + struct st_exdmac0_edmtmd_bit BIT; +}; + +struct st_exdamc0_edmomd_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char DACKSEL : 1; + unsigned char DACKW : 1; + unsigned char DACKE : 1; + unsigned char DACKS : 1; + unsigned char : 4; +#else + unsigned char : 4; + unsigned char DACKS : 1; + unsigned char DACKE : 1; + unsigned char DACKW : 1; + unsigned char DACKSEL : 1; +#endif +}; + +union un_exdmac0_edmomd +{ + unsigned char BYTE; + struct st_exdamc0_edmomd_bit BIT; +}; + +struct st_exdmac0_edmint_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char DARIE : 1; + unsigned char SARIE : 1; + unsigned char RPTIE : 1; + unsigned char ESIE : 1; + unsigned char DTIE : 1; + unsigned char : 3; +#else + unsigned char : 3; + unsigned char DTIE : 1; + unsigned char ESIE : 1; + unsigned char RPTIE : 1; + unsigned char SARIE : 1; + unsigned char DARIE : 1; +#endif +}; + +union un_exdmac0_edmint +{ + unsigned char BYTE; + struct st_exdmac0_edmint_bit BIT; +}; + +struct st_exdmac0_edmamd_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long DARA : 5; + unsigned long : 1; + unsigned long DM : 2; + unsigned long SARA : 5; + unsigned long : 1; + unsigned long SM : 2; + unsigned long DIR : 1; + unsigned long AMS : 1; + unsigned long : 14; +#else + unsigned long : 14; + unsigned long AMS : 1; + unsigned long DIR : 1; + unsigned long SM : 2; + unsigned long : 1; + unsigned long SARA : 5; + unsigned long DM : 2; + unsigned long : 1; + unsigned long DARA : 5; +#endif +}; + +union un_exdmac0_edmamd +{ + unsigned long LONG; + struct st_exdmac0_edmamd_bit BIT; +}; + +struct st_exdmac0_edmcnt_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char DTE : 1; + unsigned char : 7; +#else + unsigned char : 7; + unsigned char DTE : 1; +#endif +}; + +union un_exdmac0_edmcnt +{ + unsigned char BYTE; + struct st_exdmac0_edmcnt_bit BIT; +}; + +struct st_exdmac0_edmreq_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char SWREQ : 1; + unsigned char : 3; + unsigned char CLRS : 1; + unsigned char : 3; +#else + unsigned char : 3; + unsigned char CLRS : 1; + unsigned char : 3; + unsigned char SWREQ : 1; +#endif +}; + +union un_exdmac0_edmreq +{ + unsigned char BYTE; + struct st_exdmac0_edmreq_bit BIT; +}; + +struct st_exdmac0_edmsts_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char ESIF : 1; + unsigned char : 3; + unsigned char DTIF : 1; + unsigned char : 2; + unsigned char ACT : 1; +#else + unsigned char ACT : 1; + unsigned char : 2; + unsigned char DTIF : 1; + unsigned char : 3; + unsigned char ESIF : 1; +#endif +}; + +union un_exdmac0_edmsts +{ + unsigned char BYTE; + struct st_exdmac0_edmsts_bit BIT; +}; + +struct st_exdmac0_edmrmd_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char DREQS : 2; + unsigned char : 6; +#else + unsigned char : 6; + unsigned char DREQS : 2; +#endif +}; + +union un_exdmac0_edmrmd +{ + unsigned char BYTE; + struct st_exdmac0_edmrmd_bit BIT; +}; + +struct st_exdmac0_edmerf_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char EREQ : 1; + unsigned char : 7; +#else + unsigned char : 7; + unsigned char EREQ : 1; +#endif +}; + +union un_exdmac0_edmerf +{ + unsigned char BYTE; + struct st_exdmac0_edmerf_bit BIT; +}; + +struct st_exdmac0_edmprf_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char PREQ : 1; + unsigned char : 7; +#else + unsigned char : 7; + unsigned char PREQ : 1; +#endif +}; + +union un_exdmac0_edmprf +{ + unsigned char BYTE; + struct st_exdmac0_edmprf_bit BIT; +}; + +struct st_exdmac1_edmtmd_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned short DCTG : 2; + unsigned short : 6; + unsigned short SZ : 2; + unsigned short : 2; + unsigned short DTS : 2; + unsigned short MD : 2; +#else + unsigned short MD : 2; + unsigned short DTS : 2; + unsigned short : 2; + unsigned short SZ : 2; + unsigned short : 6; + unsigned short DCTG : 2; +#endif +}; + +union un_exdmac1_edmtmd +{ + unsigned short WORD; + struct st_exdmac1_edmtmd_bit BIT; +}; + +struct st_exdmac1_edmomd_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char DACKSEL : 1; + unsigned char DACKW : 1; + unsigned char DACKE : 1; + unsigned char DACKS : 1; + unsigned char : 4; +#else + unsigned char : 4; + unsigned char DACKS : 1; + unsigned char DACKE : 1; + unsigned char DACKW : 1; + unsigned char DACKSEL : 1; +#endif +}; + +union un_exdmac1_edmomd +{ + unsigned char BYTE; + struct st_exdmac1_edmomd_bit BIT; +}; + +struct st_exdmac1_edmint_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char DARIE : 1; + unsigned char SARIE : 1; + unsigned char RPTIE : 1; + unsigned char ESIE : 1; + unsigned char DTIE : 1; + unsigned char : 3; +#else + unsigned char : 3; + unsigned char DTIE : 1; + unsigned char ESIE : 1; + unsigned char RPTIE : 1; + unsigned char SARIE : 1; + unsigned char DARIE : 1; +#endif +}; + +union un_exdmac1_edmint +{ + unsigned char BYTE; + struct st_exdmac1_edmint_bit BIT; +}; + +struct st_exdmac1_edmamd_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long DARA : 5; + unsigned long : 1; + unsigned long DM : 2; + unsigned long SARA : 5; + unsigned long : 1; + unsigned long SM : 2; + unsigned long DIR : 1; + unsigned long AMS : 1; + unsigned long : 14; +#else + unsigned long : 14; + unsigned long AMS : 1; + unsigned long DIR : 1; + unsigned long SM : 2; + unsigned long : 1; + unsigned long SARA : 5; + unsigned long DM : 2; + unsigned long : 1; + unsigned long DARA : 5; +#endif +}; + +union un_exdmac1_edmamd +{ + unsigned long LONG; + struct st_exdmac1_edmamd_bit BIT; +}; + +struct st_exdmac1_edmcnt_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char DTE : 1; + unsigned char : 7; +#else + unsigned char : 7; + unsigned char DTE : 1; +#endif +}; + +union un_exdmac1_edmcnt +{ + unsigned char BYTE; + struct st_exdmac1_edmcnt_bit BIT; +}; + +struct st_exdmac1_edmreq_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char SWREQ : 1; + unsigned char : 3; + unsigned char CLRS : 1; + unsigned char : 3; +#else + unsigned char : 3; + unsigned char CLRS : 1; + unsigned char : 3; + unsigned char SWREQ : 1; +#endif +}; + +union un_exdmac1_edmreq +{ + unsigned char BYTE; + struct st_exdmac1_edmreq_bit BIT; +}; + +struct st_exdmac1_edmsts_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char ESIF : 1; + unsigned char : 3; + unsigned char DTIF : 1; + unsigned char : 2; + unsigned char ACT : 1; +#else + unsigned char ACT : 1; + unsigned char : 2; + unsigned char DTIF : 1; + unsigned char : 3; + unsigned char ESIF : 1; +#endif +}; + +union un_exdmac1_edmsts +{ + unsigned char BYTE; + struct st_exdmac1_edmsts_bit BIT; +}; + +struct st_exdmac1_edmrmd_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char DREQS : 2; + unsigned char : 6; +#else + unsigned char : 6; + unsigned char DREQS : 2; +#endif +}; + +union un_exdmac1_edmrmd +{ + unsigned char BYTE; + struct st_exdmac1_edmrmd_bit BIT; +}; + +struct st_exdmac1_edmerf_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char EREQ : 1; + unsigned char : 7; +#else + unsigned char : 7; + unsigned char EREQ : 1; +#endif +}; + +union un_exdmac1_edmerf +{ + unsigned char BYTE; + struct st_exdmac1_edmerf_bit BIT; +}; + +struct st_exdmac1_edmprf_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char PREQ : 1; + unsigned char : 7; +#else + unsigned char : 7; + unsigned char PREQ : 1; +#endif +}; + +union un_exdmac1_edmprf +{ + unsigned char BYTE; + struct st_exdmac1_edmprf_bit BIT; +}; + +struct st_flash_romce_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned short ROMCEN : 1; + unsigned short : 15; +#else + unsigned short : 15; + unsigned short ROMCEN : 1; +#endif +}; + +union un_flash_romce +{ + unsigned short WORD; + struct st_flash_romce_bit BIT; +}; + +struct st_flash_romciv_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned short ROMCIV : 1; + unsigned short : 15; +#else + unsigned short : 15; + unsigned short ROMCIV : 1; +#endif +}; + +union un_flash_romciv +{ + unsigned short WORD; + struct st_flash_romciv_bit BIT; +}; + +struct st_flash_fwepror_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char FLWE : 2; + unsigned char : 6; +#else + unsigned char : 6; + unsigned char FLWE : 2; +#endif +}; + +union un_flash_fwepror +{ + unsigned char BYTE; + struct st_flash_fwepror_bit BIT; +}; + +struct st_flash_fastat_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char : 3; + unsigned char DFAE : 1; + unsigned char CMDLK : 1; + unsigned char : 2; + unsigned char CFAE : 1; +#else + unsigned char CFAE : 1; + unsigned char : 2; + unsigned char CMDLK : 1; + unsigned char DFAE : 1; + unsigned char : 3; +#endif +}; + +union un_flash_fastat +{ + unsigned char BYTE; + struct st_flash_fastat_bit BIT; +}; + +struct st_flash_faeint_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char : 3; + unsigned char DFAEIE : 1; + unsigned char CMDLKIE : 1; + unsigned char : 2; + unsigned char CFAEIE : 1; +#else + unsigned char CFAEIE : 1; + unsigned char : 2; + unsigned char CMDLKIE : 1; + unsigned char DFAEIE : 1; + unsigned char : 3; +#endif +}; + +union un_flash_faeint +{ + unsigned char BYTE; + struct st_flash_faeint_bit BIT; +}; + +struct st_flash_frdyie_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char FRDYIE : 1; + unsigned char : 7; +#else + unsigned char : 7; + unsigned char FRDYIE : 1; +#endif +}; + +union un_flash_frdyie +{ + unsigned char BYTE; + struct st_flash_frdyie_bit BIT; +}; + +struct st_flash_fsaddr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long FSADDR : 32; +#else + unsigned long FSADDR : 32; +#endif +}; + +union un_flash_fsaddr +{ + unsigned long LONG; + struct st_flash_fsaddr_bit BIT; +}; + +struct st_flash_feaddr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long FEADDR : 32; +#else + unsigned long FEADDR : 32; +#endif +}; + +union un_flash_feaddr +{ + unsigned long LONG; + struct st_flash_feaddr_bit BIT; +}; + +struct st_flash_fstsatr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long : 6; + unsigned long FLWEERR : 1; + unsigned long : 1; + unsigned long PRGSPD : 1; + unsigned long ERSSPD : 1; + unsigned long DBFULL : 1; + unsigned long SUSRDY : 1; + unsigned long PRGERR : 1; + unsigned long ERSERR : 1; + unsigned long ILGLERR : 1; + unsigned long FRDY : 1; + unsigned long : 4; + unsigned long OTERR : 1; + unsigned long SECERR : 1; + unsigned long FESETERR : 1; + unsigned long ILGCOMERR : 1; + unsigned long : 8; +#else + unsigned long : 8; + unsigned long ILGCOMERR : 1; + unsigned long FESETERR : 1; + unsigned long SECERR : 1; + unsigned long OTERR : 1; + unsigned long : 4; + unsigned long FRDY : 1; + unsigned long ILGLERR : 1; + unsigned long ERSERR : 1; + unsigned long PRGERR : 1; + unsigned long SUSRDY : 1; + unsigned long DBFULL : 1; + unsigned long ERSSPD : 1; + unsigned long PRGSPD : 1; + unsigned long : 1; + unsigned long FLWEERR : 1; + unsigned long : 6; +#endif +}; + +union un_flash_fstatr +{ + unsigned long LONG; + struct st_flash_fstsatr_bit BIT; +}; + +struct st_flash_fentryr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned short FENTRYC : 1; + unsigned short : 6; + unsigned short FENTRYD : 1; + unsigned short KEY : 8; +#else + unsigned short KEY : 8; + unsigned short FENTRYD : 1; + unsigned short : 6; + unsigned short FENTRYC : 1; +#endif +}; + +union un_flash_fentryr +{ + unsigned short WORD; + struct st_flash_fentryr_bit BIT; +}; + +struct st_flash_fsunitr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned short SUINIT : 1; + unsigned short : 7; + unsigned short KEY : 8; +#else + unsigned short KEY : 8; + unsigned short : 7; + unsigned short SUINIT : 1; +#endif +}; + +union un_flash_fsunitr +{ + unsigned short WORD; + struct st_flash_fsunitr_bit BIT; +}; + +struct st_flash_fcmdr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned short PCMDR : 8; + unsigned short CMDR : 8; +#else + unsigned short CMDR : 8; + unsigned short PCMDR : 8; +#endif +}; + +union un_flash_fcmdr +{ + unsigned short WORD; + struct st_flash_fcmdr_bit BIT; +}; + +struct st_flash_fbccnt_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char BCDIR : 1; + unsigned char : 7; +#else + unsigned char : 7; + unsigned char BCDIR : 1; +#endif +}; + +union un_flash_fbccnt +{ + unsigned char BYTE; + struct st_flash_fbccnt_bit BIT; +}; + +struct st_flash_fbcstat_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char BCST : 1; + unsigned char : 7; +#else + unsigned char : 7; + unsigned char BCST : 1; +#endif +}; + +union un_flash_fbcstat +{ + unsigned char BYTE; + struct st_flash_fbcstat_bit BIT; +}; + +struct st_flash_fpsaddr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long PSADR : 19; + unsigned long : 13; +#else + unsigned long : 13; + unsigned long PSADR : 19; +#endif +}; + +union un_flash_fpsaddr +{ + unsigned long LONG; + struct st_flash_fpsaddr_bit BIT; +}; + +struct st_flash_fawmon_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long FAWS : 12; + unsigned long : 3; + unsigned long FSPR : 1; + unsigned long FAWE : 12; + unsigned long : 3; + unsigned long BTFLG : 1; +#else + unsigned long BTFLG : 1; + unsigned long : 3; + unsigned long FAWE : 12; + unsigned long FSPR : 1; + unsigned long : 3; + unsigned long FAWS : 12; +#endif +}; + +union un_flash_fawmon +{ + unsigned long LONG; + struct st_flash_fawmon_bit BIT; +}; + +struct st_flash_fcpsr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned short ESUSPMD : 1; + unsigned short : 15; +#else + unsigned short : 15; + unsigned short ESUSPMD : 1; +#endif +}; + +union un_flash_fcpsr +{ + unsigned short WORD; + struct st_flash_fcpsr_bit BIT; +}; + +struct st_flash_fpckar_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned short PCKA : 8; + unsigned short KEY : 8; +#else + unsigned short KEY : 8; + unsigned short PCKA : 8; +#endif +}; + +union un_flash_fpckar +{ + unsigned short WORD; + struct st_flash_fpckar_bit BIT; +}; + +struct st_flash_fsuacr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned short SAS : 2; + unsigned short : 6; + unsigned short KEY : 8; +#else + unsigned short KEY : 8; + unsigned short : 6; + unsigned short SAS : 2; +#endif + }; + +union un_flash_fsuacr +{ + unsigned short WORD; + struct st_flash_fsuacr_bit BIT; +}; + +struct st_pdc_pccr0_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long PCKE : 1; + unsigned long VPS : 1; + unsigned long HPS : 1; + unsigned long PRST : 1; + unsigned long DFIE : 1; + unsigned long FEIE : 1; + unsigned long OVIE : 1; + unsigned long UDRIE : 1; + unsigned long VERIE : 1; + unsigned long HERIE : 1; + unsigned long PCKOE : 1; + unsigned long PCKDIV : 3; + unsigned long EDS : 1; + unsigned long : 17; +#else + unsigned long : 17; + unsigned long EDS : 1; + unsigned long PCKDIV : 3; + unsigned long PCKOE : 1; + unsigned long HERIE : 1; + unsigned long VERIE : 1; + unsigned long UDRIE : 1; + unsigned long OVIE : 1; + unsigned long FEIE : 1; + unsigned long DFIE : 1; + unsigned long PRST : 1; + unsigned long HPS : 1; + unsigned long VPS : 1; + unsigned long PCKE : 1; +#endif +}; + +union un_pdc_pccr0 +{ + unsigned long LONG; + struct st_pdc_pccr0_bit BIT; +}; + +struct st_pdc_pccr1_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long PCE : 1; + unsigned long : 31; +#else + unsigned long : 31; + unsigned long PCE : 1; +#endif +}; + +union un_pdc_pccr1 +{ + unsigned long LONG; + struct st_pdc_pccr1_bit BIT; +}; + +struct st_pdc_pcsr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long FBSY : 1; + unsigned long FEMPF : 1; + unsigned long FEF : 1; + unsigned long OVRF : 1; + unsigned long UDRF : 1; + unsigned long VERF : 1; + unsigned long HERF : 1; + unsigned long : 25; +#else + unsigned long : 25; + unsigned long HERF : 1; + unsigned long VERF : 1; + unsigned long UDRF : 1; + unsigned long OVRF : 1; + unsigned long FEF : 1; + unsigned long FEMPF : 1; + unsigned long FBSY : 1; +#endif +}; + +union un_pdc_pcsr +{ + unsigned long LONG; + struct st_pdc_pcsr_bit BIT; +}; + +struct st_pdc_pcmonr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long VSYNC : 1; + unsigned long HSYNC : 1; + unsigned long : 30; +#else + unsigned long : 30; + unsigned long HSYNC : 1; + unsigned long VSYNC : 1; +#endif +}; + +union un_pdc_pcmonr +{ + unsigned long LONG; + struct st_pdc_pcmonr_bit BIT; +}; + +union un_pdc_pcdr +{ + unsigned long LONG; +}; + +struct st_pdc_vcr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long VST : 12; + unsigned long : 4; + unsigned long VSZ : 12; + unsigned long : 4; +#else + unsigned long : 4; + unsigned long VSZ : 12; + unsigned long : 4; + unsigned long VST : 12; +#endif +}; + +union un_pdc_vcr +{ + unsigned long LONG; + struct st_pdc_vcr_bit BIT; +}; + +struct st_pdc_hcr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long HST : 12; + unsigned long : 4; + unsigned long HSZ : 12; + unsigned long : 4; +#else + unsigned long : 4; + unsigned long HSZ : 12; + unsigned long : 4; + unsigned long HST : 12; +#endif +}; + +union un_pdc_hcr +{ + unsigned long LONG; + struct st_pdc_hcr_bit BIT; +}; + +struct st_poe_icsr1_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned short POE0M : 2; + unsigned short : 6; + unsigned short PIE1 : 1; + unsigned short : 3; + unsigned short POE0F : 1; + unsigned short : 3; +#else + unsigned short : 3; + unsigned short POE0F : 1; + unsigned short : 3; + unsigned short PIE1 : 1; + unsigned short : 6; + unsigned short POE0M : 2; +#endif +}; + +union un_poe_icsr1 +{ + unsigned short WORD; + struct st_poe_icsr1_bit BIT; +}; + +struct st_poe_ocsr1_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned short : 8; + unsigned short OIE1 : 1; + unsigned short OCE1 : 1; + unsigned short : 5; + unsigned short OSF1 : 1; +#else + unsigned short OSF1 : 1; + unsigned short : 5; + unsigned short OCE1 : 1; + unsigned short OIE1 : 1; + unsigned short : 8; +#endif +}; + +union un_poe_ocsr1 +{ + unsigned short WORD; + struct st_poe_ocsr1_bit BIT; +}; + +struct st_poe_icsr2_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned short POE4M : 2; + unsigned short : 6; + unsigned short PIE2 : 1; + unsigned short : 3; + unsigned short POE4F : 1; + unsigned short : 3; +#else + unsigned short : 3; + unsigned short POE4F : 1; + unsigned short : 3; + unsigned short PIE2 : 1; + unsigned short : 6; + unsigned short POE4M : 2; +#endif +}; + +union un_poe_icsr2 +{ + unsigned short WORD; + struct st_poe_icsr2_bit BIT; +}; + +struct st_poe_ocsr2_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned short : 8; + unsigned short OIE2 : 1; + unsigned short OCE2 : 1; + unsigned short : 5; + unsigned short OSF2 : 1; +#else + unsigned short OSF2 : 1; + unsigned short : 5; + unsigned short OCE2 : 1; + unsigned short OIE2 : 1; + unsigned short : 8; +#endif +}; + +union un_poe_ocsr2 +{ + unsigned short WORD; + struct st_poe_ocsr2_bit BIT; +}; + +struct st_poe_icsr3_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned short POE8M : 2; + unsigned short : 6; + unsigned short PIE3 : 1; + unsigned short POE8E : 1; + unsigned short : 2; + unsigned short POE8F : 1; + unsigned short : 3; +#else + unsigned short : 3; + unsigned short POE8F : 1; + unsigned short : 2; + unsigned short POE8E : 1; + unsigned short PIE3 : 1; + unsigned short : 6; + unsigned short POE8M : 2; +#endif +}; + +union un_poe_icsr3 +{ + unsigned short WORD; + struct st_poe_icsr3_bit BIT; +}; + +struct st_poe_spoer_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char MTUCH34HIZ : 1; + unsigned char MTUCH67HIZ : 1; + unsigned char MTUCH0HIZ : 1; + unsigned char : 5; +#else + unsigned char : 5; + unsigned char MTUCH0HIZ : 1; + unsigned char MTUCH67HIZ : 1; + unsigned char MTUCH34HIZ : 1; +#endif +}; + +union un_poe_spoer +{ + unsigned char BYTE; + struct st_poe_spoer_bit BIT; +}; + +struct st_poe_poecr1_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char MTU0AZE : 1; + unsigned char MTU0BZE : 1; + unsigned char MTU0CZE : 1; + unsigned char MTU0DZE : 1; + unsigned char : 4; +#else + unsigned char : 4; + unsigned char MTU0DZE : 1; + unsigned char MTU0CZE : 1; + unsigned char MTU0BZE : 1; + unsigned char MTU0AZE : 1; +#endif +}; + +union un_poe_poecr1 +{ + unsigned char BYTE; + struct st_poe_poecr1_bit BIT; +}; + +struct st_poe_poecr2_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned short MTU7BDZE : 1; + unsigned short MTU7ACZE : 1; + unsigned short MTU6BDZE : 1; + unsigned short : 5; + unsigned short MTU4BDZE : 1; + unsigned short MTU4ACZE : 1; + unsigned short MTU3BDZE : 1; + unsigned short : 5; +#else + unsigned short : 5; + unsigned short MTU3BDZE : 1; + unsigned short MTU4ACZE : 1; + unsigned short MTU4BDZE : 1; + unsigned short : 5; + unsigned short MTU6BDZE : 1; + unsigned short MTU7ACZE : 1; + unsigned short MTU7BDZE : 1; +#endif +}; + +union un_poe_poecr2 +{ + unsigned short WORD; + struct st_poe_poecr2_bit BIT; +}; + +struct st_poe_poecr4_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned short : 2; + unsigned short IC2ADDMT34ZE : 1; + unsigned short IC3ADDMT34ZE : 1; + unsigned short IC4ADDMT34ZE : 1; + unsigned short IC5ADDMT34ZE : 1; + unsigned short : 3; + unsigned short IC1ADDMT67ZE : 1; + unsigned short : 1; + unsigned short IC3ADDMT67ZE : 1; + unsigned short IC4ADDMT67ZE : 1; + unsigned short IC5ADDMT67ZE : 1; + unsigned short : 2; +#else + unsigned short : 2; + unsigned short IC5ADDMT67ZE : 1; + unsigned short IC4ADDMT67ZE : 1; + unsigned short IC3ADDMT67ZE : 1; + unsigned short : 1; + unsigned short IC1ADDMT67ZE : 1; + unsigned short : 3; + unsigned short IC5ADDMT34ZE : 1; + unsigned short IC4ADDMT34ZE : 1; + unsigned short IC3ADDMT34ZE : 1; + unsigned short IC2ADDMT34ZE : 1; + unsigned short : 2; +#endif +}; + +union un_poe_poecr4 +{ + unsigned short WORD; + struct st_poe_poecr4_bit BIT; +}; + +struct st_poe_poecr5_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned short : 1; + unsigned short IC1ADDMT0ZE : 1; + unsigned short IC2ADDMT0ZE : 1; + unsigned short : 1; + unsigned short IC4ADDMT0ZE : 1; + unsigned short IC5ADDMT0ZE : 1; + unsigned short : 10; +#else + unsigned short : 10; + unsigned short IC5ADDMT0ZE : 1; + unsigned short IC4ADDMT0ZE : 1; + unsigned short : 1; + unsigned short IC2ADDMT0ZE : 1; + unsigned short IC1ADDMT0ZE : 1; + unsigned short : 1; +#endif +}; + +union un_poe_poecr5 +{ + unsigned short WORD; + struct st_poe_poecr5_bit BIT; +}; + +struct st_poe_icsr4_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned short POE10M : 2; + unsigned short : 6; + unsigned short PIE4 : 1; + unsigned short POE10E : 1; + unsigned short : 2; + unsigned short POE10F : 1; + unsigned short : 3; +#else + unsigned short : 3; + unsigned short POE10F : 1; + unsigned short : 2; + unsigned short POE10E : 1; + unsigned short PIE4 : 1; + unsigned short : 6; + unsigned short POE10M : 2; +#endif +}; + +union un_poe_icsr4 +{ + unsigned short WORD; + struct st_poe_icsr4_bit BIT; +}; + +struct st_poe_icsr5_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned short POE11M : 2; + unsigned short : 6; + unsigned short PIE5 : 1; + unsigned short POE11E : 1; + unsigned short : 2; + unsigned short POE11F : 1; + unsigned short : 3; +#else + unsigned short : 3; + unsigned short POE11F : 1; + unsigned short : 2; + unsigned short POE11E : 1; + unsigned short PIE5 : 1; + unsigned short : 6; + unsigned short POE11M : 2; +#endif +}; + +union un_poe_icsr5 +{ + unsigned short WORD; + struct st_poe_icsr5_bit BIT; +}; + +struct st_poe_alr1_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned short OLSG0A : 1; + unsigned short OLSG0B : 1; + unsigned short OLSG1A : 1; + unsigned short OLSG1B : 1; + unsigned short OLSG2A : 1; + unsigned short OLSG2B : 1; + unsigned short : 1; + unsigned short OLSEN : 1; + unsigned short : 8; +#else + unsigned short : 8; + unsigned short OLSEN : 1; + unsigned short : 1; + unsigned short OLSG2B : 1; + unsigned short OLSG2A : 1; + unsigned short OLSG1B : 1; + unsigned short OLSG1A : 1; + unsigned short OLSG0B : 1; + unsigned short OLSG0A : 1; +#endif +}; + +union un_poe_alr1 +{ + unsigned short WORD; + struct st_poe_alr1_bit BIT; +}; + +struct st_poe_icsr6_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned short : 9; + unsigned short OSTSTE : 1; + unsigned short : 2; + unsigned short OSTSTF : 1; + unsigned short : 3; +#else + unsigned short : 3; + unsigned short OSTSTF : 1; + unsigned short : 2; + unsigned short OSTSTE : 1; + unsigned short : 9; +#endif +}; + +union un_poe_icsr6 +{ + unsigned short WORD; + struct st_poe_icsr6_bit BIT; +}; + +struct st_poe_m0selr1_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char M0ASEL : 4; + unsigned char M0BSEL : 4; +#else + unsigned char M0BSEL : 4; + unsigned char M0ASEL : 4; +#endif +}; + +union un_poe_m0selr1 +{ + unsigned char BYTE; + struct st_poe_m0selr1_bit BIT; +}; + +struct st_poe_m0selr2_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char M0CSEL : 4; + unsigned char M0DSEL : 4; +#else + unsigned char M0DSEL : 4; + unsigned char M0CSEL : 4; +#endif +}; + +union un_poe_m0selr2 +{ + unsigned char BYTE; + struct st_poe_m0selr2_bit BIT; +}; + +struct st_poe_m3selr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char M3BSEL : 4; + unsigned char M3DSEL : 4; +#else + unsigned char M3DSEL : 4; + unsigned char M3BSEL : 4; +#endif +}; + +union un_poe_m3selr +{ + unsigned char BYTE; + struct st_poe_m3selr_bit BIT; +}; + +struct st_poe_m4selr1_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char M4ASEL : 4; + unsigned char M4CSEL : 4; +#else + unsigned char M4CSEL : 4; + unsigned char M4ASEL : 4; +#endif +}; + +union un_poe_m4selr1 +{ + unsigned char BYTE; + struct st_poe_m4selr1_bit BIT; +}; + +struct un_poe_m4selr2_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char M4BSEL : 4; + unsigned char M4DSEL : 4; +#else + unsigned char M4DSEL : 4; + unsigned char M4BSEL : 4; +#endif +}; + +union un_poe_m4selr2 +{ + unsigned char BYTE; + struct un_poe_m4selr2_bit BIT; +}; + +struct st_poe_m6selr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char M6BSEL : 4; + unsigned char M6DSEL : 4; +#else + unsigned char M6DSEL : 4; + unsigned char M6BSEL : 4; +#endif +}; + +union un_poe_m6selr +{ + unsigned char BYTE; + struct st_poe_m6selr_bit BIT; +}; + +struct st_portd_pdr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char B0 : 1; + unsigned char B1 : 1; + unsigned char B2 : 1; + unsigned char B3 : 1; + unsigned char B4 : 1; + unsigned char B5 : 1; + unsigned char B6 : 1; + unsigned char B7 : 1; +#else + unsigned char B7 : 1; + unsigned char B6 : 1; + unsigned char B5 : 1; + unsigned char B4 : 1; + unsigned char B3 : 1; + unsigned char B2 : 1; + unsigned char B1 : 1; + unsigned char B0 : 1; +#endif +}; + +union un_portd_pdr +{ + unsigned char BYTE; + struct st_portd_pdr_bit BIT; +}; + +struct st_portd_podr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char B0 : 1; + unsigned char B1 : 1; + unsigned char B2 : 1; + unsigned char B3 : 1; + unsigned char B4 : 1; + unsigned char B5 : 1; + unsigned char B6 : 1; + unsigned char B7 : 1; +#else + unsigned char B7 : 1; + unsigned char B6 : 1; + unsigned char B5 : 1; + unsigned char B4 : 1; + unsigned char B3 : 1; + unsigned char B2 : 1; + unsigned char B1 : 1; + unsigned char B0 : 1; +#endif +}; + +union un_portd_podr +{ + unsigned char BYTE; + struct st_portd_podr_bit BIT; +}; + +struct st_portd_pidr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char B0 : 1; + unsigned char B1 : 1; + unsigned char B2 : 1; + unsigned char B3 : 1; + unsigned char B4 : 1; + unsigned char B5 : 1; + unsigned char B6 : 1; + unsigned char B7 : 1; +#else + unsigned char B7 : 1; + unsigned char B6 : 1; + unsigned char B5 : 1; + unsigned char B4 : 1; + unsigned char B3 : 1; + unsigned char B2 : 1; + unsigned char B1 : 1; + unsigned char B0 : 1; +#endif +}; + +union un_portd_pidr +{ + unsigned char BYTE; + struct st_portd_pidr_bit BIT; +}; + +struct st_portd_pmr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char B0 : 1; + unsigned char B1 : 1; + unsigned char B2 : 1; + unsigned char B3 : 1; + unsigned char B4 : 1; + unsigned char B5 : 1; + unsigned char B6 : 1; + unsigned char B7 : 1; +#else + unsigned char B7 : 1; + unsigned char B6 : 1; + unsigned char B5 : 1; + unsigned char B4 : 1; + unsigned char B3 : 1; + unsigned char B2 : 1; + unsigned char B1 : 1; + unsigned char B0 : 1; +#endif +}; + +union un_portd_pmr +{ + unsigned char BYTE; + struct st_portd_pmr_bit BIT; +}; + +struct st_portd_ord0_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char B0 : 1; + unsigned char : 1; + unsigned char B2 : 1; + unsigned char : 1; + unsigned char B4 : 1; + unsigned char : 1; + unsigned char B6 : 1; + unsigned char : 1; +#else + unsigned char : 1; + unsigned char B6 : 1; + unsigned char : 1; + unsigned char B4 : 1; + unsigned char : 1; + unsigned char B2 : 1; + unsigned char : 1; + unsigned char B0 : 1; +#endif +}; + +union un_portd_ord0 +{ + unsigned char BYTE; + struct st_portd_ord0_bit BIT; +}; + +struct st_portd_ord1_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char B0 : 1; + unsigned char : 1; + unsigned char B2 : 1; + unsigned char : 1; + unsigned char B4 : 1; + unsigned char : 1; + unsigned char B6 : 1; + unsigned char : 1; +#else + unsigned char : 1; + unsigned char B6 : 1; + unsigned char : 1; + unsigned char B4 : 1; + unsigned char : 1; + unsigned char B2 : 1; + unsigned char : 1; + unsigned char B0 : 1; +#endif +}; + +union un_portd_ord1 +{ + unsigned char BYTE; + struct st_portd_ord1_bit BIT; +}; + +struct st_portd_pcr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char B0 : 1; + unsigned char B1 : 1; + unsigned char B2 : 1; + unsigned char B3 : 1; + unsigned char B4 : 1; + unsigned char B5 : 1; + unsigned char B6 : 1; + unsigned char B7 : 1; +#else + unsigned char B7 : 1; + unsigned char B6 : 1; + unsigned char B5 : 1; + unsigned char B4 : 1; + unsigned char B3 : 1; + unsigned char B2 : 1; + unsigned char B1 : 1; + unsigned char B0 : 1; +#endif +}; + +union un_portd_pcr +{ + unsigned char BYTE; + struct st_portd_pcr_bit BIT; +}; + +struct st_portd_dscr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char B0 : 1; + unsigned char B1 : 1; + unsigned char B2 : 1; + unsigned char B3 : 1; + unsigned char B4 : 1; + unsigned char B5 : 1; + unsigned char B6 : 1; + unsigned char B7 : 1; +#else + unsigned char B7 : 1; + unsigned char B6 : 1; + unsigned char B5 : 1; + unsigned char B4 : 1; + unsigned char B3 : 1; + unsigned char B2 : 1; + unsigned char B1 : 1; + unsigned char B0 : 1; +#endif +}; + +union un_portd_dscr +{ + unsigned char BYTE; + struct st_portd_dscr_bit BIT; +}; + +struct st_portd_dscr2_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char B0 : 1; + unsigned char B1 : 1; + unsigned char B2 : 1; + unsigned char B3 : 1; + unsigned char B4 : 1; + unsigned char B5 : 1; + unsigned char B6 : 1; + unsigned char B7 : 1; +#else + unsigned char B7 : 1; + unsigned char B6 : 1; + unsigned char B5 : 1; + unsigned char B4 : 1; + unsigned char B3 : 1; + unsigned char B2 : 1; + unsigned char B1 : 1; + unsigned char B0 : 1; +#endif +}; + +union un_portd_dscr2 +{ + unsigned char BYTE; + struct st_portd_dscr2_bit BIT; +}; + +struct st_ppg0_pcr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char G0CMS : 2; + unsigned char G1CMS : 2; + unsigned char G2CMS : 2; + unsigned char G3CMS : 2; +#else + unsigned char G3CMS : 2; + unsigned char G2CMS : 2; + unsigned char G1CMS : 2; + unsigned char G0CMS : 2; +#endif +}; + +union un_ppg0_pcr +{ + unsigned char BYTE; + struct st_ppg0_pcr_bit BIT; +}; + +struct st_ppg0_pmr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char G0NOV : 1; + unsigned char G1NOV : 1; + unsigned char G2NOV : 1; + unsigned char G3NOV : 1; + unsigned char G0INV : 1; + unsigned char G1INV : 1; + unsigned char G2INV : 1; + unsigned char G3INV : 1; +#else + unsigned char G3INV : 1; + unsigned char G2INV : 1; + unsigned char G1INV : 1; + unsigned char G0INV : 1; + unsigned char G3NOV : 1; + unsigned char G2NOV : 1; + unsigned char G1NOV : 1; + unsigned char G0NOV : 1; +#endif +}; + +union un_ppg0_pmr +{ + unsigned char BYTE; + struct st_ppg0_pmr_bit BIT; +}; + +struct st_ppg0_nderh_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char NDER8 : 1; + unsigned char NDER9 : 1; + unsigned char NDER10 : 1; + unsigned char NDER11 : 1; + unsigned char NDER12 : 1; + unsigned char NDER13 : 1; + unsigned char NDER14 : 1; + unsigned char NDER15 : 1; +#else + unsigned char NDER15 : 1; + unsigned char NDER14 : 1; + unsigned char NDER13 : 1; + unsigned char NDER12 : 1; + unsigned char NDER11 : 1; + unsigned char NDER10 : 1; + unsigned char NDER9 : 1; + unsigned char NDER8 : 1; +#endif +}; + +union un_ppg0_nderh +{ + unsigned char BYTE; + struct st_ppg0_nderh_bit BIT; +}; + +struct st_ppg0_nderl_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char NDER0 : 1; + unsigned char NDER1 : 1; + unsigned char NDER2 : 1; + unsigned char NDER3 : 1; + unsigned char NDER4 : 1; + unsigned char NDER5 : 1; + unsigned char NDER6 : 1; + unsigned char NDER7 : 1; +#else + unsigned char NDER7 : 1; + unsigned char NDER6 : 1; + unsigned char NDER5 : 1; + unsigned char NDER4 : 1; + unsigned char NDER3 : 1; + unsigned char NDER2 : 1; + unsigned char NDER1 : 1; + unsigned char NDER0 : 1; +#endif +}; + +union un_ppg0_nderl +{ + unsigned char BYTE; + struct st_ppg0_nderl_bit BIT; +}; + +struct st_ppg0_podrh_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char POD8 : 1; + unsigned char POD9 : 1; + unsigned char POD10 : 1; + unsigned char POD11 : 1; + unsigned char POD12 : 1; + unsigned char POD13 : 1; + unsigned char POD14 : 1; + unsigned char POD15 : 1; +#else + unsigned char POD15 : 1; + unsigned char POD14 : 1; + unsigned char POD13 : 1; + unsigned char POD12 : 1; + unsigned char POD11 : 1; + unsigned char POD10 : 1; + unsigned char POD9 : 1; + unsigned char POD8 : 1; +#endif +}; + +union un_ppg0_podrh +{ + unsigned char BYTE; + struct st_ppg0_podrh_bit BIT; +}; + +struct st_ppg0_podrl_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char POD0 : 1; + unsigned char POD1 : 1; + unsigned char POD2 : 1; + unsigned char POD3 : 1; + unsigned char POD4 : 1; + unsigned char POD5 : 1; + unsigned char POD6 : 1; + unsigned char POD7 : 1; +#else + unsigned char POD7 : 1; + unsigned char POD6 : 1; + unsigned char POD5 : 1; + unsigned char POD4 : 1; + unsigned char POD3 : 1; + unsigned char POD2 : 1; + unsigned char POD1 : 1; + unsigned char POD0 : 1; +#endif +}; + +union un_ppg0_podrl +{ + unsigned char BYTE; + struct st_ppg0_podrl_bit BIT; +}; + +struct st_ppg0_ndrh_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char NDR8 : 1; + unsigned char NDR9 : 1; + unsigned char NDR10 : 1; + unsigned char NDR11 : 1; + unsigned char NDR12 : 1; + unsigned char NDR13 : 1; + unsigned char NDR14 : 1; + unsigned char NDR15 : 1; +#else + unsigned char NDR15 : 1; + unsigned char NDR14 : 1; + unsigned char NDR13 : 1; + unsigned char NDR12 : 1; + unsigned char NDR11 : 1; + unsigned char NDR10 : 1; + unsigned char NDR9 : 1; + unsigned char NDR8 : 1; +#endif +}; + +union un_ppg0_ndrh +{ + unsigned char BYTE; + struct st_ppg0_ndrh_bit BIT; +}; + +struct st_ppg0_ndrl_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char NDR0 : 1; + unsigned char NDR1 : 1; + unsigned char NDR2 : 1; + unsigned char NDR3 : 1; + unsigned char NDR4 : 1; + unsigned char NDR5 : 1; + unsigned char NDR6 : 1; + unsigned char NDR7 : 1; +#else + unsigned char NDR7 : 1; + unsigned char NDR6 : 1; + unsigned char NDR5 : 1; + unsigned char NDR4 : 1; + unsigned char NDR3 : 1; + unsigned char NDR2 : 1; + unsigned char NDR1 : 1; + unsigned char NDR0 : 1; +#endif +}; + +union un_ppg0_ndrl +{ + unsigned char BYTE; + struct st_ppg0_ndrl_bit BIT; +}; + +struct st_ppg0_ndrh2_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char NDR8 : 1; + unsigned char NDR9 : 1; + unsigned char NDR10 : 1; + unsigned char NDR11 : 1; + unsigned char : 4; +#else + unsigned char : 4; + unsigned char NDR11 : 1; + unsigned char NDR10 : 1; + unsigned char NDR9 : 1; + unsigned char NDR8 : 1; +#endif +}; + +union un_ppg0_ndrh2 +{ + unsigned char BYTE; + struct st_ppg0_ndrh2_bit BIT; +}; + +struct st_ppg0_ndrl2_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char NDR0 : 1; + unsigned char NDR1 : 1; + unsigned char NDR2 : 1; + unsigned char NDR3 : 1; + unsigned char : 4; +#else + unsigned char : 4; + unsigned char NDR3 : 1; + unsigned char NDR2 : 1; + unsigned char NDR1 : 1; + unsigned char NDR0 : 1; +#endif +}; + +union un_ppg0_ndrl2 +{ + unsigned char BYTE; + struct st_ppg0_ndrl2_bit BIT; +}; + +struct st_ppg1_ptrslr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char PTRSL : 1; + unsigned char : 7; +#else + unsigned char : 7; + unsigned char PTRSL : 1; +#endif +}; + +union un_ppg1_ptrslr +{ + unsigned char BYTE; + struct st_ppg1_ptrslr_bit BIT; +}; + +struct st_ppg1_pcr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char G0CMS : 2; + unsigned char G1CMS : 2; + unsigned char G2CMS : 2; + unsigned char G3CMS : 2; +#else + unsigned char G3CMS : 2; + unsigned char G2CMS : 2; + unsigned char G1CMS : 2; + unsigned char G0CMS : 2; +#endif +}; + +union un_ppg1_pcr +{ + unsigned char BYTE; + struct st_ppg1_pcr_bit BIT; +}; + +struct st_ppg1_pmr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char G0NOV : 1; + unsigned char G1NOV : 1; + unsigned char G2NOV : 1; + unsigned char G3NOV : 1; + unsigned char G0INV : 1; + unsigned char G1INV : 1; + unsigned char G2INV : 1; + unsigned char G3INV : 1; +#else + unsigned char G3INV : 1; + unsigned char G2INV : 1; + unsigned char G1INV : 1; + unsigned char G0INV : 1; + unsigned char G3NOV : 1; + unsigned char G2NOV : 1; + unsigned char G1NOV : 1; + unsigned char G0NOV : 1; +#endif +}; + +union un_ppg1_pmr +{ + unsigned char BYTE; + struct st_ppg1_pmr_bit BIT; +}; + +struct st_ppg1_nderh_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char NDER24 : 1; + unsigned char NDER25 : 1; + unsigned char NDER26 : 1; + unsigned char NDER27 : 1; + unsigned char NDER28 : 1; + unsigned char NDER29 : 1; + unsigned char NDER30 : 1; + unsigned char NDER31 : 1; +#else + unsigned char NDER31 : 1; + unsigned char NDER30 : 1; + unsigned char NDER29 : 1; + unsigned char NDER28 : 1; + unsigned char NDER27 : 1; + unsigned char NDER26 : 1; + unsigned char NDER25 : 1; + unsigned char NDER24 : 1; +#endif +}; + +union un_ppg1_nderh +{ + unsigned char BYTE; + struct st_ppg1_nderh_bit BIT; +}; + +struct st_ppg1_nerl_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char NDER16 : 1; + unsigned char NDER17 : 1; + unsigned char NDER18 : 1; + unsigned char NDER19 : 1; + unsigned char NDER20 : 1; + unsigned char NDER21 : 1; + unsigned char NDER22 : 1; + unsigned char NDER23 : 1; +#else + unsigned char NDER23 : 1; + unsigned char NDER22 : 1; + unsigned char NDER21 : 1; + unsigned char NDER20 : 1; + unsigned char NDER19 : 1; + unsigned char NDER18 : 1; + unsigned char NDER17 : 1; + unsigned char NDER16 : 1; +#endif +}; + +union un_ppg1_nderl +{ + unsigned char BYTE; + struct st_ppg1_nerl_bit BIT; +}; + +struct st_ppg1_podrh_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char POD24 : 1; + unsigned char POD25 : 1; + unsigned char POD26 : 1; + unsigned char POD27 : 1; + unsigned char POD28 : 1; + unsigned char POD29 : 1; + unsigned char POD30 : 1; + unsigned char POD31 : 1; +#else + unsigned char POD31 : 1; + unsigned char POD30 : 1; + unsigned char POD29 : 1; + unsigned char POD28 : 1; + unsigned char POD27 : 1; + unsigned char POD26 : 1; + unsigned char POD25 : 1; + unsigned char POD24 : 1; +#endif +}; + +union un_ppg1_podrh +{ + unsigned char BYTE; + struct st_ppg1_podrh_bit BIT; +}; + +struct st_ppg1_podrl_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char POD16 : 1; + unsigned char POD17 : 1; + unsigned char POD18 : 1; + unsigned char POD19 : 1; + unsigned char POD20 : 1; + unsigned char POD21 : 1; + unsigned char POD22 : 1; + unsigned char POD23 : 1; +#else + unsigned char POD23 : 1; + unsigned char POD22 : 1; + unsigned char POD21 : 1; + unsigned char POD20 : 1; + unsigned char POD19 : 1; + unsigned char POD18 : 1; + unsigned char POD17 : 1; + unsigned char POD16 : 1; +#endif +}; + +union un_ppg1_podrl +{ + unsigned char BYTE; + struct st_ppg1_podrl_bit BIT; +}; + +struct st_ppg1_ndrh_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char NDR24 : 1; + unsigned char NDR25 : 1; + unsigned char NDR26 : 1; + unsigned char NDR27 : 1; + unsigned char NDR28 : 1; + unsigned char NDR29 : 1; + unsigned char NDR30 : 1; + unsigned char NDR31 : 1; +#else + unsigned char NDR31 : 1; + unsigned char NDR30 : 1; + unsigned char NDR29 : 1; + unsigned char NDR28 : 1; + unsigned char NDR27 : 1; + unsigned char NDR26 : 1; + unsigned char NDR25 : 1; + unsigned char NDR24 : 1; +#endif +}; + +union un_ppg1_ndrh +{ + unsigned char BYTE; + struct st_ppg1_ndrh_bit BIT; +}; + +struct st_ppg1_ndrl_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char NDR16 : 1; + unsigned char NDR17 : 1; + unsigned char NDR18 : 1; + unsigned char NDR19 : 1; + unsigned char NDR20 : 1; + unsigned char NDR21 : 1; + unsigned char NDR22 : 1; + unsigned char NDR23 : 1; +#else + unsigned char NDR23 : 1; + unsigned char NDR22 : 1; + unsigned char NDR21 : 1; + unsigned char NDR20 : 1; + unsigned char NDR19 : 1; + unsigned char NDR18 : 1; + unsigned char NDR17 : 1; + unsigned char NDR16 : 1; +#endif +}; + +union un_ppg1_ndrl +{ + unsigned char BYTE; + struct st_ppg1_ndrl_bit BIT; +}; + +struct st_ppg1_ndrh2_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char NDR24 : 1; + unsigned char NDR25 : 1; + unsigned char NDR26 : 1; + unsigned char NDR27 : 1; + unsigned char : 4; +#else + unsigned char : 4; + unsigned char NDR27 : 1; + unsigned char NDR26 : 1; + unsigned char NDR25 : 1; + unsigned char NDR24 : 1; +#endif +}; + +union un_ppg1_ndrh2 +{ + unsigned char BYTE; + struct st_ppg1_ndrh2_bit BIT; +}; + +struct st_ppg1_ndrl2_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char NDR16 : 1; + unsigned char NDR17 : 1; + unsigned char NDR18 : 1; + unsigned char NDR19 : 1; + unsigned char : 4; +#else + unsigned char : 4; + unsigned char NDR19 : 1; + unsigned char NDR18 : 1; + unsigned char NDR17 : 1; + unsigned char NDR16 : 1; +#endif +}; + +union un_ppg1_ndrl2 +{ + unsigned char BYTE; + struct st_ppg1_ndrl2_bit BIT; +}; + +struct st_qspi_spcr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char : 1; + unsigned char SPSSLIE : 1; + unsigned char : 1; + unsigned char MSTR : 1; + unsigned char : 1; + unsigned char SPTIE : 1; + unsigned char SPE : 1; + unsigned char SPRIE : 1; +#else + unsigned char SPRIE : 1; + unsigned char SPE : 1; + unsigned char SPTIE : 1; + unsigned char : 1; + unsigned char MSTR : 1; + unsigned char : 1; + unsigned char SPSSLIE : 1; + unsigned char : 1; +#endif +}; + +union un_qspi_spcr +{ + unsigned char BYTE; + struct st_qspi_spcr_bit BIT; +}; + +struct st_qspi_sslp_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char SSLP : 1; + unsigned char : 7; +#else + unsigned char : 7; + unsigned char SSLP : 1; +#endif +}; + +union un_qspi_sslp +{ + unsigned char BYTE; + struct st_qspi_sslp_bit BIT; +}; + +struct st_qspi_sppcr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char SPLP : 1; + unsigned char IO2FV : 1; + unsigned char IO3FV : 1; + unsigned char : 1; + unsigned char MOIFV : 1; + unsigned char MOIFE : 1; + unsigned char : 2; +#else + unsigned char : 2; + unsigned char MOIFE : 1; + unsigned char MOIFV : 1; + unsigned char : 1; + unsigned char IO3FV : 1; + unsigned char IO2FV : 1; + unsigned char SPLP : 1; +#endif +}; + +union un_qspi_sppcr +{ + unsigned char BYTE; + struct st_qspi_sppcr_bit BIT; +}; + +struct st_qspi_spsr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char : 4; + unsigned char SPSSLF : 1; + unsigned char SPTEF : 1; + unsigned char TREND : 1; + unsigned char SPRFF : 1; +#else + unsigned char SPRFF : 1; + unsigned char TREND : 1; + unsigned char SPTEF : 1; + unsigned char SPSSLF : 1; + unsigned char : 4; +#endif +}; + +union un_qspi_spsr +{ + unsigned char BYTE; + struct st_qspi_spsr_bit BIT; +}; + +struct st_qspi_spdr_word +{ + unsigned short H; +}; + +struct st_qspi_spsr_byte +{ + unsigned char HH; +}; + +union un_qspi_spdr +{ + unsigned long LONG; + struct st_qspi_spdr_word WOED; + struct st_qspi_spsr_byte BYTE; +}; + +struct st_qspi_spscr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char SPSC : 2; + unsigned char : 6; +#else + unsigned char : 6; + unsigned char SPSC : 2; +#endif +}; + +union un_qspi_spscr +{ + unsigned char BYTE; + struct st_qspi_spscr_bit BIT; +}; + +struct st_qspi_spssr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char SPSS : 2; + unsigned char : 6; +#else + unsigned char : 6; + unsigned char SPSS : 2; +#endif +}; + +union un_qspi_spssr +{ + unsigned char BYTE; + struct st_qspi_spssr_bit BIT; +}; + +struct st_qspi_spbr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char SPBR0 : 1; + unsigned char SPBR1 : 1; + unsigned char SPBR2 : 1; + unsigned char SPBR3 : 1; + unsigned char SPBR4 : 1; + unsigned char SPBR5 : 1; + unsigned char SPBR6 : 1; + unsigned char SPBR7 : 1; +#else + unsigned char SPBR7 : 1; + unsigned char SPBR6 : 1; + unsigned char SPBR5 : 1; + unsigned char SPBR4 : 1; + unsigned char SPBR3 : 1; + unsigned char SPBR2 : 1; + unsigned char SPBR1 : 1; + unsigned char SPBR0 : 1; +#endif +}; + +union un_qspi_spbr +{ + unsigned char BYTE; + struct st_qspi_spbr_bit BIT; +}; + +struct st_qspi_spdcr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char : 7; + unsigned char TXDMY : 1; +#else + unsigned char TXDMY : 1; + unsigned char : 7; +#endif +}; + +union un_qspi_spdcr +{ + unsigned char BYTE; + struct st_qspi_spdcr_bit BIT; +}; + +struct st_qspi_spckd_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char SCKDL : 3; + unsigned char : 5; +#else + unsigned char : 5; + unsigned char SCKDL : 3; +#endif +}; + +union un_qspi_spckd +{ + unsigned char BYTE; + struct st_qspi_spckd_bit BIT; +}; + +struct st_qspi_sslnd_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char SLNDL : 3; + unsigned char : 5; +#else + unsigned char : 5; + unsigned char SLNDL : 3; +#endif +}; + +union un_qspi_sslnd +{ + unsigned char BYTE; + struct st_qspi_sslnd_bit BIT; +}; + +struct st_qspi_spnd_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char SPNDL : 3; + unsigned char : 5; +#else + unsigned char : 5; + unsigned char SPNDL : 3; +#endif +}; + +union un_qspi_spnd +{ + unsigned char BYTE; + struct st_qspi_spnd_bit BIT; +}; + +struct st_qspi_spcmd0_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned short CPHA : 1; + unsigned short CPOL : 1; + unsigned short BRDV : 2; + unsigned short SPRW : 1; + unsigned short SPIMOD : 2; + unsigned short SSLKP : 1; + unsigned short SPB : 4; + unsigned short LSBF : 1; + unsigned short SPNDEN : 1; + unsigned short SLNDEN : 1; + unsigned short SCKDEN : 1; +#else + unsigned short SCKDEN : 1; + unsigned short SLNDEN : 1; + unsigned short SPNDEN : 1; + unsigned short LSBF : 1; + unsigned short SPB : 4; + unsigned short SSLKP : 1; + unsigned short SPIMOD : 2; + unsigned short SPRW : 1; + unsigned short BRDV : 2; + unsigned short CPOL : 1; + unsigned short CPHA : 1; +#endif +}; + +union un_qspi_spcmd0 +{ + unsigned short WORD; + struct st_qspi_spcmd0_bit BIT; +}; + +struct st_qspi_spcmd1_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned short CPHA : 1; + unsigned short CPOL : 1; + unsigned short BRDV : 2; + unsigned short SPRW : 1; + unsigned short SPIMOD : 2; + unsigned short SSLKP : 1; + unsigned short SPB : 4; + unsigned short LSBF : 1; + unsigned short SPNDEN : 1; + unsigned short SLNDEN : 1; + unsigned short SCKDEN : 1; +#else + unsigned short SCKDEN : 1; + unsigned short SLNDEN : 1; + unsigned short SPNDEN : 1; + unsigned short LSBF : 1; + unsigned short SPB : 4; + unsigned short SSLKP : 1; + unsigned short SPIMOD : 2; + unsigned short SPRW : 1; + unsigned short BRDV : 2; + unsigned short CPOL : 1; + unsigned short CPHA : 1; +#endif +}; + +union un_qspi_spcmd1 +{ + unsigned short WORD; + struct st_qspi_spcmd1_bit BIT; +}; + +struct st_qspi_spcmd2_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned short CPHA : 1; + unsigned short CPOL : 1; + unsigned short BRDV : 2; + unsigned short SPRW : 1; + unsigned short SPIMOD : 2; + unsigned short SSLKP : 1; + unsigned short SPB : 4; + unsigned short LSBF : 1; + unsigned short SPNDEN : 1; + unsigned short SLNDEN : 1; + unsigned short SCKDEN : 1; +#else + unsigned short SCKDEN : 1; + unsigned short SLNDEN : 1; + unsigned short SPNDEN : 1; + unsigned short LSBF : 1; + unsigned short SPB : 4; + unsigned short SSLKP : 1; + unsigned short SPIMOD : 2; + unsigned short SPRW : 1; + unsigned short BRDV : 2; + unsigned short CPOL : 1; + unsigned short CPHA : 1; +#endif +}; + +union un_qspi_spcmd2 +{ + unsigned short WORD; + struct st_qspi_spcmd2_bit BIT; +}; + +struct st_qspi_spcmd3_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned short CPHA : 1; + unsigned short CPOL : 1; + unsigned short BRDV : 2; + unsigned short SPRW : 1; + unsigned short SPIMOD : 2; + unsigned short SSLKP : 1; + unsigned short SPB : 4; + unsigned short LSBF : 1; + unsigned short SPNDEN : 1; + unsigned short SLNDEN : 1; + unsigned short SCKDEN : 1; +#else + unsigned short SCKDEN : 1; + unsigned short SLNDEN : 1; + unsigned short SPNDEN : 1; + unsigned short LSBF : 1; + unsigned short SPB : 4; + unsigned short SSLKP : 1; + unsigned short SPIMOD : 2; + unsigned short SPRW : 1; + unsigned short BRDV : 2; + unsigned short CPOL : 1; + unsigned short CPHA : 1; +#endif +}; + +union un_qspi_spcmd3 +{ + unsigned short WORD; + struct st_qspi_spcmd3_bit BIT; +}; + +struct st_qspi_spbfcr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char RXTRG : 3; + unsigned char TXTRGEX : 1; + unsigned char TXTRG : 2; + unsigned char RXRST : 1; + unsigned char TXRST : 1; +#else + unsigned char TXRST : 1; + unsigned char RXRST : 1; + unsigned char TXTRG : 2; + unsigned char TXTRGEX : 1; + unsigned char RXTRG : 3; +#endif +}; + +union un_qspi_spbfcr +{ + unsigned char BYTE; + struct st_qspi_spbfcr_bit BIT; +}; + +struct st_qspi_spbdcr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned short RXBC : 6; + unsigned short : 2; + unsigned short TXBC : 6; + unsigned short : 2; +#else + unsigned short : 2; + unsigned short TXBC : 6; + unsigned short : 2; + unsigned short RXBC : 6; +#endif +}; + +union un_qspi_spbdcr +{ + unsigned short WORD; + struct st_qspi_spbdcr_bit BIT; +}; + +struct st_ram_rammode_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char RAMMODE : 2; + unsigned char : 6; +#else + unsigned char : 6; + unsigned char RAMMODE : 2; +#endif +}; + +union un_ram_rammode +{ + unsigned char BYTE; + struct st_ram_rammode_bit BIT; +}; + +struct st_ram_ramsts_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char RAMERR : 1; + unsigned char : 7; +#else + unsigned char : 7; + unsigned char RAMERR : 1; +#endif +}; + +union un_ram_ramsts +{ + unsigned char BYTE; + struct st_ram_ramsts_bit BIT; +}; + +struct st_ram_ramprcr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char RAMPRCR : 1; + unsigned char KW : 7; +#else + unsigned char KW : 7; + unsigned char RAMPRCR : 1; +#endif +}; + +union un_ram_ramprcr +{ + unsigned char BYTE; + struct st_ram_ramprcr_bit BIT; +}; + +struct st_ram_ramecad_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long : 3; + unsigned long READ : 16; + unsigned long : 13; +#else + unsigned long : 13; + unsigned long READ : 16; + unsigned long : 3; +#endif +}; + +union un_ram_ramecad +{ + unsigned long LONG; + struct st_ram_ramecad_bit BIT; +}; + +struct st_ram_exrammode_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char EXRAMMODE : 2; + unsigned char : 6; +#else + unsigned char : 6; + unsigned char EXRAMMODE : 2; +#endif +}; + +union un_ram_exrammode +{ + unsigned char BYTE; + struct st_ram_exrammode_bit BIT; +}; + +struct srt_ram_exramsts_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char EXRAMERR : 1; + unsigned char : 7; +#else + unsigned char : 7; + unsigned char EXRAMERR : 1; +#endif +}; + +union un_ram_exramsts +{ + unsigned char BYTE; + struct srt_ram_exramsts_bit BIT; +}; + +struct st_ram_exramprcr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char EXRAMPRCR1 : 1; + unsigned char KW : 7; +#else + unsigned char KW : 7; + unsigned char EXRAMPRCR2 : 1; +#endif +}; + +union un_ram_exramprcr +{ + unsigned char BYTE; + struct st_ram_exramprcr_bit BIT; +}; + +struct st_ram_exramecad_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned long : 3; + unsigned long READ : 16; + unsigned long : 13; +#else + unsigned long : 13; + unsigned long READ : 16; + unsigned long : 3; +#endif +}; + +union un_ram_exramecad +{ + unsigned long LONG; + struct st_ram_exramecad_bit BIT; +}; + +struct st_s12ad_adcsr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned short DBLANS : 5; + unsigned short : 1; + unsigned short GBADIE : 1; + unsigned short DBLE : 1; + unsigned short EXTRG : 1; + unsigned short TRGE : 1; + unsigned short : 2; + unsigned short ADIE : 1; + unsigned short ADCS : 2; + unsigned short ADST : 1; +#else + unsigned short ADST : 1; + unsigned short ADCS : 2; + unsigned short ADIE : 1; + unsigned short : 2; + unsigned short TRGE : 1; + unsigned short EXTRG : 1; + unsigned short DBLE : 1; + unsigned short GBADIE : 1; + unsigned short : 1; + unsigned short DBLANS : 5; +#endif +}; + +union un_s12ad_adcsr +{ + unsigned short WORD; + struct st_s12ad_adcsr_bit BIT; +}; + +struct st_s12ad_adansa0_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned short ANSA000 : 1; + unsigned short ANSA001 : 1; + unsigned short ANSA002 : 1; + unsigned short ANSA003 : 1; + unsigned short ANSA004 : 1; + unsigned short ANSA005 : 1; + unsigned short ANSA006 : 1; + unsigned short ANSA007 : 1; + unsigned short : 8; +#else + unsigned short : 8; + unsigned short ANSA007 : 1; + unsigned short ANSA006 : 1; + unsigned short ANSA005 : 1; + unsigned short ANSA004 : 1; + unsigned short ANSA003 : 1; + unsigned short ANSA002 : 1; + unsigned short ANSA001 : 1; + unsigned short ANSA000 : 1; +#endif +}; + +union un_s12ad_adansa0 +{ + unsigned short WORD; + struct st_s12ad_adansa0_bit BIT; +}; + +struct st_s12ad_adads0_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned short ADS000 : 1; + unsigned short ADS001 : 1; + unsigned short ADS002 : 1; + unsigned short ADS003 : 1; + unsigned short ADS004 : 1; + unsigned short ADS005 : 1; + unsigned short ADS006 : 1; + unsigned short ADS007 : 1; + unsigned short : 8; +#else + unsigned short : 8; + unsigned short ADS007 : 1; + unsigned short ADS006 : 1; + unsigned short ADS005 : 1; + unsigned short ADS004 : 1; + unsigned short ADS003 : 1; + unsigned short ADS002 : 1; + unsigned short ADS001 : 1; + unsigned short ADS000 : 1; +#endif +}; + +union un_s12ad_adads0 +{ + unsigned short WORD; + struct st_s12ad_adads0_bit BIT; +}; + +struct st_s12ad_adadc_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char ADC : 3; + unsigned char : 4; + unsigned char AVEE : 1; +#else + unsigned char AVEE : 1; + unsigned char : 4; + unsigned char ADC : 3; +#endif +}; + +union un_s12ad_adadc +{ + unsigned char BYTE; + struct st_s12ad_adadc_bit BIT; +}; + +struct st_s12ad_adcer_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned short : 1; + unsigned short ADPRC : 2; + unsigned short : 2; + unsigned short ACE : 1; + unsigned short : 2; + unsigned short DIAGVAL : 2; + unsigned short DIAGLD : 1; + unsigned short DIAGM : 1; + unsigned short : 3; + unsigned short ADRFMT : 1; +#else + unsigned short ADRFMT : 1; + unsigned short : 3; + unsigned short DIAGM : 1; + unsigned short DIAGLD : 1; + unsigned short DIAGVAL : 2; + unsigned short : 2; + unsigned short ACE : 1; + unsigned short : 2; + unsigned short ADPRC : 2; + unsigned short : 1; +#endif +}; + +union un_s12ad_adcer +{ + unsigned short WORD; + struct st_s12ad_adcer_bit BIT; +}; + +struct st_s12ad_adstrgr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned short TRSB : 6; + unsigned short : 2; + unsigned short TRSA : 6; + unsigned short : 2; +#else + unsigned short : 2; + unsigned short TRSA : 6; + unsigned short : 2; + unsigned short TRSB : 6; +#endif +}; + +union un_s12ad_adstrgr +{ + unsigned short WORD; + struct st_s12ad_adstrgr_bit BIT; +}; + +struct st_s12ad_adansb0_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned short ANSB000 : 1; + unsigned short ANSB001 : 1; + unsigned short ANSB002 : 1; + unsigned short ANSB003 : 1; + unsigned short ANSB004 : 1; + unsigned short ANSB005 : 1; + unsigned short ANSB006 : 1; + unsigned short ANSB007 : 1; + unsigned short : 8; +#else + unsigned short : 8; + unsigned short ANSB007 : 1; + unsigned short ANSB006 : 1; + unsigned short ANSB005 : 1; + unsigned short ANSB004 : 1; + unsigned short ANSB003 : 1; + unsigned short ANSB002 : 1; + unsigned short ANSB001 : 1; + unsigned short ANSB000 : 1; +#endif +}; + +union un_s12ad_adansb0 +{ + unsigned short WORD; + struct st_s12ad_adansb0_bit BIT; +}; + +union un_s12ad_addbldr +{ + unsigned short WORD; +}; + +struct st_s12ad_adrd_bit_right +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned short AD : 12; + unsigned short : 2; + unsigned short DIAGST : 2; +#else + unsigned short DIAGST : 2; + unsigned short : 2; + unsigned short AD : 12; +#endif +}; + +struct st_s12ad_adrd_bit_left +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned short DIAGST : 2; + unsigned short : 2; + unsigned short AD : 12; +#else + unsigned short AD : 12; + unsigned short : 2; + unsigned short DIAGST : 2; +#endif +}; + +union un_s12ad_adrd_bit +{ + struct st_s12ad_adrd_bit_right RIGHT; + struct st_s12ad_adrd_bit_left LEFT; +}; + +union un_s12ad_adrd +{ + unsigned short WORD; +}; + +struct st_s12ad_adsampr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char PRO : 2; + unsigned char : 6; +#else + unsigned char : 6; + unsigned char PRO : 2; +#endif +}; + +union un_s12ad_adsampr +{ + unsigned char BYTE; + struct st_s12ad_adsampr_bit BIT; +}; + +struct st_s12ad_adshcr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned short SSTSH : 8; + unsigned short SHANS : 3; + unsigned short : 5; +#else + unsigned short : 5; + unsigned short SHANS : 3; + unsigned short SSTSH : 8; +#endif +}; + +union un_s12ad_adshcr +{ + unsigned short WORD; + struct st_s12ad_adshcr_bit BIT; +}; + +struct st_s12ad_adsam_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned short : 5; + unsigned short SAM : 1; + unsigned short : 10; +#else + unsigned short : 10; + unsigned short SAM : 1; + unsigned short : 5; +#endif +}; + +union un_s12ad_adsam +{ + unsigned short WORD; + struct st_s12ad_adsam_bit BIT; +}; + +struct st_s12ad_addiscr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char ADNDIS : 5; + unsigned char : 3; +#else + unsigned char : 3; + unsigned char ADNDIS : 5; +#endif +}; + +union un_s12ad_addiscr +{ + unsigned char BYTE; + struct st_s12ad_addiscr_bit BIT; +}; + +struct st_s12ad_adshmsr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char SHMD : 1; + unsigned char : 7; +#else + unsigned char : 7; + unsigned char SHMD : 1; +#endif +}; + +union un_s12ad_adshmsr +{ + unsigned char BYTE; + struct st_s12ad_adshmsr_bit BIT; +}; + +struct st_s12ad_adgspcr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned short PGS : 1; + unsigned short GBRSCN : 1; + unsigned short : 12; + unsigned short LGRRS : 1; + unsigned short GBRP : 1; +#else + unsigned short GBRP : 1; + unsigned short LGRRS : 1; + unsigned short : 12; + unsigned short GBRSCN : 1; + unsigned short PGS : 1; +#endif +}; + +union un_s12ad_adgspcr +{ + unsigned short WORD; + struct st_s12ad_adgspcr_bit BIT; +}; + +struct st_s12ad_adwinmon_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char MONCOMB : 1; + unsigned char : 3; + unsigned char MONCMPA : 1; + unsigned char MONCMPB : 1; + unsigned char : 2; +#else + unsigned char : 2; + unsigned char MONCMPB : 1; + unsigned char MONCMPA : 1; + unsigned char : 3; + unsigned char MONCOMB : 1; +#endif +}; + +union un_s12ad_adwinmon +{ + unsigned char BYTE; + struct st_s12ad_adwinmon_bit BIT; +}; + +struct st_s12ad_adcmpcr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned short CMPAB : 2; + unsigned short : 7; + unsigned short CMPBE : 1; + unsigned short : 1; + unsigned short CMPAE : 1; + unsigned short : 1; + unsigned short CMPBIE : 1; + unsigned short WCMPE : 1; + unsigned short CMPAIE : 1; +#else + unsigned short CMPAIE : 1; + unsigned short WCMPE : 1; + unsigned short CMPBIE : 1; + unsigned short : 1; + unsigned short CMPAE : 1; + unsigned short : 1; + unsigned short CMPBE : 1; + unsigned short : 7; + unsigned short CMPAB : 2; +#endif +}; + +union un_s12ad_adcmpcr +{ + unsigned short WORD; + struct st_s12ad_adcmpcr_bit BIT; +}; + +struct st_s12ad_adcmpansr0_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned short CMPCHA000 : 1; + unsigned short CMPCHA001 : 1; + unsigned short CMPCHA002 : 1; + unsigned short CMPCHA003 : 1; + unsigned short CMPCHA004 : 1; + unsigned short CMPCHA005 : 1; + unsigned short CMPCHA006 : 1; + unsigned short CMPCHA007 : 1; + unsigned short : 8; +#else + unsigned short : 8; + unsigned short CMPCHA007 : 1; + unsigned short CMPCHA006 : 1; + unsigned short CMPCHA005 : 1; + unsigned short CMPCHA004 : 1; + unsigned short CMPCHA003 : 1; + unsigned short CMPCHA002 : 1; + unsigned short CMPCHA001 : 1; + unsigned short CMPCHA000 : 1; +#endif +}; + +union un_s12ad_adcmpansr0 +{ + unsigned short WORD; + struct st_s12ad_adcmpansr0_bit BIT; +}; + +struct st_s12ad_adcmplr0_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned short CMPLCHA000 : 1; + unsigned short CMPLCHA001 : 1; + unsigned short CMPLCHA002 : 1; + unsigned short CMPLCHA003 : 1; + unsigned short CMPLCHA004 : 1; + unsigned short CMPLCHA005 : 1; + unsigned short CMPLCHA006 : 1; + unsigned short CMPLCHA007 : 1; + unsigned short : 8; +#else + unsigned short : 8; + unsigned short CMPLCHA007 : 1; + unsigned short CMPLCHA006 : 1; + unsigned short CMPLCHA005 : 1; + unsigned short CMPLCHA004 : 1; + unsigned short CMPLCHA003 : 1; + unsigned short CMPLCHA002 : 1; + unsigned short CMPLCHA001 : 1; + unsigned short CMPLCHA000 : 1; +#endif +}; + +union un_s12ad_adcmplr0 +{ + unsigned short WORD; + struct st_s12ad_adcmplr0_bit BIT; +}; + +struct st_s12ad_adcmpsr0_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned short CMPSTCHA000 : 1; + unsigned short CMPSTCHA001 : 1; + unsigned short CMPSTCHA002 : 1; + unsigned short CMPSTCHA003 : 1; + unsigned short CMPSTCHA004 : 1; + unsigned short CMPSTCHA005 : 1; + unsigned short CMPSTCHA006 : 1; + unsigned short CMPSTCHA007 : 1; + unsigned short : 8; +#else + unsigned short : 8; + unsigned short CMPSTCHA007 : 1; + unsigned short CMPSTCHA006 : 1; + unsigned short CMPSTCHA005 : 1; + unsigned short CMPSTCHA004 : 1; + unsigned short CMPSTCHA003 : 1; + unsigned short CMPSTCHA002 : 1; + unsigned short CMPSTCHA001 : 1; + unsigned short CMPSTCHA000 : 1; +#endif +}; + +union un_s12ad_adcmpsr0 +{ + unsigned short WORD; + struct st_s12ad_adcmpsr0_bit BIT; +}; + +struct st_s12ad_adcmpbnsr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char CMPCHB : 6; + unsigned char : 1; + unsigned char CMPLB : 1; +#else + unsigned char CMPLB : 1; + unsigned char : 1; + unsigned char CMPCHB : 6; +#endif +}; + +union un_s12ad_adcmpbnsr +{ + unsigned char BYTE; + struct st_s12ad_adcmpbnsr_bit BIT; +}; + +struct st_s12ad_adcmpbsr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char CMPSTB : 1; + unsigned char : 7; +#else + unsigned char : 7; + unsigned char CMPSTB : 1; +#endif +}; + +union un_s12ad_adcmpbsr +{ + unsigned char BYTE; + struct st_s12ad_adcmpbsr_bit BIT; +}; + +struct st_s12ad_adansc0_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned short ANSC000 : 1; + unsigned short ANSC001 : 1; + unsigned short ANSC002 : 1; + unsigned short ANSC003 : 1; + unsigned short ANSC004 : 1; + unsigned short ANSC005 : 1; + unsigned short ANSC006 : 1; + unsigned short ANSC007 : 1; + unsigned short : 8; +#else + unsigned short : 8; + unsigned short ANSC007 : 1; + unsigned short ANSC006 : 1; + unsigned short ANSC005 : 1; + unsigned short ANSC004 : 1; + unsigned short ANSC003 : 1; + unsigned short ANSC002 : 1; + unsigned short ANSC001 : 1; + unsigned short ANSC000 : 1; +#endif +}; + +union un_s12ad_adansc0 +{ + unsigned short WORD; + struct st_s12ad_adansc0_bit BIT; +}; + +struct st_s12ad_adgctrgr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char TRSC : 6; + unsigned char GCADIE : 1; + unsigned char GRCE : 1; +#else + unsigned char GRCE : 1; + unsigned char GCADIE : 1; + unsigned char TRSC : 6; +#endif +}; + +union un_s12ad_adgctrgr +{ + unsigned char BYTE; + struct st_s12ad_adgctrgr_bit BIT; +}; + +struct st_s12ad1_adcsr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned short DBLANS : 5; + unsigned short : 1; + unsigned short GBADIE : 1; + unsigned short DBLE : 1; + unsigned short EXTRG : 1; + unsigned short TRGE : 1; + unsigned short : 2; + unsigned short ADIE : 1; + unsigned short ADCS : 2; + unsigned short ADST : 1; +#else + unsigned short ADST : 1; + unsigned short ADCS : 2; + unsigned short ADIE : 1; + unsigned short : 2; + unsigned short TRGE : 1; + unsigned short EXTRG : 1; + unsigned short DBLE : 1; + unsigned short GBADIE : 1; + unsigned short : 1; + unsigned short DBLANS : 5; +#endif +}; + +union un_s12ad1_adcsr +{ + unsigned short WORD; + struct st_s12ad1_adcsr_bit BIT; +}; + +struct st_s12ad1_adansa0_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned short ANSA000 : 1; + unsigned short ANSA001 : 1; + unsigned short ANSA002 : 1; + unsigned short ANSA003 : 1; + unsigned short ANSA004 : 1; + unsigned short ANSA005 : 1; + unsigned short ANSA006 : 1; + unsigned short ANSA007 : 1; + unsigned short ANSA008 : 1; + unsigned short ANSA009 : 1; + unsigned short ANSA010 : 1; + unsigned short ANSA011 : 1; + unsigned short ANSA012 : 1; + unsigned short ANSA013 : 1; + unsigned short ANSA014 : 1; + unsigned short ANSA015 : 1; +#else + unsigned short ANSA015 : 1; + unsigned short ANSA014 : 1; + unsigned short ANSA013 : 1; + unsigned short ANSA012 : 1; + unsigned short ANSA011 : 1; + unsigned short ANSA010 : 1; + unsigned short ANSA009 : 1; + unsigned short ANSA008 : 1; + unsigned short ANSA007 : 1; + unsigned short ANSA006 : 1; + unsigned short ANSA005 : 1; + unsigned short ANSA004 : 1; + unsigned short ANSA003 : 1; + unsigned short ANSA002 : 1; + unsigned short ANSA001 : 1; + unsigned short ANSA000 : 1; +#endif +}; + +union un_s12ad1_adansa0 +{ + unsigned short WORD; + struct st_s12ad1_adansa0_bit BIT; +}; + +struct st_s12ad1_adansa1_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned short ANSA100 : 1; + unsigned short ANSA101 : 1; + unsigned short ANSA102 : 1; + unsigned short ANSA103 : 1; + unsigned short ANSA104 : 1; + unsigned short : 11; +#else + unsigned short : 11; + unsigned short ANSA104 : 1; + unsigned short ANSA103 : 1; + unsigned short ANSA102 : 1; + unsigned short ANSA101 : 1; + unsigned short ANSA100 : 1; +#endif +}; + +union un_s12ad1_adansa1 +{ + unsigned short WORD; + struct st_s12ad1_adansa1_bit BIT; +}; + +struct st_s12ad1_adads0_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned short ADS000 : 1; + unsigned short ADS001 : 1; + unsigned short ADS002 : 1; + unsigned short ADS003 : 1; + unsigned short ADS004 : 1; + unsigned short ADS005 : 1; + unsigned short ADS006 : 1; + unsigned short ADS007 : 1; + unsigned short ADS008 : 1; + unsigned short ADS009 : 1; + unsigned short ADS010 : 1; + unsigned short ADS011 : 1; + unsigned short ADS012 : 1; + unsigned short ADS013 : 1; + unsigned short ADS014 : 1; + unsigned short ADS015 : 1; +#else + unsigned short ADS015 : 1; + unsigned short ADS014 : 1; + unsigned short ADS013 : 1; + unsigned short ADS012 : 1; + unsigned short ADS011 : 1; + unsigned short ADS010 : 1; + unsigned short ADS009 : 1; + unsigned short ADS008 : 1; + unsigned short ADS007 : 1; + unsigned short ADS006 : 1; + unsigned short ADS005 : 1; + unsigned short ADS004 : 1; + unsigned short ADS003 : 1; + unsigned short ADS002 : 1; + unsigned short ADS001 : 1; + unsigned short ADS000 : 1; +#endif +}; + +union un_s12ad1_adads0 +{ + unsigned short WORD; + struct st_s12ad1_adads0_bit BIT; +}; + +struct st_s12ad1_adads1_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned short ADS100 : 1; + unsigned short ADS101 : 1; + unsigned short ADS102 : 1; + unsigned short ADS103 : 1; + unsigned short ADS104 : 1; + unsigned short : 11; +#else + unsigned short : 11; + unsigned short ADS104 : 1; + unsigned short ADS103 : 1; + unsigned short ADS102 : 1; + unsigned short ADS101 : 1; + unsigned short ADS100 : 1; +#endif +}; + +union un_s12ad1_adads1 +{ + unsigned short WORD; + struct st_s12ad1_adads1_bit BIT; +}; + +struct st_s12ad1_adadc_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char ADC : 3; + unsigned char : 4; + unsigned char AVEE : 1; +#else + unsigned char AVEE : 1; + unsigned char : 4; + unsigned char ADC : 3; +#endif +}; + +union un_s12ad1_adadc +{ + unsigned char BYTE; + struct st_s12ad1_adadc_bit BIT; +}; + +struct st_s12ad1_adcer_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned short : 1; + unsigned short ADPRC : 2; + unsigned short : 2; + unsigned short ACE : 1; + unsigned short : 2; + unsigned short DIAGVAL : 2; + unsigned short DIAGLD : 1; + unsigned short DIAGM : 1; + unsigned short : 3; + unsigned short ADRFMT : 1; +#else + unsigned short ADRFMT : 1; + unsigned short : 3; + unsigned short DIAGM : 1; + unsigned short DIAGLD : 1; + unsigned short DIAGVAL : 2; + unsigned short : 2; + unsigned short ACE : 1; + unsigned short : 2; + unsigned short ADPRC : 2; + unsigned short : 1; +#endif +}; + +union un_s12ad1_adcer +{ + unsigned short WORD; + struct st_s12ad1_adcer_bit BIT; +}; + +struct st_s12ad1_adstrgr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned short TRSB : 6; + unsigned short : 2; + unsigned short TRSA : 6; + unsigned short : 2; +#else + unsigned short : 2; + unsigned short TRSA : 6; + unsigned short : 2; + unsigned short TRSB : 6; +#endif +}; + +union un_s12ad1_adstrgr +{ + unsigned short WORD; + struct st_s12ad1_adstrgr_bit BIT; +}; + +struct st_s12ad1_adexicr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned short TSSAD : 1; + unsigned short OCSAD : 1; + unsigned short : 6; + unsigned short TSSA : 1; + unsigned short OCSA : 1; + unsigned short TSSB : 1; + unsigned short OCSB : 1; + unsigned short : 1; + unsigned short EXSEL : 2; + unsigned short EXOEN : 1; +#else + unsigned short EXOEN : 1; + unsigned short EXSEL : 2; + unsigned short : 1; + unsigned short OCSB : 1; + unsigned short TSSB : 1; + unsigned short OCSA : 1; + unsigned short TSSA : 1; + unsigned short : 6; + unsigned short OCSAD : 1; + unsigned short TSSAD : 1; +#endif +}; + +union un_s12ad1_adexicr +{ + unsigned short WORD; + struct st_s12ad1_adexicr_bit BIT; +}; + +struct st_s12ad1_adansb0_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned short ANSB000 : 1; + unsigned short ANSB001 : 1; + unsigned short ANSB002 : 1; + unsigned short ANSB003 : 1; + unsigned short ANSB004 : 1; + unsigned short ANSB005 : 1; + unsigned short ANSB006 : 1; + unsigned short ANSB007 : 1; + unsigned short ANSB008 : 1; + unsigned short ANSB009 : 1; + unsigned short ANSB010 : 1; + unsigned short ANSB011 : 1; + unsigned short ANSB012 : 1; + unsigned short ANSB013 : 1; + unsigned short ANSB014 : 1; + unsigned short ANSB015 : 1; +#else + unsigned short ANSB015 : 1; + unsigned short ANSB014 : 1; + unsigned short ANSB013 : 1; + unsigned short ANSB012 : 1; + unsigned short ANSB011 : 1; + unsigned short ANSB010 : 1; + unsigned short ANSB009 : 1; + unsigned short ANSB008 : 1; + unsigned short ANSB007 : 1; + unsigned short ANSB006 : 1; + unsigned short ANSB005 : 1; + unsigned short ANSB004 : 1; + unsigned short ANSB003 : 1; + unsigned short ANSB002 : 1; + unsigned short ANSB001 : 1; + unsigned short ANSB000 : 1; +#endif +}; + +union un_s12ad1_adansb0 +{ + unsigned short WORD; + struct st_s12ad1_adansb0_bit BIT; +}; + +struct st_s12ad1_adansb1_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned short ANSB100 : 1; + unsigned short ANSB101 : 1; + unsigned short ANSB102 : 1; + unsigned short ANSB103 : 1; + unsigned short ANSB104 : 1; + unsigned short : 11; +#else + unsigned short : 11; + unsigned short ANSB104 : 1; + unsigned short ANSB103 : 1; + unsigned short ANSB102 : 1; + unsigned short ANSB101 : 1; + unsigned short ANSB100 : 1; +#endif +}; + +union un_s12ad1_adansb1 +{ + unsigned short WORD; + struct st_s12ad1_adansb1_bit BIT; +}; + +struct st_s12ad1_adrd_bit_right +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned short AD : 12; + unsigned short : 2; + unsigned short DIAGST : 2; +#else + unsigned short DIAGST : 2; + unsigned short : 2; + unsigned short AD : 12; +#endif +}; + +struct st_s12ad1_adrd_bit_left +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned short DIAGST : 2; + unsigned short : 2; + unsigned short AD : 12; +#else + unsigned short AD : 12; + unsigned short : 2; + unsigned short DIAGST : 2; +#endif +}; + +union un_s12ad1_adrd_bit +{ + struct st_s12ad1_adrd_bit_right RIGHT; + struct st_s12ad1_adrd_bit_left LEFT; +}; + +union un_s12ad1_adrd +{ + unsigned short WORD; +}; + +struct st_s12ad1_adsampr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char PRO : 2; + unsigned char : 6; +#else + unsigned char : 6; + unsigned char PRO : 2; +#endif +}; + +union un_s12ad1_adsampr +{ + unsigned char BYTE; + struct st_s12ad1_adsampr_bit BIT; +}; + +struct st_s12ad1_adsam_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned short : 5; + unsigned short SAM : 1; + unsigned short : 10; +#else + unsigned short : 10; + unsigned short SAM : 1; + unsigned short : 5; +#endif +}; + +union un_s12ad1_adsam +{ + unsigned short WORD; + struct st_s12ad1_adsam_bit BIT; +}; + +struct st_s12ad1_addiscr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char ADNDIS : 5; + unsigned char : 3; +#else + unsigned char : 3; + unsigned char ADNDIS : 5; +#endif +}; + +union un_s12ad1_addiscr +{ + unsigned char BYTE; + struct st_s12ad1_addiscr_bit BIT; +}; + +struct st_s12ad1_adgspcr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned short PGS : 1; + unsigned short GBRSCN : 1; + unsigned short : 12; + unsigned short LGRRS : 1; + unsigned short GBRP : 1; +#else + unsigned short GBRP : 1; + unsigned short LGRRS : 1; + unsigned short : 12; + unsigned short GBRSCN : 1; + unsigned short PGS : 1; +#endif +}; + +union un_s12ad1_adgspcr +{ + unsigned short WORD; + struct st_s12ad1_adgspcr_bit BIT; +}; + +struct st_s12ad1_adwinmon_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char MONCOMB : 1; + unsigned char : 3; + unsigned char MONCMPA : 1; + unsigned char MONCMPB : 1; + unsigned char : 2; +#else + unsigned char : 2; + unsigned char MONCMPB : 1; + unsigned char MONCMPA : 1; + unsigned char : 3; + unsigned char MONCOMB : 1; +#endif +}; + +union un_s12ad1_adwinmon +{ + unsigned char BYTE; + struct st_s12ad1_adwinmon_bit BIT; +}; + +struct st_s12ad1_adcmpcr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned short CMPAB : 2; + unsigned short : 7; + unsigned short CMPBE : 1; + unsigned short : 1; + unsigned short CMPAE : 1; + unsigned short : 1; + unsigned short CMPBIE : 1; + unsigned short WCMPE : 1; + unsigned short CMPAIE : 1; +#else + unsigned short CMPAIE : 1; + unsigned short WCMPE : 1; + unsigned short CMPBIE : 1; + unsigned short : 1; + unsigned short CMPAE : 1; + unsigned short : 1; + unsigned short CMPBE : 1; + unsigned short : 7; + unsigned short CMPAB : 2; +#endif +}; + +union un_s12ad1_adcmpcr +{ + unsigned short WORD; + struct st_s12ad1_adcmpcr_bit BIT; +}; + +struct st_s12ad1_adcmpanser_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char CMPSTS : 1; + unsigned char CMPSOC : 1; + unsigned char : 6; +#else + unsigned char : 6; + unsigned char CMPSOC : 1; + unsigned char CMPSTS : 1; +#endif +}; + +union un_s12ad1_adcmpanser +{ + unsigned char BYTE; + struct st_s12ad1_adcmpanser_bit BIT; +}; + +struct st_s12ad1_adcmpler_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char CMPLTS : 1; + unsigned char CMPLOC : 1; + unsigned char : 6; +#else + unsigned char : 6; + unsigned char CMPLOC : 1; + unsigned char CMPLTS : 1; +#endif +}; + +union un_s12ad1_adcmpler +{ + unsigned char BYTE; + struct st_s12ad1_adcmpler_bit BIT; +}; + +struct st_s12ad1_adcmpansr0_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned short CMPCHA000 : 1; + unsigned short CMPCHA001 : 1; + unsigned short CMPCHA002 : 1; + unsigned short CMPCHA003 : 1; + unsigned short CMPCHA004 : 1; + unsigned short CMPCHA005 : 1; + unsigned short CMPCHA006 : 1; + unsigned short CMPCHA007 : 1; + unsigned short CMPCHA008 : 1; + unsigned short CMPCHA009 : 1; + unsigned short CMPCHA010 : 1; + unsigned short CMPCHA011 : 1; + unsigned short CMPCHA012 : 1; + unsigned short CMPCHA013 : 1; + unsigned short CMPCHA014 : 1; + unsigned short CMPCHA015 : 1; +#else + unsigned short CMPCHA015 : 1; + unsigned short CMPCHA014 : 1; + unsigned short CMPCHA013 : 1; + unsigned short CMPCHA012 : 1; + unsigned short CMPCHA011 : 1; + unsigned short CMPCHA010 : 1; + unsigned short CMPCHA009 : 1; + unsigned short CMPCHA008 : 1; + unsigned short CMPCHA007 : 1; + unsigned short CMPCHA006 : 1; + unsigned short CMPCHA005 : 1; + unsigned short CMPCHA004 : 1; + unsigned short CMPCHA003 : 1; + unsigned short CMPCHA002 : 1; + unsigned short CMPCHA001 : 1; + unsigned short CMPCHA000 : 1; +#endif +}; + +union un_s12ad1_adcmpansr0 +{ + unsigned short WORD; + struct st_s12ad1_adcmpansr0_bit BIT; +}; + +struct st_s12ad1_adcmpansr1_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned short CMPCHA100 : 1; + unsigned short CMPCHA101 : 1; + unsigned short CMPCHA102 : 1; + unsigned short CMPCHA103 : 1; + unsigned short CMPCHA104 : 1; + unsigned short : 11; +#else + unsigned short : 11; + unsigned short CMPCHA104 : 1; + unsigned short CMPCHA103 : 1; + unsigned short CMPCHA102 : 1; + unsigned short CMPCHA101 : 1; + unsigned short CMPCHA100 : 1; +#endif +}; + +union un_s12ad1_adcmpansr1 +{ + unsigned short WORD; + struct st_s12ad1_adcmpansr1_bit BIT; +}; + +struct st_s12ad1_adcmplr0_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned short CMPLCHA000 : 1; + unsigned short CMPLCHA001 : 1; + unsigned short CMPLCHA002 : 1; + unsigned short CMPLCHA003 : 1; + unsigned short CMPLCHA004 : 1; + unsigned short CMPLCHA005 : 1; + unsigned short CMPLCHA006 : 1; + unsigned short CMPLCHA007 : 1; + unsigned short CMPLCHA008 : 1; + unsigned short CMPLCHA009 : 1; + unsigned short CMPLCHA010 : 1; + unsigned short CMPLCHA011 : 1; + unsigned short CMPLCHA012 : 1; + unsigned short CMPLCHA013 : 1; + unsigned short CMPLCHA014 : 1; + unsigned short CMPLCHA015 : 1; +#else + unsigned short CMPLCHA015 : 1; + unsigned short CMPLCHA014 : 1; + unsigned short CMPLCHA013 : 1; + unsigned short CMPLCHA012 : 1; + unsigned short CMPLCHA011 : 1; + unsigned short CMPLCHA010 : 1; + unsigned short CMPLCHA009 : 1; + unsigned short CMPLCHA008 : 1; + unsigned short CMPLCHA007 : 1; + unsigned short CMPLCHA006 : 1; + unsigned short CMPLCHA005 : 1; + unsigned short CMPLCHA004 : 1; + unsigned short CMPLCHA003 : 1; + unsigned short CMPLCHA002 : 1; + unsigned short CMPLCHA001 : 1; + unsigned short CMPLCHA000 : 1; +#endif +}; + +union un_s12ad1_adcmplr0 +{ + unsigned short WORD; + struct st_s12ad1_adcmplr0_bit BIT; +}; + +struct st_s12ad1_adcmplr1_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned short CMPLCHA100 : 1; + unsigned short CMPLCHA101 : 1; + unsigned short CMPLCHA102 : 1; + unsigned short CMPLCHA103 : 1; + unsigned short CMPLCHA104 : 1; + unsigned short : 11; +#else + unsigned short : 11; + unsigned short CMPLCHA104 : 1; + unsigned short CMPLCHA103 : 1; + unsigned short CMPLCHA102 : 1; + unsigned short CMPLCHA101 : 1; + unsigned short CMPLCHA100 : 1; +#endif +}; + +union un_s12ad1_adcmplr1 +{ + unsigned short WORD; + struct st_s12ad1_adcmplr1_bit BIT; +}; + +struct st_s12ad1_adcmpsr0_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned short CMPSTCHA000 : 1; + unsigned short CMPSTCHA001 : 1; + unsigned short CMPSTCHA002 : 1; + unsigned short CMPSTCHA003 : 1; + unsigned short CMPSTCHA004 : 1; + unsigned short CMPSTCHA005 : 1; + unsigned short CMPSTCHA006 : 1; + unsigned short CMPSTCHA007 : 1; + unsigned short CMPSTCHA008 : 1; + unsigned short CMPSTCHA009 : 1; + unsigned short CMPSTCHA010 : 1; + unsigned short CMPSTCHA011 : 1; + unsigned short CMPSTCHA012 : 1; + unsigned short CMPSTCHA013 : 1; + unsigned short CMPSTCHA014 : 1; + unsigned short CMPSTCHA015 : 1; +#else + unsigned short CMPSTCHA015 : 1; + unsigned short CMPSTCHA014 : 1; + unsigned short CMPSTCHA013 : 1; + unsigned short CMPSTCHA012 : 1; + unsigned short CMPSTCHA011 : 1; + unsigned short CMPSTCHA010 : 1; + unsigned short CMPSTCHA009 : 1; + unsigned short CMPSTCHA008 : 1; + unsigned short CMPSTCHA007 : 1; + unsigned short CMPSTCHA006 : 1; + unsigned short CMPSTCHA005 : 1; + unsigned short CMPSTCHA004 : 1; + unsigned short CMPSTCHA003 : 1; + unsigned short CMPSTCHA002 : 1; + unsigned short CMPSTCHA001 : 1; + unsigned short CMPSTCHA000 : 1; +#endif +}; + +union un_s12ad1_adcmpsr0 +{ + unsigned short WORD; + struct st_s12ad1_adcmpsr0_bit BIT; +}; + +struct st_s12ad1_adcmpsr1_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned short CMPSTCHA100 : 1; + unsigned short CMPSTCHA101 : 1; + unsigned short CMPSTCHA102 : 1; + unsigned short CMPSTCHA103 : 1; + unsigned short CMPSTCHA104 : 1; + unsigned short : 11; +#else + unsigned short : 11; + unsigned short CMPSTCHA104 : 1; + unsigned short CMPSTCHA103 : 1; + unsigned short CMPSTCHA102 : 1; + unsigned short CMPSTCHA101 : 1; + unsigned short CMPSTCHA100 : 1; +#endif +}; + +union un_s12ad1_adcmpsr1 +{ + unsigned short WORD; + struct st_s12ad1_adcmpsr1_bit BIT; +}; + +struct st_s12ad1_adcmpser_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char CMPFTS : 1; + unsigned char CMPFOC : 1; + unsigned char : 6; +#else + unsigned char : 6; + unsigned char CMPFOC : 1; + unsigned char CMPFTS : 1; +#endif +}; + +union un_s12ad1_adcmpser +{ + unsigned char BYTE; + struct st_s12ad1_adcmpser_bit BIT; +}; + +struct st_s12ad1_adcmpbnsr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char CMPCHB : 6; + unsigned char : 1; + unsigned char CMPLB : 1; +#else + unsigned char CMPLB : 1; + unsigned char : 1; + unsigned char CMPCHB : 6; +#endif +}; + +union un_s12ad1_adcmpbnsr +{ + unsigned char BYTE; + struct st_s12ad1_adcmpbnsr_bit BIT; +}; + +struct st_s12ad1_adcmpbsr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char CMPSTB : 1; + unsigned char : 7; +#else + unsigned char : 7; + unsigned char CMPSTB : 1; +#endif +}; + +union un_s12ad1_adcmpbsr +{ + unsigned char BYTE; + struct st_s12ad1_adcmpbsr_bit BIT; +}; + +struct st_s12ad1_adansc0_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned short ANSC000 : 1; + unsigned short ANSC001 : 1; + unsigned short ANSC002 : 1; + unsigned short ANSC003 : 1; + unsigned short ANSC004 : 1; + unsigned short ANSC005 : 1; + unsigned short ANSC006 : 1; + unsigned short ANSC007 : 1; + unsigned short ANSC008 : 1; + unsigned short ANSC009 : 1; + unsigned short ANSC010 : 1; + unsigned short ANSC011 : 1; + unsigned short ANSC012 : 1; + unsigned short ANSC013 : 1; + unsigned short ANSC014 : 1; + unsigned short ANSC015 : 1; +#else + unsigned short ANSC015 : 1; + unsigned short ANSC014 : 1; + unsigned short ANSC013 : 1; + unsigned short ANSC012 : 1; + unsigned short ANSC011 : 1; + unsigned short ANSC010 : 1; + unsigned short ANSC009 : 1; + unsigned short ANSC008 : 1; + unsigned short ANSC007 : 1; + unsigned short ANSC006 : 1; + unsigned short ANSC005 : 1; + unsigned short ANSC004 : 1; + unsigned short ANSC003 : 1; + unsigned short ANSC002 : 1; + unsigned short ANSC001 : 1; + unsigned short ANSC000 : 1; +#endif +}; + +union un_s12ad1_adansc0 +{ + unsigned short WORD; + struct st_s12ad1_adansc0_bit BIT; +}; + +struct st_s12ad1_adansc1_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned short ANSC100 : 1; + unsigned short ANSC101 : 1; + unsigned short ANSC102 : 1; + unsigned short ANSC103 : 1; + unsigned short ANSC104 : 1; + unsigned short : 11; +#else + unsigned short : 11; + unsigned short ANSC104 : 1; + unsigned short ANSC103 : 1; + unsigned short ANSC102 : 1; + unsigned short ANSC101 : 1; + unsigned short ANSC100 : 1; +#endif +}; + +union un_s12ad1_adansc1 +{ + unsigned short WORD; + struct st_s12ad1_adansc1_bit BIT; +}; + +struct st_s12ad1_adgcexcr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char TSSC : 1; + unsigned char OCSC : 1; + unsigned char : 6; +#else + unsigned char : 6; + unsigned char OCSC : 1; + unsigned char TSSC : 1; +#endif +}; + +union un_s12ad1_adgcexcr +{ + unsigned char BYTE; + struct st_s12ad1_adgcexcr_bit BIT; +}; + +struct st_s12ad1_adgctrgr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char TRSC : 6; + unsigned char GCADIE : 1; + unsigned char GRCE : 1; +#else + unsigned char GRCE : 1; + unsigned char GCADIE : 1; + unsigned char TRSC : 6; +#endif +}; + +union un_s12ad1_adgctrgr +{ + unsigned char BYTE; + struct st_s12ad1_adgctrgr_bit BIT; +}; + +struct st_smci10_smr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char CKS : 2; + unsigned char BCP : 2; + unsigned char PM : 1; + unsigned char PE : 1; + unsigned char BLK : 1; + unsigned char GM : 1; +#else + unsigned char GM : 1; + unsigned char BLK : 1; + unsigned char PE : 1; + unsigned char PM : 1; + unsigned char BCP : 2; + unsigned char CKS : 2; +#endif +}; + +union un_smci10_smr +{ + unsigned char BYTE; + struct st_smci10_smr_bit BIT; +}; + +struct st_smci_scr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char CKE : 2; + unsigned char TEIE : 1; + unsigned char MPIE : 1; + unsigned char RE : 1; + unsigned char TE : 1; + unsigned char RIE : 1; + unsigned char TIE : 1; +#else + unsigned char TIE : 1; + unsigned char RIE : 1; + unsigned char TE : 1; + unsigned char RE : 1; + unsigned char MPIE : 1; + unsigned char TEIE : 1; + unsigned char CKE : 2; +#endif +}; + +union un_smci10_scr +{ + unsigned char BYTE; + struct st_smci_scr_bit BIT; +}; + +struct st_smci10_ssr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char MPBT : 1; + unsigned char MPB : 1; + unsigned char TEND : 1; + unsigned char PER : 1; + unsigned char ERS : 1; + unsigned char ORER : 1; + unsigned char RDRF : 1; + unsigned char TDRE : 1; +#else + unsigned char TDRE : 1; + unsigned char RDRF : 1; + unsigned char ORER : 1; + unsigned char ERS : 1; + unsigned char PER : 1; + unsigned char TEND : 1; + unsigned char MPB : 1; + unsigned char MPBT : 1; +#endif +}; + +union un_smci10_ssr +{ + unsigned char BYTE; + struct st_smci10_ssr_bit BIT; +}; + +struct st_smci10_scmr_bit +{ +#ifdef __RX_LITTLE_ENDIAN__ + unsigned char SMIF : 1; + unsigned char : 1; + unsigned char SINV : 1; + unsigned char SDIR : 1; + unsigned char CHR1 : 1; + unsigned char : 2; + unsigned char BCP2 : 1; +#else + unsigned char BCP2 : 1; + unsigned char : 2; + unsigned char CHR1 : 1; + unsigned char SDIR : 1; + unsigned char SINV : 1; + unsigned char : 1; + unsigned char SMIF : 1; +#endif +}; + +union un_smci10_scmr +{ + unsigned char BYTE; + struct st_smci10_scmr_bit BIT; +}; + +typedef struct st_smci10 +{ + union un_smci10_smr SMR; + char wk0[1]; + union un_smci10_scr SCR; + char wk1[1]; + union un_smci10_ssr SSR; + char wk2[1]; + union un_smci10_scmr SCMR; +} st_smci10_t; + typedef struct st_bsc { - union un_berclr BERCLR; + union un_bsc_berclr BERCLR; char wk0[3]; + union un_bsc_beren BEREN; char wk1[3]; - union un_beren BEREN; + union un_bsc_bersr1 BERSR1; char wk2[1]; - union un_bersr1 BERSR1; + union un_bsc_bersr2 BERSR2; char wk3[4]; - union un_bersr2 BERSR2; + union un_bsc_buspri BUSPRI; char wk4[7408]; - union un_buspri BUSPRI; - union un_cs0mod CS0MOD; - union un_cs0wcr1 CS0WCR1; + union un_bsc_cs0mod CS0MOD; + union un_bsc_cs0wcr1 CS0WCR1; + union un_bsc_cs0wcr2 CS0WCR2; char wk5[6]; - union un_cs1mod CS1MOD; - union un_cs1wcr1 CS1WCR1; - union un_cs1wcr2 CS1WCR2; + union un_bsc_cs1mod CS1MOD; + union un_bsc_cs1wcr1 CS1WCR1; + union un_bsc_cs1wcr2 CS1WCR2; char wk6[6]; - union un_cs2mod CS2MOD; - union un_cs2wcr1 CS2WCR1; - union un_cs2wcr2 CS2WCR2; + union un_bsc_cs2mod CS2MOD; + union un_bsc_cs2wcr1 CS2WCR1; + union un_bsc_cs2wcr2 CS2WCR2; char wk7[6]; - union un_cs3mod CS3MOD; - union un_cs3wcr1 CS3WCR1; - union un_cs3wcr2 CS3WCR2; + union un_bsc_cs3mod CS3MOD; + union un_bsc_cs3wcr1 CS3WCR1; + union un_bsc_cs3wcr2 CS3WCR2; char wk8[6]; - union un_cs4mod CS4MOD; - union un_cs4wcr1 CS4WCR1; - union un_cs4wcr2 CS4WCR2; + union un_bsc_cs4mod CS4MOD; + union un_bsc_cs4wcr1 CS4WCR1; + union un_bsc_cs4wcr2 CS4WCR2; char wk9[6]; - union un_cs5mod CS5MOD; - union un_cs5wcr1 CS5WCR1; - union un_cs5wcr2 CS5WCR2; + union un_bsc_cs5mod CS5MOD; + union un_bsc_cs5wcr1 CS5WCR1; + union un_bsc_cs5wcr2 CS5WCR2; char wk10[6]; - union un_cs6mod CS6MOD; - union un_cs6wcr1 CS6WCR1; - union un_cs6wcr2 CS6WCR2; + union un_bsc_cs6mod CS6MOD; + union un_bsc_cs6wcr1 CS6WCR1; + union un_bsc_cs6wcr2 CS6WCR2; char wk11[6]; - union un_cs7mod CS7MOD; - union un_cs7wcr1 CS7WCR1; - union un_cs7wcr2 CS7WCR2; + union un_bsc_cs7mod CS7MOD; + union un_bsc_cs7wcr1 CS7WCR1; + union un_bsc_cs7wcr2 CS7WCR2; char wk12[1926]; - union un_cs0cr CS0CR; + union un_bsc_cs0cr CS0CR; char wk13[6]; - union un_cs0rec CS0REC; + union un_bsc_cs0rec CS0REC; char wk14[6]; - union un_cs1cr CS1CR; + union un_bsc_cs1cr CS1CR; char wk15[6]; - union un_cs1rec CS1REC; + union un_bsc_cs1rec CS1REC; char wk16[6]; - union un_cs2cr CS2CR; + union un_bsc_cs2cr CS2CR; char wk17[6]; - union un_cs2rec CS2REC; + union un_bsc_cs2rec CS2REC; char wk18[6]; - union un_cs3cr CS3CR; + union un_bsc_cs3cr CS3CR; char wk19[6]; - union un_cs3rec CS3REC; + union un_bsc_cs3rec CS3REC; char wk20[6]; - union un_cs4cr CS4CR; + union un_bsc_cs4cr CS4CR; char wk21[6]; - union un_cs4rec CS4REC; + union un_bsc_cs4rec CS4REC; char wk22[6]; - union un_cs5cr CS5CR; + union un_bsc_cs5cr CS5CR; char wk23[6]; - union un_cs5rec CS5REC; + union un_bsc_cs5rec CS5REC; char wk24[6]; - union un_cs6cr CS6CR; + union un_bsc_cs6cr CS6CR; char wk25[6]; - union un_cs6rec CS6REC; + union un_bsc_cs6rec CS6REC; char wk26[6]; - union un_cs7cr CS7CR; + union un_bsc_cs7cr CS7CR; char wk27[6]; - union un_cs7rec CS7REC; + union un_bsc_cs7rec CS7REC; char wk28[4]; - union un_csrecen CSRECEN; + union un_bsc_csrecen CSRECEN; char wk29[894]; - union un_sdccr SDCCR; - union un_sdcmod SDCMOD; - union un_sdamod SDAMOD; + union un_bsc_sdccr SDCCR; + union un_bsc_sdcmod SDCMOD; + union un_bsc_sdamod SDAMOD; char wk30[13]; - union un_sdself SDSELF; + union un_bsc_sdself SDSELF; char wk31[3]; - union un_sdrfcr SDRFCR; - union un_sdrfen SDRFEN; + union un_bsc_sdrfcr SDRFCR; + union un_bsc_sdrfen SDRFEN; char wk32[9]; - union un_sdicr SDICR; + union un_bsc_sdicr SDICR; char wk33[3]; - union un_sdir SDIR; + union un_bsc_sdir SDIR; char wk34[26]; - union un_sdar SDAR; + union un_bsc_sdadr SDADR; char wk35[3]; - union un_sdtr SDTR; - union un_sdmod SDMOD; + union un_bsc_sdtr SDTR; + union un_bsc_sdmod SDMOD; char wk36[6]; - union un_sdsr SDSR; + union un_bsc_sdsr SDSR; char wk37[269231]; - union un_ebmapcr EBMAPCR; + union un_bsc_ebmapcr EBMAPCR; } st_bsc_t; typedef struct st_cac { - union un_cacr0 CACR0; - union un_cacr1 CACR1; - union un_cacr2 CACR2; - union un_caicr CAICR; - union un_castr CASTR; - char wk0[1]; - unsigned short CAULVR; - unsigned short CALLVR; - unsigned short CACNTBR; + union un_cac_cacr0 CACR0; + union un_cac_cacr1 CACR1; + union un_cac_cacr2 CACR2; + union un_cac_caicr CAICR; + union un_cac_castr CASTR; + char wk0[1]; + unsigned short CAULVR; + unsigned short CALLVR; + unsigned short CACNTBR; } st_cac_t; +typedef struct st_can +{ + struct st_can_mb MB[32]; + union un_can_mkr MKR[8]; + union un_can_fidcr0 FIDCR0; + union un_can_fidcr1 FIDCR1; + union un_can_mkivlr MKIVLR; + union un_can_mier MIER; + char wk0[1008]; + union un_can_mctl MCTL[32]; + union un_can_ctlr CTLR; + union un_can_str STR; + union un_can_bcr BCR; + union un_can_rfcr RFCR; + unsigned char RFPCR; + union un_can_tfcr TFCR; + unsigned char TFPCR; + union un_can_eier EIER; + union un_can_eifr EIFR; + unsigned char RECR; + unsigned char TECR; + union un_can_ecsr ECSR; + unsigned char CSSR; + union un_can_mssr MSSR; + union un_can_msmr MSMR; + unsigned short TSR; + unsigned short AFSR; + union un_can_tcr TCR; +} st_can_t; + typedef struct st_cmt { - union un_cmstr0 CMSTR0; + union un_cmt_cmstr0 CMSTR0; char wk0[14]; - union un_cmstr1 CMSTR1; + union un_cmt_cmstr1 CMSTR1; } st_cmt_t; typedef struct st_cmt0 { - union un_cmcr CMCR; + union un_cmt0_cmcr CMCR; unsigned short CMCNT; unsigned short CMCOR; } st_cmt0_t; @@ -17017,20 +35414,20 @@ typedef struct st_icu { union un_icu_ir256 IR[256]; union un_icu_dtcer256 DTCER[256]; - union un_ier32 IER[32]; + union un_icu_ier32 IER[32]; char wk0[192]; - union un_swintr SWINTR; - union un_swint2r SWINT2R; + union un_icu_swintr SWINTR; + union un_icu_swint2r SWINT2R; char wk1[14]; union un_icu_fir FIR; - char wk2[14]; + char wk2[14]; union un_icu_ipr256 IPR[256]; unsigned char DMRSR0; - char wk3[3]; + char wk3[3]; unsigned char DMRSR1; - char wk4[3]; + char wk4[3]; unsigned char DMRSR2; - char wk5[3]; + char wk5[3]; unsigned char DMRSR3; char wk6[3]; unsigned char DMRSR4; @@ -17041,10 +35438,10 @@ typedef struct st_icu char wk9[3]; unsigned char DMRSR7; char wk10[227]; - union un_irqcr16 IRQCR[16]; + union un_icu_irqcr16 IRQCR[16]; char wk11[16]; - union un_irqflte0 IRQFLTE0; - union un_irqflte1 IRQFLTE1; + union un_icu_irqflte0 IRQFLTE0; + union un_icu_irqflte1 IRQFLTE1; char wk12[6]; union un_icu_irqfltc0 IRQFLTC0; union un_icu_irqfltc1 IRQFLCT1; @@ -17060,14 +35457,14 @@ typedef struct st_icu char wk16[107]; union un_icu_grpbe0 GRPBE0; char wk17[44]; - union un_grpbl0 GRPBL0; - union un_grpbl1 GRPBL1; + union un_icu_grpbl0 GRPBL0; + union un_icu_grpbl1 GRPBL1; union un_icu_grpbl2 GRPBL2; char wk18[4]; union un_icu_genbe0 GENBE0; char wk19[44]; - union un_genbl0 GENBL0; - union un_genbl1 GENBL1; + union un_icu_genbl0 GENBL0; + union un_icu_genbl1 GENBL1; union un_icu_genbl2 GENBL2; char wk20[4]; union un_icu_gcrbe0 GCRBE0; @@ -17166,11 +35563,11 @@ typedef struct st_icu union un_icu_slibr206 SLIBR206; union un_icu_slibr207 SLIBR207; char wk23[96]; - union un_grpal0 GRPAL0; - union un_grpal1 GRPAL1; + union un_icu_grpal0 GRPAL0; + union un_icu_grpal1 GRPAL1; char wk24[56]; - union un_genal0 GENAL0; - union un_genal1 GENAL1; + union un_icu_genal0 GENAL0; + union un_icu_genal1 GENAL1; char wk25[136]; union un_icu_piar0 PIAR0; union un_icu_piar1 PIAR1; @@ -17210,6 +35607,7 @@ typedef struct st_icu union un_icu_sliar234 SLIAR234; union un_icu_sliar235 SLIAR235; union un_icu_sliar236 SLIAR236; + union un_icu_sliar236 SLIAR237; union un_icu_sliar237 SLIAR238; union un_icu_sliar239 SLIAR239; union un_icu_sliar240 SLIAR240; @@ -17235,7 +35633,7 @@ typedef struct st_icu typedef struct st_mpc { union un_mpc_pfcse PFCSE; - char wk0[1]; + char wk0[1]; union un_mpc_pfcss0 PFCSS0; union un_mpc_pfcss1 PFCSS1; union un_mpc_pfa0e0 PFA0E0; @@ -17247,10 +35645,10 @@ typedef struct st_mpc char wk1[4]; union un_mpc_pfenet PFENET; char wk2[16]; - union un_pwpr PWPR; + union un_mpc_pwpr PWPR; char wk3[32]; - union un_p00pfs P00PFS; - union un_p01pfs P01PFS; + union un_mpc_p00pfs P00PFS; + union un_mpc_p01pfs P01PFS; union un_mpc_p02pfs P02PFS; union un_mpc_p03pfs P03PFS; char wk4[1]; @@ -17375,22 +35773,22 @@ typedef struct st_mpc typedef struct st_port0 { - union un_pdr PDR; + union un_port0_pdr PDR; char wk0[31]; - union un_podr PODR; + union un_port0_podr PODR; char wk1[31]; - union un_pidr PIDR; + union un_port0_pidr PIDR; char wk2[31]; - union un_pmr PMR; + union un_port0_pmr PMR; char wk3[31]; - union un_odr0 ODR0; - union un_odr1 ODR1; + union un_port0_odr0 ODR0; + union un_port0_odr1 ODR1; char wk4[62]; - union un_pcr PCR; + union un_port0_pcr PCR; char wk5[31]; - union un_dscr DSCR; + union un_port0_dscr DSCR; char wk6[71]; - union un_dscr2 DSCR2; + union un_port0_dscr2 DSCR2; } st_port0_t; typedef struct st_port1 @@ -17685,14 +36083,14 @@ typedef struct st_rtc char wk2[1]; union { - union un_rtc_rhrcnt RHRCNT; - union un_rtc_bcnt2 BCNT2; + union un_rtc_rhrcnt RHRCNT; + union un_rtc_bcnt2 BCNT2; }; char wk3[1]; union { - union un_rtc_rwkcnt RWKCNT; - union un_rtc_bcnt3 BCNT3; + union un_rtc_rwkcnt RWKCNT; + union un_rtc_bcnt3 BCNT3; }; char wk4[1]; union un_rtc_rdaycnt RDAYCNT; @@ -17702,56 +36100,56 @@ typedef struct st_rtc union un_rtc_ryrcnt RYRCNT; union { - union un_rtc_rsecar RSECAR; - union un_rtc_bcnt0ar BCNT0AR; + union un_rtc_rsecar RSECAR; + union un_rtc_bcnt0ar BCNT0AR; }; char wk7[1]; union { - union un_rtc_rminar RMINAR; - union un_rtc_bcnt1ar BCNT1AR; + union un_rtc_rminar RMINAR; + union un_rtc_bcnt1ar BCNT1AR; }; - char wk8[1]; + char wk8[1]; union { - union un_rtc_rhrar RHRAR; - union un_rtc_bcnt2ar BCNT2AR; + union un_rtc_rhrar RHRAR; + union un_rtc_bcnt2ar BCNT2AR; }; - char wk9[1]; + char wk9[1]; union { - union un_rtc_rwkar RWKAR; - union un_rtc_bcnt3ar BCNT3AR; + union un_rtc_rwkar RWKAR; + union un_rtc_bcnt3ar BCNT3AR; }; char wk10[1]; union { - union un_rtc_rdayar RDAYAR; - union un_rtc_bcnt0aer BCNT0AER; + union un_rtc_rdayar RDAYAR; + union un_rtc_bcnt0aer BCNT0AER; }; char wk11[1]; union { - union un_rtc_rmonar RMONAR; - union un_rtc_bcnt1aer BCNT1AER; + union un_rtc_rmonar RMONAR; + union un_rtc_bcnt1aer BCNT1AER; }; - char wk12[1]; + char wk12[1]; union { - union un_rtc_ryrar RYRAR; - union un_rtc_bcnt2aer BCNT2AER; + union un_rtc_ryrar RYRAR; + union un_rtc_bcnt2aer BCNT2AER; }; union { - union un_rtc_ryraren RYRAREN; - union un_rtc_bcnt3aer BCNT3AER; + union un_rtc_ryraren RYRAREN; + union un_rtc_bcnt3aer BCNT3AER; }; - char wk13[3]; + char wk13[3]; union un_rtc_rcr1 RCR1; char wk14[1]; union un_rtc_rcr2 RCR2; char wk15[1]; - union un_rcr3 RCR3; + union un_rtc_rcr3 RCR3; char wk16[1]; union un_rtc_rcr4 RCR4; char wk17[1]; @@ -17759,7 +36157,7 @@ typedef struct st_rtc union un_rtc_rfrl RFRL; union un_rtc_radj RADJ; char wk18[17]; - union un_rtc_rfrh RTCCR0; + union un_rtc_rtccr0 RTCCR0; char wk19[1]; union un_rtc_rtccr1 RTCCR1; char wk20[1]; @@ -17770,7 +36168,7 @@ typedef struct st_rtc union un_rtc_rseccp0 RSECCP0; union un_rtc_bcnt0cp0 BCNT0PC0; }; - char wk22[1]; + char wk22[1]; union { union un_rtc_rmincp0 RMINCP0; @@ -17788,7 +36186,7 @@ typedef struct st_rtc union un_rtc_rdaycp0 RDAYCP0; union un_rtc_bcnt3cp0 BCNT3CP0; }; - char wk25[1]; + char wk25[1]; union un_rtc_rmoncp0 RMONCP0; char wk26[5]; union @@ -17796,13 +36194,13 @@ typedef struct st_rtc union un_rtc_rseccp1 RSECCP1; union un_rtc_bcnt0cp1 BCNT0CP1; }; - char wk27[1]; + char wk27[1]; union { union un_rtc_rmincp1 RMINCP1; union un_rtc_bcnt1cp1 BCNT1CP1; }; - char wk28[1]; + char wk28[1]; union { union un_rtc_rhrcp1 RHRCP1; @@ -17825,22 +36223,22 @@ typedef struct st_rtc char wk32[1]; union { - union un_rtc_rmincp2 RMINCP2; - union un_rtc_bcnt1cp2 BCNT1CP2; + union un_rtc_rmincp2 RMINCP2; + union un_rtc_bcnt1cp2 BCNT1CP2; }; char wk33[1]; union { - union un_rtc_rhrcp2 RHRCP2; - union un_rtc_bcnt2cp2 BCNT2CP2; + union un_rtc_rhrcp2 RHRCP2; + union un_rtc_bcnt2cp2 BCNT2CP2; }; char wk34[3]; union { - union un_rtc_rdaycp2 RDAYCP2; - union un_rtc_bcnt3cp2 BCNT3CP2; + union un_rtc_rdaycp2 RDAYCP2; + union un_rtc_bcnt3cp2 BCNT3CP2; }; - char wk35[1]; + char wk35[1]; union un_rtc_rmoncp2 RMONCP2; } st_rtc_t; @@ -17867,81 +36265,81 @@ typedef struct st_sci0 typedef struct st_system { - union un_mdmonr MDMONR; + union un_system_mdmonr MDMONR; char wk0[4]; - union un_syscr0 SYSCR0; - union un_syscr1 SYSCR1; + union un_system_syscr0 SYSCR0; + union un_system_syscr1 SYSCR1; char wk1[2]; - union un_sbycr SBYCR; + union un_system_sbycr SBYCR; char wk2[2]; - union un_mstpcra MSTPCRA; - union un_mstpcrb MSTPCRB; - union un_mstpcrc MSTPCRC; - union un_mstpcrd MSTPCRD; - union un_sckcr SCKCR; - union un_sckcr2 SCKCR2; - union un_sckcr3 SCKCR3; - union un_pllcr PLLCR; - union un_pllcr2 PLLCR2; + union un_system_mstpcra MSTPCRA; + union un_system_mstpcrb MSTPCRB; + union un_system_mstpcrc MSTPCRC; + union un_system_mstpcrd MSTPCRD; + union un_system_sckcr SCKCR; + union un_system_sckcr2 SCKCR2; + union un_system_sckcr3 SCKCR3; + union un_system_pllcr PLLCR; + union un_system_pllcr2 PLLCR2; char wk3[5]; - union un_bckcr BCKCR; + union un_system_bckcr BCKCR; char wk4[1]; - union un_mosccr MOSCCR; - union un_sosccr SOSCCR; - union un_lococr LOCOCR; - union un_ilococr ILOCOCR; - union un_hococr HOCOCR; - union un_hococr2 HOCOCR2; + union un_system_mosccr MOSCCR; + union un_system_sosccr SOSCCR; + union un_system_lococr LOCOCR; + union un_system_ilococr ILOCOCR; + union un_system_hococr HOCOCR; + union un_system_hococr2 HOCOCR2; char wk5[4]; - union un_oscovfsr OSCOVFSR; + union un_system_oscovfsr OSCOVFSR; char wk6[3]; - union un_ostdcr OSTDCR; - union un_ostdsr OSTDSR; + union un_system_ostdcr OSTDCR; + union un_system_ostdsr OSTDSR; char wk7[94]; - union un_opccr OPCCR; - union un_rstckcr RSTCKCR; - union un_moscwtcr MOSCWTCR; - union un_soscwtcr SOSCWTCR; + union un_system_opccr OPCCR; + union un_system_rstckcr RSTCKCR; + union un_system_moscwtcr MOSCWTCR; + union un_system_soscwtcr SOSCWTCR; char wk8[28]; - union un_rstsr2 RSTSR2; + union un_system_rstsr2 RSTSR2; char wk9[1]; unsigned short SWRR; char wk10[28]; - union un_lvd1cr1 LVD1CR1; - union un_lvd1sr LVD1SR; - union un_lvd2cr1 LVD2CR1; - union un_lvd2sr LVD2SR; + union un_system_lvd1cr1 LVD1CR1; + union un_system_lvd1sr LVD1SR; + union un_system_lvd2cr1 LVD2CR1; + union un_system_lvd2sr LVD2SR; char wk11[794]; - union un_prcr PRCR; + union un_system_prcr PRCR; char wk12[3100]; - union un_romwt ROMWT; + union un_system_romwt ROMWT; char wk13[45667]; - union un_dpsbycr DPSBYCR; + union un_system_dpsbycr DPSBYCR; char wk14[1]; - union un_dpsier0 DPSIER0; - union un_dpsier1 DPSIER1; - union un_dpsier2 DPSIER2; - union un_dpsier3 DPSIER3; - union un_dpsifr0 DPSIFR0; - union un_dpsifr1 DPSIFR1; - union un_dpsifr2 DPSIFR2; - union un_dpsifr3 DPSIFR3; - union un_dpsiegr0 DPSIEGR0; - union un_dpsiegr1 DPSIEGR1; - union un_dpsiegr2 DPSIEGR2; - union un_dpsiegr3 DPSIEGR3; + union un_system_dpsier0 DPSIER0; + union un_system_dpsier1 DPSIER1; + union un_system_dpsier2 DPSIER2; + union un_system_dpsier3 DPSIER3; + union un_system_dpsifr0 DPSIFR0; + union un_system_dpsifr1 DPSIFR1; + union un_system_dpsifr2 DPSIFR2; + union un_system_dpsifr3 DPSIFR3; + union un_system_dpsiegr0 DPSIEGR0; + union un_system_dpsiegr1 DPSIEGR1; + union un_system_dpsiegr2 DPSIEGR2; + union un_system_dpsiegr3 DPSIEGR3; char wk15[2]; - union un_rstsr0 RSTSR0; - union un_rstsr1 RSTSR1; + union un_system_rstsr0 RSTSR0; + union un_system_rstsr1 RSTSR1; char wk16[1]; - union un_mofcr MOFCR; - union un_hocopcr HOCOPCR; + union un_system_mofcr MOFCR; + union un_system_hocopcr HOCOPCR; char wk17[2]; - union un_lvcmpcr LVCMPCR; - union un_lvdlvlr LVDLVLR; + union un_system_lvcmpcr LVCMPCR; + union un_system_lvdlvlr LVDLVLR; char wk18[1]; - union un_lvd1cr0 LVD1CR0; - union un_lvd2cr0 LVD2CR0; + union un_system_lvd1cr0 LVD1CR0; + union un_system_lvd2cr0 LVD2CR0; char wk19[4]; unsigned char DPSBKR[32]; } st_system_t; @@ -17953,10 +36351,10 @@ typedef struct st_sci10 union un_sci10_scr SCR; unsigned char TDR; union - { - union un_sci10_ssr SSR; - union un_sci10_ssrfifo SSRFIFO; - }; + { + union un_sci10_ssr SSR; + union un_sci10_ssrfifo SSRFIFO; + }; unsigned char RDR; union un_sci10_scmr SCMR; union un_sci10_semr SEMR; @@ -17967,15 +36365,15 @@ typedef struct st_sci10 union un_sci10_sisr SISR; union un_sci10_spmr SPMR; union - { - union un_sci10_tdrhl TDRHL; - union un_sci10_ftdr_bit_byte FTDR; - }; + { + union un_sci10_tdrhl TDRHL; + union un_sci10_ftdr_bit_byte FTDR; + }; union - { - union un_sci10_rdrhl_byte RDRHL; - union un_sci10_frdr_bit_byte FRDR; - }; + { + union un_sci10_rdrhl_byte RDRHL; + union un_sci10_frdr_bit_byte FRDR; + }; unsigned char MDDR; union un_sci10_dccr DCCR; union un_sci10_fcr FCR; @@ -18004,7 +36402,7 @@ typedef struct st_sci12 union un_sci12_tdrhl TDRHL; union un_sci12_rdrhl RDRHL; unsigned char MDDR; - char wk0[13]; + char wk0[13]; union un_sci12_esmer ESMER; union un_sci12_ctr0 CTR0; union un_sci12_ctr1 CTR1; @@ -18030,11 +36428,11 @@ typedef struct st_sci12 typedef struct st_cmtw { union un_cmtw_cmwstr CMWSTR; - char wk0[2]; + char wk0[2]; union un_cmtw_cmwcr CMWCR; - char wk1[2]; + char wk1[2]; union un_cmtw_cmwior CMWIOR; - char wk2[6]; + char wk2[6]; unsigned long CMWCNT; unsigned long CMWCOR; unsigned long CMWICR0; @@ -18043,7 +36441,1660 @@ typedef struct st_cmtw unsigned long CMWOCR1; } st_cmtw_t; +typedef struct st_temps +{ + union un_temps_tscr TSCR; +} st_temps_t; + +typedef struct st_tmr0 +{ + union un_tmr0_tcr TCR; + char wk0[1]; + union un_tmr0_tcsr TCSR; + char wk1[1]; + unsigned char TCORA; + char wk2[1]; + unsigned char TCORB; + char wk3[1]; + unsigned char TCNT; + char wk4[1]; + union un_tmr0_tccr TCCR; + char wk5[1]; + union un_tmr0_tcstr TCSTR; +} st_tmr0_t; + +typedef struct st_tmr1 +{ + union un_tmr1_tcr TCR; + char wk0[1]; + union un_tmr1_tcsr TCSR; + char wk1[1]; + unsigned char TCORA; + char wk2[1]; + unsigned char TCORB; + char wk3[1]; + unsigned char TCNT; + char wk4[1]; + union un_tmr1_tccr TCCR; + char wk5[1]; + union un_tmr1_tcstr TCSTR; +} st_tmr1_t; + +typedef struct st_tmr01 +{ + unsigned short TCORA; + unsigned short TCORB; + unsigned short TCNT; + unsigned short TCCR; +} st_tmr01_t; + +typedef struct st_tpu0 +{ + union un_tpu0_nfcr NFCR; + char wk0[7]; + union un_tpu0_tcr TCR; + union un_tpu0_tmdr TMDR; + union un_tpu0_tiorh TIORH; + union un_tpu0_tiorl TIORL; + union un_tpu0_tier TIER; + union un_tpu0_tsr TSR; + unsigned short TCNT; + unsigned short TGRA; + unsigned short TGRB; + unsigned short TGRC; + unsigned short TGRD; +} st_tpu0_t; + +typedef struct st_tpu1 +{ + char wk0[1]; + union un_tpu1_nfcr NFCR; + char wk1[22]; + union un_tpu1_tcr TCR; + union un_tpu1_tmdr TMDR; + union un_tpu1_tior TIOR; + char wk2[1]; + union un_tpu1_tier TIER; + union un_tpu1_tsr TSR; + unsigned short TCNT; + unsigned short TGRA; + unsigned short TGRB; +} st_tpu1_t; + +typedef struct st_tpu2 +{ + union un_tpu2_nfcr NFCR; + char wk0[37]; + union un_tpu2_tcr TCR; + union un_tpu2_tmdr TMDR; + union un_tpu2_tior TIOR; + char wk1[1]; + union un_tpu2_tier TIER; + union un_tpu2_tsr TSR; + unsigned short TCNT; + unsigned short TGRA; + unsigned short TGRB; +} st_tpu2_t; + +typedef struct st_tpu3 +{ + char wk0[1]; + union un_tpu3_nfcr NFCR; + char wk1[52]; + union un_tpu3_tcr TCR; + union un_tpu3_tmdr TMDR; + union un_tpu3_tiorh TIORH; + union un_tpu3_tiorl TIORL; + union un_tpu3_tier TIER; + union un_tpu3_tsr TSR; + unsigned short TCNT; + unsigned short TGRA; + unsigned short TGRB; + unsigned short TGRC; + unsigned short TGRD; +} st_tpu3_t; + +typedef struct st_tpu4 +{ + union un_tpu4_nfcr NFCR; + char wk0[67]; + union un_tpu4_tcr TCR; + union un_tpu4_tmdr TMDR; + union un_tpu4_tior TIOR; + char wk1[1]; + union un_tpu4_tier TIER; + union un_tpu4_tsr TSR; + unsigned short TCNT; + unsigned short TGRA; + unsigned short TGRB; +} st_tpu4_t; + +typedef struct st_tpu5 +{ + char wk0[1]; + union un_tpu5_nfcr NFCR; + char wk1[82]; + union un_tpu5_tcr TCR; + union un_tpu5_tmdr TMDR; + union un_tpu5_tior TIOR; + char wk2[1]; + union un_tpu5_tier TIER; + union un_tpu5_tsr TSR; + unsigned short TCNT; + unsigned short TGRA; + unsigned short TGRB; +} st_tpu5_t; + +typedef struct st_tpua +{ + union un_tpua_tstr TSTR; + union un_tpua_tsyr TSYR; +} st_tpua_t; + +typedef struct st_usb +{ + union un_usb_dpusr0r DPUSR0R; + union un_usb_dpusr1r DPUSR1R; +} st_usb_t; + +typedef struct st_usb0 +{ + union un_usb0_syscfg SYSCFG; + char wk0[2]; + union un_usb0_syssts0 SYSSTS0; + char wk1[2]; + union un_usb0_dvstctr0 DVSTCTR0; + char wk2[10]; + union un_usb0_cfifo CFIFO; + char wk3[2]; + union un_usb0_d0fifo D0FIFO; + char wk4[2]; + union un_usb0_d1fifo D1FIFO; + char wk5[2]; + union un_usb0_cfifosel CFIFOSEL; + union un_usb0_cfifoctr CFIFOCTR; + char wk6[4]; + union un_usb0_d0fifosel D0FIFOSEL; + union un_usb0_d0fifoctr D0FIFOCTR; + union un_usb0_d1fifosel D1FIFOSEL; + union un_usb0_d1fifoctr D1FIFOCTR; + union un_usb0_intenb0 INTENB0; + union un_usb0_intenb1 INTENB1; + char wk7[2]; + union un_usb0_brdyenb BRDYENB; + union un_usb0_nrdyenb NRDYENB; + union un_usb0_bempenb BEMPENB; + union un_usb0_sofcfg SOFCFG; + char wk8[2]; + union un_usb0_intsts0 INTSTS0; + union un_usb0_intsts1 INTSTS1; + char wk9[2]; + union un_usb0_brdysts BRDYSTS; + union un_usb0_nrdysts NRDYSTS; + union un_usb0_bempsts BEMPSTS; + union un_usb0_frmnum FRMNUM; + union un_usb0_dvchgr DVCHGR; + union un_usb0_usbaddr USBADDR; + char wk10[2]; + union un_usb0_usbreq USBREQ; + unsigned short USBVAL; + unsigned short USBINDX; + unsigned short USBLENG; + union un_usb0_dcpcfg DCPCFG; + union un_usb0_dcpmaxp DCPMAXP; + union un_usb0_dcpctr DCPCTR; + char wk11[2]; + union un_usb0_pipesel PIPESEL; + char wk12[2]; + union un_usb0_pipecfg PIPECFG; + char wk13[2]; + union un_usb0_pipemaxp PIPEMAXP; + union un_usb0_pipeperi PIPEPERI; + union un_usb0_pipe1ctr PIPE1CTR; + union un_usb0_pipe2ctr PIPE2CTR; + union un_usb0_pipe3ctr PIPE3CTR; + union un_usb0_pipe4ctr PIPE4CTR; + union un_usb0_pipe5ctr PIPE5CTR; + union un_usb0_pipe6ctr PIPE6CTR; + union un_usb0_pipe7ctr PIPE7CTR; + union un_usb0_pipe8ctr PIPE8CTR; + union un_usb0_pipe9ctr PIPE9CTR; + char wk14[14]; + union un_usb0_pipe1tre PIPE1TRE; + unsigned short PIPE1TRN; + union un_usb0_pipe2tre PIPE2TRE; + unsigned short PIPE2TRN; + union un_usb0_pipe3tre PIPE3TRE; + unsigned short PIPE3TRN; + union un_usb0_pipe4tre PIPE4TRE; + unsigned short PIPE4TRN; + union un_usb0_pipe5tre PIPE5TRE; + unsigned short PIPE5TRN; + char wk15[44]; + union un_usb0_devadd0 DEVADD0; + union un_usb0_devadd1 DEVADD1; + union un_usb0_devadd2 DEVADD2; + union un_usb0_devadd3 DEVADD3; + union un_usb0_devadd4 DEVADD4; + union un_usb0_devadd5 DEVADD5; + char wk16[20]; + union un_usb0_physlew PHYSLEW; +} st_usb0_t; + +typedef struct st_wdt +{ + unsigned char WDTRR; + char wk0[1]; + union un_wdt_wdtcr WDTCR; + union un_wdt_wdtsr WDTSR; + union un_wdt_wdtrcr WDTRCR; +} st_wdt_t; + +typedef struct st_flashconst +{ + unsigned long UIDR0; + unsigned long UIDR1; + unsigned long UIDR2; + unsigned long UIDR3; +} st_flashconst_t; + +typedef struct st_tempsconst +{ + unsigned long TSCDR; +} st_tempsconst_t; + +typedef struct st_crc +{ + union un_crc_crccr CRCCR; + char wk0[3]; + union un_crc_crcdir CRCDIR; + union un_crc_crcdor CRCDOR; +} st_crc_t; + +typedef struct st_da +{ + unsigned short DADR0; + unsigned short DADR1; + union un_da_dacr DACR; + union un_da_dadpr DADPR; + union un_da_daadscr DAADSCR; + char wk0[1]; + union un_da_daampcr DAAMPCR; + char wk1[19]; + union un_da_daaswcr DAASWCR; + char wk2[17763]; + union un_da_daadusr DAADUSR; +} st_da_t; + +typedef struct st_doc +{ + union un_doc_docr DOCR; + char wk0[1]; + unsigned short DODIR; + unsigned short DODSR; +} st_doc_t; + +typedef struct st_mtu +{ + union un_mtu_toera TOERA; + char wk0[2]; + union un_mtu_tgcra TGCRA; + union un_mtu_tocr1a TOCR1A; + union un_mtu_tocr2a TOCR2A; + char wk1[4]; + unsigned short TCDRA; + unsigned short TDDRA; + char wk2[8]; + unsigned short TCNTSA; + unsigned short TCBRA; + char wk3[12]; + union un_mtu_titcr1a TITCR1A; + union un_mtu_titcnt1a TITCNT1A; + union un_mtu_tbtera TBTERA; + char wk4[1]; + union un_mtu_tdera TDERA; + char wk5[1]; + union un_mtu_tolbra TOLBRA; + char wk6[3]; + union un_mtu_titmra TITMRA; + union un_mtu_titcr2a TITCR2A; + union un_mtu_titcnt2a TITCNT2A; + char wk7[35]; + union un_mtu_twcra TWCRA; + char wk8[15]; + union un_mtu_tmdr2a TMDR2A; + char wk9[15]; + union un_mtu_tstra TSTRA; + union un_mtu_tsyra TSYRA; + union un_mtu_tcsystr TCSYSTR; + char wk10[1]; + union un_mtu_trwera TRWERA; + char wk11[1925]; + union un_mtu_toerb TOERB; + char wk12[3]; + union un_mtu_tocr1b TOCR1B; + union un_mtu_tocr2b TOCR2B; + char wk13[4]; + unsigned short TCDRB; + unsigned short TDDRB; + char wk14[8]; + unsigned short TCNTSB; + unsigned short TCBRB; + char wk15[12]; + union un_mtu_titcr1b TITCR1B; + union un_mtu_titcnt1b TITCNT1B; + union un_mtu_tbterb TBTERB; + char wk16[1]; + union un_mtu_tderb TDERB; + char wk17[1]; + union un_mtu_tolbrb TOLBRB; + char wk18[3]; + union un_mtu_titmrb TITMRB; + union un_mtu_titcr2b TITCR2B; + union un_mtu_titcnt2b TITCNT2B; + char wk19[35]; + union un_mtu_twcrb TWCRB; + char wk20[15]; + union un_mtu_twdr2b TMDR2B; + char wk21[15]; + union un_mtu_tstrb TSTRB; + union un_mtu_tsyrb TSYRB; + char wk22[2]; + union un_mtu_trwerb TRWERB; +} st_mtu_t; + +typedef struct st_mtu0 +{ + union un_mtu0_nfcro NFCRO; + char wk0[8]; + union un_mtu0_nfcrc NFCRC; + char wk1[102]; + union un_mtu0_tcr TCR; + union un_mtu0_tmdr1 TMDR1; + union un_mtu0_tiorh TIORH; + union un_mtu0_tiorl TIOR1; + union un_mtu0_tier TIER; + char wk2[1]; + unsigned short TCNT; + unsigned short TGRA; + unsigned short TGRB; + unsigned short TGRC; + unsigned short TGRD; + char wk3[16]; + unsigned short TGRE; + unsigned short TGRF; + union un_mtu0_tier2 TIER2; + char wk4[1]; + union un_mtu0_tbtm TBTM; + char wk5[1]; + union un_mtu0_tcr2 TCR2; +} st_mtu0_t; + +typedef struct st_mtu1 +{ + char wk0[1]; + union un_mtu1_nfcr1 NFCR1; + char wk1[238]; + union un_mtu1_tcr TCR; + union un_mtu1_tmdr1 TMDR1; + union un_mtu1_tior TIOR; + char wk2[1]; + union un_mtu1_tier TIER; + union un_mtu1_tsr TSR; + unsigned short TCNT; + unsigned short TGRA; + unsigned short TGRB; + char wk3[4]; + union un_mtu1_ticcr TICCR; + union un_mtu1_tmdr3 TMDR3; + char wk4[2]; + union un_mtu1_tcr2 TCR2; + char wk5[11]; + unsigned long TCNTLW; + unsigned long TGRALW; + unsigned long TGRBLW; +} st_mtu1_t; + +typedef struct st_mtu2 +{ + union un_mtu2_nfcr2 NFCR2; + char wk0[365]; + union un_mtu2_tcr TCR; + union un_mtu2_tmdr1 TMDR1; + union un_mtu2_tior TIOR; + char wk1[1]; + union un_mtu2_tier TIER; + union un_mtu2_tsr TSR; + unsigned short TCNT; + unsigned short TGRA; + unsigned short TGRB; + union un_mtu2_tcr2 TCR2; +} st_mtu2_t; + +typedef struct st_mtu3 +{ + union un_mtu3_tcr TCR; + char wk0[1]; + union un_mtu3_tmdr1 TMDR1; + char wk1[1]; + union un_mtu3_tiorh TIORH; + union un_mtu3_tiorl TIORL; + char wk2[2]; + union un_mtu3_tier TIER; + char wk3[7]; + unsigned short TCNT; + char wk4[6]; + unsigned short TGRA; + unsigned short TGRB; + char wk5[8]; + unsigned short TGRC; + unsigned short TGRD; + char wk6[4]; + union un_mtu3_tsr TSR; + char wk7[11]; + union un_mtu3_tbtm TBTM; + char wk8[19]; + union un_mtu3_tcr2 TCR2; + char wk9[37]; + unsigned short TGRE; + char wk10[31]; + union un_mtu3_nfcr3 NFCR3; +} st_mtu3_t; + +typedef struct st_iwdt +{ + unsigned char IWDTRR; + char wk0[1]; + union un_iwdt_iwdtcr IWDTCR; + union un_iwdt_iwdtsr IWDTSR; + union un_iwdt_iwdtrcr IWDTRCR; + char wk1[1]; + union un_iwdt_iwdtcstpr IWDTCSTPR; +} st_iwdt_t; + +typedef struct st_mpu +{ + union un_mpu_rspage0 RSPAGE0; + union un_mpu_repage0 REPAGE0; + union un_mpu_rspage1 RSPAGE1; + union un_mpu_repage1 REPAGE1; + union un_mpu_rspage2 RSPAGE2; + union un_mpu_repage2 REPAGE2; + union un_mpu_rspage3 RSPAGE3; + union un_mpu_repage3 REPAGE3; + union un_mpu_rspage4 RSPAGE4; + union un_mpu_repage4 REPAGE4; + union un_mpu_rspage5 RSPAGE5; + union un_mpu_repage5 REPAGE5; + union un_mpu_rspage6 RSPAGE6; + union un_mpu_repage6 REPAGE6; + union un_mpu_rspage7 RSPAGE7; + union un_mpu_repage7 REPAGE7; + char wk0[192]; + union un_mpu_mpen MPEN; + union un_mpu_mpbac MPBAC; + union un_mpu_mpeclr MPECLR; + union un_mpu_mpests MPESTS; + char wk1[4]; + union un_mpu_mpdea MPDEA; + char wk2[8]; + union un_mpu_mpsa MPSA; + union un_mpu_mpops MPOPS; + union un_mpu_mpopi MPOPI; + union un_mpu_mhiti MHITI; + union un_mpu_mhitd MHITD; +} st_mpu_t; + +typedef struct st_mmcif +{ + union un_mmcif_cecmdset CECMDSET; + char wk0[4]; + union un_mmcif_cearg CEARG; + union un_mmcif_ceargcmd12 CEARGCMD12; + union un_mmcif_cecmdctrl CECMDCTR1; + union un_mmcif_ceblockset CEBLOCKSET; + union un_mmcif_ceclkctrl CECLKCTRL; + union un_mmcif_cebufacc CEBUFACC; + unsigned long CERESP3; + unsigned long CERESP2; + unsigned long CERESP1; + unsigned long CERESP0; + union un_mmcif_cerespcmd12 CERESPCMD12; + union un_mmcif_cedata CEDATA; + char wk1[4]; + union un_mmcif_ceboot CEBOOT; + union un_mmcif_ceint CEINT; + union un_mmcif_ceinten CEINTEN; + union un_mmcif_cehoststs1 CEHOSTSTS1; + union un_mmcif_cehoststs2 CEHOSTSTS2; + char wk2[32]; + union un_mmcif_cedetect CEDETECT; + union un_mmcif_ceaddmode CEADDMODE; + char wk3[4]; + union un_mmcif_ceversion CEVERSION; +} st_mmcif_t; + +typedef struct st_glcdc +{ + union un_glcdc_gr1clut0 GR1CLUT0[256]; + union un_glcdc_gr1clut1 GR1CLUT1[256]; + union un_glcdc_gr2clut0 GR2CLUT0[256]; + union un_glcdc_gr2clut1 GR2CLUT1[256]; + union un_glcdc_bgen BGEN; + union un_glcdc_bgperi BGPERI; + union un_glcdc_bgsync BGSYNC; + union un_glcdc_bgvsize BGVSIZE; + union un_glcdc_bghsize BGHSIZE; + union un_glcdc_bgcolor BGCOLOR; + union un_glcdc_bgmon BGMON; + char wk0[228]; + union un_glcdc_gr1ven GR1VEN; + union un_glcdc_grlflmrd GR1FLMRD; + char wk1[4]; + unsigned long GR1FLM2; + union un_glcdc_gr1flm3 GR1FLM3; + char wk2[4]; + union un_glcdc_gr1flm5 GR1FLM5; + union un_glcdc_gr1flm6 GR1FLM6; + union un_glcdc_gr1ab1 GR1AB1; + union un_glcdc_gr1ab2 GR1AB2; + union un_glcdc_gr1ab3 GR1AB3; + union un_glcdc_gr1ab4 GR1AB4; + union un_glcdc_gr1ab5 GR1AB5; + union un_glcdc_gr1ab6 GR1AB6; + union un_glcdc_gr1ab7 GR1AB7; + union un_glcdc_gr1ab8 GR1AB8; + union un_glcdc_gr1ab9 GR1AB9; + char wk3[8]; + union un_glcdc_gr1base GRBASE; + union un_glcdc_gr1clutint GR1CLUTINT; + union un_glcdc_gr1mon GR1MON; + char wk4[168]; + union un_glcdc_gr2ven GR2VEN; + union un_glcdc_gr2flmrd GR2FLMRD; + char wk5[4]; + unsigned long GR2FLM2; + union un_glcdc_gr2flm3 GR2FLM3; + char wk6[4]; + union un_glcdc_gr2flm5 GR2FLM5; + union un_glcdc_gr2flm6 GR2FLM6; + union un_glcdc_gr2ab1 GR2AB1; + union un_glcdc_gr2ab2 GR2AB2; + union un_glcdc_gr2ab3 GR2AB3; + union un_glcdc_gr2ab4 GR2AB4; + union un_glcdc_gr2ab5 GR2AB5; + union un_glcdc_gr2ab6 GR2AB6; + union un_glcdc_gr2ab7 GR2AB7; + union un_glcdc_gr2ab8 GR2AB8; + union un_glcdc_gr2ab9 GR2AB9; + char wk7[8]; + union un_glcdc_gr2base GR2BASE; + union un_glcdc_gr2clutint GR2CLUTINT; + union un_glcdc_gr2mon GR2MON; + char wk8[168]; + union un_glcdc_gamgven GAMGVEN; + union un_glcdc_gamsw GAMSW; + union un_glcdc_gamglut1 GAMGLUT1; + union un_glcdc_gamglut2 GAMGLUT2; + union un_glcdc_gamglut3 GAMGLUT3; + union un_glcdc_gamglut4 GAMGLUT4; + union un_glcdc_gamglut5 GAMGLUT5; + union un_glcdc_gamglut6 GAMGLUT6; + union un_glcdc_gamglut7 GAMGLUT7; + union un_glcdc_gamglut8 GAMGLUT8; + union un_glcdc_gamgarea1 GAMGAREA1; + union un_glcdc_gamgarea2 GAMGAREA2; + union un_glcdc_gamgarea3 GAMGAREA3; + union un_glcdc_gamgarea4 GAMGAREA4; + union un_glcdc_gamgarea5 GAMGAREA5; + char wk9[4]; + union un_glcdc_gambven GAMBVEN; + char wk10[4]; + union un_glcdc_gamblut1 GAMBLUT1; + union un_glcdc_gamblut2 GAMBLUT2; + union un_glcdc_gamblut3 GAMBLUT3; + union un_glcdc_gamblut4 GAMBLUT4; + union un_glcdc_gamblut5 GAMBLUT5; + union un_glcdc_gamblut6 GAMBLUT6; + union un_glcdc_gamblut7 GAMBLUT7; + union un_glcdc_gamblut8 GAMBLUT8; + union un_glcdc_gambarea1 GAMBAREA1; + union un_glcdc_gambarea2 GAMBAREA2; + union un_glcdc_gambarea3 GAMBAREA3; + union un_glcdc_gambarea4 GAMBAREA4; + union un_glcdc_gambarea5 GAMBAREA5; + char wk11[4]; + union un_glcdc_gamrven GAMRVEN; + char wk12[4]; + union un_glcdc_gamrlut1 GAMRLUT1; + union un_glcdc_gamrlut2 GAMRLUT2; + union un_glcdc_gamrlut3 GAMRLUT3; + union un_glcdc_gamrlut4 GAMRLUT4; + union un_glcdc_gamrlut5 GAMRLUT5; + union un_glcdc_gamrlut6 GAMRLUT6; + union un_glcdc_gamrlut7 GAMRLUT7; + union un_glcdc_gamrlut8 GAMRLUT8; + union un_glcdc_gamrarea1 GAMRAREA1; + union un_glcdc_gamrarea2 GAMRAREA2; + union un_glcdc_gamrarea3 GAMRAREA3; + union un_glcdc_gamrarea4 GAMRAREA4; + union un_glcdc_gamrarea5 GAMRAREA5; + char wk13[4]; + union un_glcdc_outven OUTVEN; + union un_glcdc_outset OUTSET; + union un_glcdc_bright1 BRIGHT1; + union un_glcdc_bright2 BRIGHT2; + union un_glcdc_contrast CONTRAST; + union un_glcdc_paneldtha PANELDTHA; + char wk14[12]; + union un_glcdc_clkphase CLKPHASE; + char wk15[28]; + union un_glcdc_tcontim TCONTIM; + union un_glcdc_tconstva1 TCONSTVA1; + union un_glcdc_tconstvat2 TCONSTVAT2; + union un_glcdc_tconstvb1 TCONSTVB1; + union un_glcdc_tconstvb2 TCONSTVB2; + union un_glcdc_tconstha1 TCONSTHA1; + union un_glcdc_tconstha2 TCONSTHA2; + union un_glcdc_tconsthb1 TCONSTHB1; + union un_glcdc_tconsthb2 TCONSTHB2; + union un_glcdc_tconde TCONDE; + char wk16[20]; + union un_glcdc_dtcten DTCTEN; + union un_glcdc_inten INTEN; + union un_glcdc_stclr STCLR; + union un_glcdc_stmon STMON; + union un_glcdc_panelclk PANELCLK; +} st_glcdc_t; + +typedef struct st_mtu4 +{ + char wk0[1]; + union un_mtu4_tcr TCR; + char wk1[1]; + union un_mtu4_tmdr1 TMDR1; + char wk2[2]; + union un_mtu4_tiorh TIORH; + union un_mtu4_tiorl TIORL; + char wk3[1]; + union un_mtu4_tier TIER; + char wk4[8]; + unsigned short TCNT; + char wk5[8]; + unsigned short TGRA; + unsigned short TGRB; + char wk6[8]; + unsigned short TGRC; + unsigned short TGRD; + char wk7[1]; + union un_mtu4_tsr TSR; + char wk8[11]; + union un_mtu4_tbtm TBTM; + char wk9[6]; + union un_mtu4_tadcr TADCR; + char wk10[2]; + unsigned short TADCORA; + unsigned short TADCORB; + unsigned short TADCOBRA; + unsigned short TADCOBRB; + char wk11[1]; + union un_mtu4_tcr2 TCR2; + char wk12[38]; + unsigned short TGRE; + unsigned short TGRF; + char wk13[28]; + union un_mtu4_nfcr4 NFCR4; +} st_mtu4_t; + +typedef struct st_mtu5 +{ + char wk0[1]; + union un_mtu5_nfcr5 NFCR5; + char wk1[490]; + unsigned short TCNTU; + unsigned short TGRU; + union un_mtu5_tcru TCRU; + union un_mtu5_tcr2u TCR2U; + union un_mtu5_tioru TIORU; + char wk2[9]; + unsigned short TCNTV; + unsigned short TGRV; + union un_mtu5_tcrv TCRV; + union un_mtu5_tcr2v TCR2V; + union un_mtu5_tiorv TIORV; + char wk3[9]; + unsigned short TCNTW; + unsigned short TGRW; + union un_mtu5_tcrw TCRW; + union un_mtu5_tcr2w TCR2W; + union un_mtu5_tiorw TIORW; + char wk4[11]; + union un_mtu5_tier TIER; + char wk5[1]; + union un_mtu5_tstr TSTR; + char wk6[1]; + union un_mtu5_tcntcmpclr TCNTCMPCLR; +} st_mtu5_t; + +typedef struct st_smci0 +{ + union un_smcio_smr SMR; + unsigned char BRR; + union un_smcio_scr SCR; + unsigned char TDR; + union un_smcio_ssr SSR; + unsigned char RDR; + union un_smcio_smcr SMCR; +} st_smci0_t; + +typedef struct st_riic +{ + union un_riic_iccr1 ICCR1; + union un_riic_iccr2 ICCR2; + union un_riic_icmr1 ICMR1; + union un_riic_icmr2 ICMR2; + union un_riic_icmr3 ICMR3; + union un_riic_icfer ICFER; + union un_riic_icser ICSER; + union un_riic_icier ICIER; + union un_riic_icsr1 ICSR1; + union un_riic_icsr2 ICSR2; + union un_riic_sarl0 SARL0; + union un_riic_saru0 SARU0; + union un_riic_sarl1 SARL1; + union un_riic_saru1 SARU1; + union un_riic_sarl2 SARL2; + union un_riic_saru2 SARU2; + union un_riic_icbrl ICBRL; + union un_riic_icbrh ICBRH; + unsigned char ICDRT; + unsigned char ICDRR; +} st_riic_t; + +typedef struct st_rspi +{ + union un_rspi_spcr SPCR; + union un_rspi_sslp SSLP; + union un_rspi_sppcr SPPCR; + union un_rspi_spsr SPSR; + union un_rspi_spdr SPDR; + union un_rspi_spscr SPSCR; + union un_rspi_spssr SPSSR; + unsigned char SPBR; + union un_rspi_spdcr SPDCR; + union un_rspi_spckd SPCKD; + union un_rspi_sslnd SSLND; + union un_rspi_spnd SPND; + union un_rspi_spcr2 SPCR2; + union un_rspi_spcmd0 SPCMD0; + union un_rspi_spcmd1 SPCMD1; + union un_rspi_spcmd2 SPCMD2; + union un_rspi_spcmd3 SPCMD3; + union un_rspi_spcmd4 SPCMD4; + union un_rspi_spcmd5 SPCMD5; + union un_rspi_spcmd6 SPCMD6; + union un_rspi_spcmd7 SPCMD7; + union un_rspi_spdcr2 SPDCR2; +} st_rspi_t; + +typedef struct st_sdhi +{ + union un_sdhi_spcmd SPCMD; + char wk0[4]; + unsigned long SDARG; + char wk1[4]; + union un_sdhi_sdstop SDSTOP; + unsigned long SDBLKCNT; + unsigned long SDRSP10; + char wk2[4]; + unsigned long SDRSP32; + char wk3[4]; + unsigned long SDRSP54; + char wk4[4]; + unsigned long SDRSP76; + char wk5[4]; + union un_sdhi_sdsts1 SDSTS1; + union un_sdhi_sdsts2 SDSTS2; + union un_sdhi_sdimsk1 SDIMSK1; + union un_sdhi_sdimsk2 SDIMSK2; + union un_sdhi_sdclkcr SDCLKCR; + union un_sdhi_sdsize SDSIZE; + union un_sdhi_sdopt SDOPT; + char wk6[4]; + union un_sdhi_sdersts1 SDERSTS1; + union un_sdhi_sdersts2 SDERSTS2; + unsigned long SDBUFR; + char wk7[4]; + union un_sdhi_sdiomd SDIOMD; + union un_sdhi_sdiosts SDIOSTS; + union un_sdhi_sdioimsk SDIOIMSK; + char wk8[316]; + union un_sdhi_sddmaen SDDMAEN; + char wk9[12]; + union un_sdhi_sdrst SDRST; + union un_sdhi_sdver SDVER; + char wk10[24]; + union un_sdhi_sdswap SDSWAP; +} st_sdhi_t; + +typedef struct st_sdsi +{ + union un_sdsi_fn1accr FN1ACCR; + union un_sdsi_intencr1 INTENCR1; + union un_sdsi_intsr1 INTSR1; + union un_sdsi_sdcmdcr SDCMDCR; + union un_sdsi_sdcadd0r SDCADD0R; + union un_sdsi_sdcadd1r SDCADD1R; + union un_sdsi_sdcadd2r SDCADD2R; + union un_sdsi_sdsicr1 SDSICR1; + union un_sdsi_dmacr1 DMACR1; + union un_sdsi_blkcnt BLKCNT; + union un_sdsi_bytcnt BYTCNT; + union un_sdsi_dmatraddr DMATRADDR; + char wk0[236]; + union un_sdsi_sdsicr2 SDICR2; + union un_sdsi_sdsicr3 SDICR3; + union un_sdsi_intencr2 INTENCR2; + union un_sdsi_intsr2 INTSR2; + union un_sdsi_dmacr2 DMACR2; + char wk1[236]; + unsigned long CISDATAR[27]; + char wk2[4]; + union un_sdsi_fbr1 FBR1; + union un_sdsi_fbr2 FBR2; + union un_sdsi_fbr3 FBR3; + union un_sdsi_fbr4 FBR4; + union un_sdsi_fbr5 FBR5; + char wk3[1404]; + union un_sdsi_fn1datar1 FN1DATAR1[64]; + union un_sdsi_fn1datar2 FN1DATAR2[64]; + union un_sdsi_fn1datar3 FN1DATAR3[64]; + union un_sdsi_fn1intvecr FN1INTVECR; + union un_sdsi_fn1intclrr FN1INTCLRR; + char wk4[254]; + union un_sdsi_fn1datar5 FN1DATAR5[256]; +} st_sdsi_t; + +typedef struct st_mtu6 +{ + union un_mtu6_tcr TCR; + char wk0[1]; + union un_mtu6_tmdr1 TMDR1; + char wk1[1]; + union un_mtu6_tiorh TIORH; + union un_mtu6_tiorl TIORL; + char wk2[2]; + union un_mtu6_tier TIER; + char wk3[7]; + unsigned short TCNT; + char wk4[6]; + unsigned short TGRA; + unsigned short TGRB; + char wk5[8]; + unsigned short TGRC; + unsigned short TGRD; + char wk6[4]; + union un_mtu6_tsr TSR; + char wk7[11]; + union un_mtu6_tbtm TBTM; + char wk8[19]; + union un_mtu6_tcr2 TCR2; + char wk9[3]; + union un_mtu6_tsycr TSYCR; + char wk10[33]; + unsigned short TGRE; + char wk11[31]; +} st_mtu6_t; + +typedef struct st_mtu7 +{ + char wk0[1]; + union un_mtu7_tcr TCR; + char wk1[1]; + union un_mtu7_tmdr1 TMDR1; + char wk2[2]; + union un_mtu7_tiorh TIORH; + union un_mtu7_tiorl TIORL; + char wk3[1]; + union un_mtu7_tier TIER; + char wk4[8]; + unsigned short TCNT; + char wk5[8]; + unsigned short TGRA; + unsigned short TGRB; + char wk6[8]; + unsigned short TGRC; + unsigned short TGRD; + char wk7[1]; + union un_mtu7_tsr TSR; + char wk8[11]; + union un_mtu7_tbtm TBTM; + char wk9[6]; + union un_mtu7_tadcr TADCR; + char wk10[2]; + unsigned short TADCORA; + unsigned short TADCORB; + unsigned short TADCOBRA; + unsigned short TADCOBRB; + char wk11[1]; + union un_mtu7_tcr2 TCR2; + char wk12[38]; + unsigned short TGRE; + unsigned short TGRF; + char wk13[28]; + union un_mtu7_nfcr7 NFCR7; +} st_mtu7_t; + +typedef struct st_mtu8 +{ + union un_mtu8_nfcr8 NFCR8; + char wk0[871]; + union un_mtu8_tcr TCR; + union un_mtu8_tmdr1 TMDR1; + union un_mtu8_tiorh TIORH; + union un_mtu8_tiorl TIORL; + union un_mtu8_tier TIER; + char wk1[1]; + union un_mtu8_tcr2 TCR2; + char wk2[1]; + unsigned long TCNT; + unsigned long TGRA; + unsigned long TGRB; + unsigned long TGRC; + unsigned long TGRD; +} st_mtu8_t; + +typedef struct st_port6 +{ + union un_port6_pdr PDR; + char wk0[31]; + union un_port6_podr PODR; + char wk1[31]; + union un_port6_pidr PIDR; + char wk2[31]; + union un_port6_pmr PMR; + char wk3[37]; + union un_port6_ord0 ORD0; + union un_port6_ord1 ORD1; + char wk4[56]; + union un_port6_pcr PCR; +} st_port6_t; + +typedef struct st_dmac +{ + union un_dmac_dmast DMAST; + char wk0[3]; + union un_dmac_dmist DMIST; +} st_dmac_t; + +typedef struct st_dmac0 +{ + void *DMSAR; + void *DMDAR; + unsigned long DMCRA; + unsigned short DMCRB; + char wk0[2]; + union un_dmac0_dmtmd DMTMD; + char wk1[1]; + union un_dmac0_dmint DMINT; + union un_dmac0_dmamd DMAMD; + char wk2[2]; + unsigned long DMOFR; + union un_dmac0_dmcnt DMCNT; + union un_dmac0_dmreq DMREQ; + union un_dmac0_dmsts DMSTS; + union un_dmac0_dmcsl DMCSL; +} st_dmac0_t; + +typedef struct st_dmac1 +{ + void *DMSAR; + void *DMDAR; + unsigned long DMCRA; + unsigned short DMCRB; + char wk0[2]; + union un_dmac1_dmtmd DMTMD; + char wk1[1]; + union un_dmac1_dmint DMINT; + union un_dmac1_dmamd DMAMD; + char wk2[6]; + union un_dmac1_dmcnt DMCNT; + union un_dmac1_dmreq DMREQ; + union un_dmac1_dmsts DMSTS; + union un_dmac1_dmcsl DMCSL; +} st_dmac1_t; + +typedef struct st_drw2d +{ + union + { + union un_drw2d_control CONTROL; + union un_drw2d_status STATUS; + }; + union + { + union un_drw2d_control2 CONTROL2; + union un_drw2d_hwver HWVER; + }; + char wk0[8]; + unsigned long L1START; + unsigned long L2START; + unsigned long L3START; + unsigned long L4START; + unsigned long L5START; + unsigned long L6START; + unsigned long L1XADD; + unsigned long L2XADD; + unsigned long L3XADD; + unsigned long L4XADD; + unsigned long L5XADD; + unsigned long L6XADD; + unsigned long L1YADD; + unsigned long L2YADD; + unsigned long L3YADD; + unsigned long L4YADD; + unsigned long L5YADD; + unsigned long L6YADD; + unsigned long L1BAND; + unsigned long L2BAND; + char wk1[4]; + union un_drw2d_color1 COLOR1; + union un_drw2d_color2 COLOR2; + char wk2[8]; + unsigned long PATTERN; + union un_drw2d_size SIZE; + union un_drw2d_pitch PITCH; + unsigned long ORIGIN; + char wk3[12]; + unsigned long LUST; + unsigned long LUXADD; + unsigned long LUYADD; + unsigned long LVSTI; + unsigned long LVSTF; + unsigned long LVXADDI; + unsigned long LVYADDI; + union un_drw2d_lvyxaddf LVYXADDF; + char wk4[4]; + unsigned long TEXPITCH; + union un_drw2d_texmsk TEXMSK; + unsigned long TEXORG; + union un_drw2d_irqctl IRQCTL; + union un_drw2d_cachectl CACHECTL; + unsigned long DLISTST; + unsigned long PERFCNT1; + unsigned long PERFCNT2; + union un_drw2d_perftrg PERFTRG; + char wk5[4]; + unsigned long TEXCLADDR; + unsigned long TEXCLDATA; + unsigned long TEXCLOFST; + union un_drw2d_colkey COLKEY; +} st_drw2d_t; + +typedef struct st_dtc +{ + union un_dtc_dtccr DTCCR; + char wk0[3]; + void *DTCVBR; + union un_dtc_dtcadmod DTCADMOD; + char wk1[3]; + union un_dtc_dtcst DTCST; + char wk2[1]; + union un_dtc_dtcsts DTCSTS; + void *DTCIBR; + union un_dtc_dtcor DTCOR; + char wk3[1]; + union un_dtc_dtcsqe DTCSQE; + unsigned long DTCDISP; +} st_dtc_t; + +typedef struct st_edmac +{ + union un_edmac_edmr EMDR; + char wk0[4]; + union un_edmac_edtrr EDTRR; + char wk1[4]; + union un_edmac_edrrr EDRRR; + char wk2[4]; + void *TDLAR; + char wk3[4]; + void *RDLAR; + char wk4[4]; + union un_edmac_eesr EESR; + char wk5[4]; + union un_edmac_eesipr EESIPR; + char wk6[4]; + union un_edmac_trscer TRSCER; + char wk7[4]; + union un_edmac_rmfcr RMFCR; + char wk8[4]; + union un_edmac_tftr TFTR; + char wk9[4]; + union un_edmac_fdr FDR; + char wk10[4]; + union un_edmac_rmcr RMCR; + char wk11[8]; + union un_edmac_tfucr TFUCR; + union un_edmac_rfocr RFOCR; + union un_edmac_iosr IOSR; + union un_edmac_fcftr FCFTR; + char wk12[4]; + union un_edmac_rpadir RPADIR; + union un_edmac_trimd TRIMD; + char wk13[72]; + void *RBWAR; + void *RDFAR; + char wk14[4]; + void *TBRAR; + void *TDFAR; +} st_edmac_t; + +typedef struct st_elc +{ + union un_elc_elcr ELCR; + union un_elc_elsr0 ELSR0; + char wk0[2]; + union un_elc_elsr3 ELSR3; + union un_elc_elsr4 ELSR4; + char wk1[2]; + union un_elc_elsr7 ELSR7; + char wk2[2]; + union un_elc_elsr10 ELSR10; + union un_elc_elsr11 ELSR11; + union un_elc_elsr12 ELSR12; + union un_elc_elsr13 ELSR13; + char wk3[1]; + union un_elc_elsr15 ELSR15; + union un_elc_elsr16 ELSR16; + char wk4[1]; + union un_elc_elsr18 ELSR18; + union un_elc_elsr19 ELSR19; + union un_elc_elsr20 ELSR20; + union un_elc_elsr21 ELSR21; + union un_elc_elsr22 ELSR22; + union un_elc_elsr23 ELSR23; + union un_elc_elsr24 ELSR24; + union un_elc_elsr25 ELSR25; + union un_elc_elsr26 ELSR26; + union un_elc_elsr27 ELSR27; + union un_elc_elsr28 ELSR28; + char wk5[1]; + union un_elc_elopa ELOPA; + union un_elc_elopb ELOPB; + union un_elc_elopc ELOPC; + union un_elc_elopd ELOPD; + union un_elc_pgr1 PGR1; + union un_elc_pgr2 PGR2; + union un_elc_pgc1 PGC1; + union un_elc_pgc2 PGC2; + union un_elc_pdbf1 PDBF1; + union un_elc_pdbf2 PDBF2; + union un_elc_pel0 PEL0; + union un_elc_pel1 PEL1; + union un_elc_pel2 PEL2; + union un_elc_pel3 PEL3; + union un_elc_elsegr ELSEGR; + char wk6[3]; + union un_elc_elsr33 ELSR33; + char wk7[1]; + union un_elc_elsr35 ELSR35; + union un_elc_elsr36 ELSR36; + union un_elc_elsr37 ELSR37; + union un_elc_elsr38 ELSR38; + char wk8[6]; + union un_elc_elsr45 ELSR45; + char wk9[1]; + union un_elc_elopf ELOPF; + char wk10[1]; + union un_elc_eloph ELOPH; +} st_elc_t; + +typedef struct st_etherc +{ + union un_etherc_ecmr EMCR; + char wk0[4]; + union un_etherc_rflr RFLR; + char wk1[4]; + union un_etherc_ecsr ECSR; + char wk2[4]; + union un_etherc_ecsipr ECSIPR; + char wk3[4]; + union un_etherc_pir PIR; + char wk4[4]; + union un_etherc_psr PSR; + char wk5[20]; + union un_etherc_rdmlr RDMLR; + char wk6[12]; + union un_etherc_ipgr IPGR; + union un_etherc_apr APR; + union un_etherc_mpr MPR; + char wk7[4]; + union un_etherc_rfcf RFCF; + union un_etherc_tpauser TPAUSER; + union un_etherc_tpausecr TPAUSECR; + union un_etherc_bcfrr BCFRR; + char wk8[80]; + unsigned long MAHR; + char wk9[4]; + union un_etherc_malr MALR; + char wk10[4]; + unsigned long TROCR; + unsigned long CDCR; + unsigned long LCCR; + unsigned long CNDCR; + char wk11[4]; + unsigned long CEFCR; + unsigned long FRECR; + unsigned long TSFRCR; + unsigned long TLFRCR; + unsigned long RFCR; + unsigned long MAFCR; +} st_etherc_t; + +typedef struct st_exdmac +{ + union un_exdmac_edmast EDMAST; + char wk0[479]; + unsigned long CLSBR0; + unsigned long CLSBR1; + unsigned long CLSBR2; + unsigned long CLSBR3; + unsigned long CLSBR4; + unsigned long CLSBR5; + unsigned long CLSBR6; + unsigned long CLSBR7; +} st_exdmac_t; + +typedef struct st_exdmac0 +{ + void *EDMSAR; + void *EDMDAR; + unsigned long EDMCRA; + unsigned short EDMCRB; + char wk0[2]; + union un_exdmac0_edmtmd EDMTMD; + union un_exdmac0_edmomd EDMOMD; + union un_exdmac0_edmint EDMINT; + union un_exdmac0_edmamd EDMAMD; + unsigned long EDMOFR; + union un_exdmac0_edmcnt EDMCNT; + union un_exdmac0_edmreq EDMREQ; + union un_exdmac0_edmsts EDMSTS; + char wk1[1]; + union un_exdmac0_edmrmd EDMRMD; + union un_exdmac0_edmerf EDMERF; + union un_exdmac0_edmprf EDMPRF; +} st_exdmac0_t; + +typedef struct st_exdmac1 +{ + void *EDMSAR; + void *EDMDAR; + unsigned long EDMCRA; + unsigned short EDMCRB; + char wk0[2]; + union un_exdmac1_edmtmd EDMTMD; + union un_exdmac1_edmomd EDMOMD; + union un_exdmac1_edmint EDMINT; + union un_exdmac1_edmamd EDMAMD; + char wk1[4]; + union un_exdmac1_edmcnt EDMCNT; + union un_exdmac1_edmreq EDMREQ; + union un_exdmac1_edmsts EDMSTS; + char wk2[1]; + union un_exdmac1_edmrmd EDMRMD; + union un_exdmac1_edmerf EDMERF; + union un_exdmac1_edmprf EDMPRF; +} st_exdmac1_t; + +typedef struct st_flash +{ + union un_flash_romce ROMCE; + char wk0[2]; + union un_flash_romciv ROMCIV; + char wk1[45712]; + union un_flash_fwepror FWEPROR; + char wk2[7798185]; + unsigned char EEPFCLK; + char wk3[8143]; + union un_flash_fastat FASTAT; + char wk4[3]; + union un_flash_faeint FAEINT; + char wk5[3]; + union un_flash_frdyie FRDYIE; + char wk6[23]; + union un_flash_fsaddr FSADDR; + union un_flash_feaddr FEADDR; + char wk7[72]; + union un_flash_fstatr FSTATR; + union un_flash_fentryr FENTRYR; + char wk8[6]; + union un_flash_fsunitr FSUNITR; + char wk9[18]; + union un_flash_fcmdr FCMDR; + char wk10[46]; + union un_flash_fbccnt FBCCNT; + char wk11[3]; + union un_flash_fbcstat FBCSTAT; + char wk12[3]; + union un_flash_fpsaddr FPSADDR; + union un_flash_fawmon FAWMON; + union un_flash_fcpsr FCPSR; + char wk13[2]; + union un_flash_fpckar FPCKAR; + char wk14[2]; + union un_flash_fsuacr FSUACR; +} st_flash_t; + +typedef struct st_pdc +{ + union un_pdc_pccr0 PCCR0; + union un_pdc_pccr1 PCCR1; + union un_pdc_pcsr PCSR; + union un_pdc_pcmonr PCMONR; + union un_pdc_pcdr PCDR; + union un_pdc_vcr VCR; + union un_pdc_hcr HCR; +} st_pdc_t; + +typedef struct st_poe +{ + union un_poe_icsr1 ICSR1; + union un_poe_ocsr1 OCSR1; + union un_poe_icsr2 ICSR2; + union un_poe_ocsr2 OCSR2; + union un_poe_icsr3 ICSR3; + union un_poe_spoer SPOER; + union un_poe_poecr1 POECR1; + union un_poe_poecr2 POECR2; + char wk0[2]; + union un_poe_poecr4 POECR4; + union un_poe_poecr5 POECR5; + char wk1[2]; + union un_poe_icsr4 ICSR4; + union un_poe_icsr5 ICSR5; + union un_poe_alr1 ALR1; + union un_poe_icsr6 ICSR6; + char wk2[6]; + union un_poe_m0selr1 M0SELR1; + union un_poe_m0selr2 M0SELR2; + union un_poe_m3selr M3SELR; + union un_poe_m4selr1 M4SELR1; + union un_poe_m4selr2 M4SELR2; + char wk3[1]; + union un_poe_m6selr M6SELR; +} st_poe_t; + +typedef struct st_portd +{ + union un_portd_pdr PDR; + union un_portd_podr PODR; + union un_portd_pidr PIDR; + union un_portd_pmr PMR; + union un_portd_ord0 ORD0; + union un_portd_ord1 ORD1; + union un_portd_pcr PCR; + union un_portd_dscr DSCR; + union un_portd_dscr2 DSCR2; + char wk0[31]; + char wk1[31]; + char wk2[31]; + char wk3[44]; + char wk4[49]; + char wk5[31]; + char wk6[71]; +} st_portd_t; + +typedef struct st_ppg0 +{ + union un_ppg0_pcr PCR; + union un_ppg0_pmr OMR; + union un_ppg0_nderh NDERH; + union un_ppg0_nderl NDERL; + union un_ppg0_podrh PODRH; + union un_ppg0_podrl PODRL; + union un_ppg0_ndrh NDRH; + union un_ppg0_ndrl NDRL; + union un_ppg0_ndrh2 NDRH2; + union un_ppg0_ndrl2 NDRL2; +} st_ppg0_t; + +typedef struct st_ppg1 +{ + union un_ppg1_ptrslr PTRSLR; + char wk0[5]; + union un_ppg1_pcr PCR; + union un_ppg1_pmr PMR; + union un_ppg1_nderh NDERH; + union un_ppg1_nderl NDERL; + union un_ppg1_podrh PODRH; + union un_ppg1_podrl PODRL; + union un_ppg1_ndrh NDRH; + union un_ppg1_ndrl NDRL; + union un_ppg1_ndrh2 NDRH2; + union un_ppg1_ndrl2 NDRL2; +} st_ppg1_t; + +typedef struct st_qspi +{ + union un_qspi_spcr SPCR; + union un_qspi_sslp SSLP; + union un_qspi_sppcr SPPCR; + union un_qspi_spsr SPSR; + union un_qspi_spdr SPDR; + union un_qspi_spscr SPSCR; + union un_qspi_spssr SPSSR; + union un_qspi_spbr SPBR; + union un_qspi_spdcr SPDCR; + union un_qspi_spckd SPCKD; + union un_qspi_sslnd SSLND; + union un_qspi_spnd SPND; + char wk0[1]; + union un_qspi_spcmd0 SPCMD0; + union un_qspi_spcmd1 SPCMD1; + union un_qspi_spcmd2 SPCMD2; + union un_qspi_spcmd3 SPCMD3; + union un_qspi_spbfcr SPBFCR; + char wk1[1]; + union un_qspi_spbdcr SPBDCR; + unsigned long SPBMUL0; + unsigned long SPBMUL1; + unsigned long SPBMUL2; + unsigned long SPBMUL3; +} st_qspi_t; + +typedef struct st_ram +{ + union un_ram_rammode RAMMODE; + union un_ram_ramsts RAMSTS; + char wk0[2]; + union un_ram_ramprcr RAMPRCR; + char wk1[3]; + union un_ram_ramecad RAMECAD; + char wk2[52]; + union un_ram_exrammode EXRAMMODE; + union un_ram_exramsts EXRAMSTS; + char wk3[2]; + union un_ram_exramprcr EXRAMPRCR; + char wk4[3]; + union un_ram_exramecad EXRAMECAD; +} st_ram_t; + +typedef struct st_s12ad +{ + union un_s12ad_adcsr ADCSR; + char wk0[2]; + union un_s12ad_adansa0 ADANSA0; + char wk1[2]; + union un_s12ad_adads0 ADADS0; + char wk2[2]; + union un_s12ad_adadc ADADC; + char wk3[1]; + union un_s12ad_adcer ADCER; + union un_s12ad_adstrgr ADSTRGR; + char wk4[2]; + union un_s12ad_adansb0 ADANSB0; + char wk5[2]; + union un_s12ad_addbldr ADDBLDR; + char wk6[4]; + union un_s12ad_adrd ADRD; + unsigned short ADDR0; + unsigned short ADDR1; + unsigned short ADDR2; + unsigned short ADDR3; + unsigned short ADDR4; + unsigned short ADDR5; + unsigned short ADDR6; + unsigned short ADDR7; + char wk7[51]; + union un_s12ad_adsampr ADSAMPR; + char wk8[2]; + union un_s12ad_adshcr ADSHCR; + char wk9[6]; + union un_s12ad_adsam ADSAM; + char wk10[10]; + union un_s12ad_addiscr ADDISCR; + char wk11[1]; + union un_s12ad_adshmsr ADSHMSR; + char wk12[3]; + union un_s12ad_adgspcr ADGSPCR; + char wk13[2]; + unsigned short ADDBLDRA; + unsigned short ADDBLDRB; + char wk14[4]; + union un_s12ad_adwinmon ADWINMON; + char wk15[3]; + union un_s12ad_adcmpcr ADCMPCR; + char wk16[2]; + union un_s12ad_adcmpansr0 ADCMPANSR0; + char wk17[2]; + union un_s12ad_adcmplr0 ADCMPLR0; + char wk18[2]; + unsigned short ADCMPDR0; + unsigned short ADCMPDR1; + union un_s12ad_adcmpsr0 ADCMPSR0; + char wk19[4]; + union un_s12ad_adcmpbnsr ADCMPBNSR; + char wk20[1]; + unsigned short ADWINLLB; + unsigned short ADWINULB; + union un_s12ad_adcmpbsr ADCMPBSR; + char wk21[39]; + union un_s12ad_adansc0 ADANSC0; + char wk22[3]; + union un_s12ad_adgctrgr ADGCTRGR; + char wk23[6]; + unsigned char ADSSTR0; + unsigned char ADSSTR1; + unsigned char ADSSTR2; + unsigned char ADSSTR3; + unsigned char ADSSTR4; + unsigned char ADSSTR5; + unsigned char ADSSTR6; + unsigned char ADSSTR7; +} st_s12ad_t; + +typedef struct st_s12ad1 +{ + union un_s12ad1_adcsr ADCSR; + char wk0[2]; + union un_s12ad1_adansa0 ADANSA0; + union un_s12ad1_adansa1 ADANSA1; + union un_s12ad1_adads0 ADADSO; + union un_s12ad1_adads1 ADADS1; + union un_s12ad1_adadc ADADC; + char wk1[1]; + union un_s12ad1_adcer ADCER; + union un_s12ad1_adstrgr ADSTRGR; + union un_s12ad1_adexicr ADEXICR; + union un_s12ad1_adansb0 ADANSB0; + union un_s12ad1_adansb1 ADANSB1; + unsigned short ADDBLDR; + unsigned short ADTSDR; + unsigned short ADOCDR; + union un_s12ad1_adrd ADRD; + unsigned short ADDR0; + unsigned short ADDR1; + unsigned short ADDR2; + unsigned short ADDR3; + unsigned short ADDR4; + unsigned short ADDR5; + unsigned short ADDR6; + unsigned short ADDR7; + unsigned short ADDR8; + unsigned short ADDR9; + unsigned short ADDR10; + unsigned short ADDR11; + unsigned short ADDR12; + unsigned short ADDR13; + unsigned short ADDR14; + unsigned short ADDR15; + unsigned short ADDR16; + unsigned short ADDR17; + unsigned short ADDR18; + unsigned short ADDR19; + unsigned short ADDR20; + char wk2[25]; + union un_s12ad1_adsampr ADSAMPR; + char wk3[10]; + union un_s12ad1_adsam ADSAM; + char wk4[10]; + union un_s12ad1_addiscr ADDISCR; + char wk5[5]; + union un_s12ad1_adgspcr ADGSPCR; + char wk6[2]; + unsigned short ADDBLDRA; + unsigned short ADDBLDRB; + char wk7[4]; + union un_s12ad1_adwinmon ADWINMON; + char wk8[3]; + union un_s12ad1_adcmpcr ADCMPCR; + union un_s12ad1_adcmpanser ADCMPANSER; + union un_s12ad1_adcmpler ADCMPLER; + union un_s12ad1_adcmpansr0 ADCMPANSR0; + union un_s12ad1_adcmpansr1 ADCMPANSR1; + union un_s12ad1_adcmplr0 ADCMPLR0; + union un_s12ad1_adcmplr1 ADCMPLR1; + unsigned short ADCMPDR0; + unsigned short ADCMPDR1; + union un_s12ad1_adcmpsr0 ADCMPSR0; + union un_s12ad1_adcmpsr1 ADCMPSR1; + union un_s12ad1_adcmpser ADCMPSER; + char wk9[1]; + union un_s12ad1_adcmpbnsr ADCMPBNSR; + char wk10[1]; + unsigned short ADWINLLB; + unsigned short ADWINULB; + union un_s12ad1_adcmpbsr ADCMPBSR; + char wk11[39]; + union un_s12ad1_adansc0 ADANSC0; + union un_s12ad1_adansc1 ADANSC1; + union un_s12ad1_adgcexcr ADGCEXCR; + union un_s12ad1_adgctrgr ADGCTRGR; + char wk12[3]; + unsigned char ADSSTRL; + unsigned char ADSSTRT; + unsigned char ADSSTRO; + unsigned char ADSSTR0; + unsigned char ADSSTR1; + unsigned char ADSSTR2; + unsigned char ADSSTR3; + unsigned char ADSSTR4; + unsigned char ADSSTR5; + unsigned char ADSSTR6; + unsigned char ADSSTR7; + unsigned char ADSSTR8; + unsigned char ADSSTR9; + unsigned char ADSSTR10; + unsigned char ADSSTR11; + unsigned char ADSSTR12; + unsigned char ADSSTR13; + unsigned char ADSSTR14; + unsigned char ADSSTR15; +} st_s12ad1_t; + #pragma pack() -#endif /* __ASSEMBLER__ */ +#endif /* __ASSEMBLER__ */ #endif + diff --git a/arch/renesas/src/rx65n/Kconfig b/arch/renesas/src/rx65n/Kconfig index e66f89e1562..676ca4915e9 100644 --- a/arch/renesas/src/rx65n/Kconfig +++ b/arch/renesas/src/rx65n/Kconfig @@ -182,6 +182,13 @@ config RX65N_EMAC0 select NETDEVICES select ARCH_HAVE_PHY +config RX65N_RTC + bool "RTC" + default y + +config RX65N_CARRY + bool "RTC" + default y endmenu # RX65N Peripheral Selections endif @@ -529,4 +536,11 @@ config RX65N_EMAC_REGDEBUG ---help--- Enable very low-level register access debug. Depends on CONFIG_DEBUG_NET. +config RX65N_RTC + bool "RTC" + default y + +config RX65N_CARRY + bool "RTC" + default y endmenu # EMAC0 device driver options diff --git a/arch/renesas/src/rx65n/Make.defs b/arch/renesas/src/rx65n/Make.defs index 5320e09c8a1..07b26731a77 100644 --- a/arch/renesas/src/rx65n/Make.defs +++ b/arch/renesas/src/rx65n/Make.defs @@ -52,3 +52,10 @@ CHIP_CSRCS += rx65n_timerisr.c ifeq ($(CONFIG_RX65N_EMAC),y) CHIP_CSRCS += rx65n_eth.c rx65n_cmtw0.c endif +ifeq ($(CONFIG_RX65N_RTC),y) +CHIP_CSRCS += rx65n_rtc.c +endif + +ifeq ($(CONFIG_RTC_DRIVER),y) +CHIP_CSRCS += rx65n_rtc_lowerhalf.c +endif \ No newline at end of file diff --git a/arch/renesas/src/rx65n/chip.h b/arch/renesas/src/rx65n/chip.h index e82f13ec83e..fd34dcca4c0 100644 --- a/arch/renesas/src/rx65n/chip.h +++ b/arch/renesas/src/rx65n/chip.h @@ -1,37 +1,22 @@ /**************************************************************************** * arch/renesas/src/rx65n/chip.h * - * Copyright (C) 2008-2019 Gregory Nutt. All rights reserved. - * Author: Anjana + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ***************************************************************************/ + ****************************************************************************/ #ifndef __ARCH_RENESAS_SRC_RX65N_CHIP_H #define __ARCH_RENESAS_SRC_RX65N_CHIP_H @@ -39,7 +24,7 @@ /**************************************************************************** * Included Files - ***************************************************************************/ + ****************************************************************************/ #include @@ -50,23 +35,19 @@ /**************************************************************************** * Pre-processor Definitions - ***************************************************************************/ + ****************************************************************************/ /**************************************************************************** * Public Types - ***************************************************************************/ + ****************************************************************************/ -/*************************************************************************** +/**************************************************************************** * Public Data - **************************************************************************/ + ****************************************************************************/ #ifndef __ASSEMBLY__ extern uint16_t ebss; #endif -/************************************************************************** - * Public Functions - *************************************************************************/ - #endif #endif /* __ARCH_RENESAS_SRC_SH1_CHIP_H */ diff --git a/arch/renesas/src/rx65n/rx65n_cgc.c b/arch/renesas/src/rx65n/rx65n_cgc.c index a9cea45cc9c..08571823cf5 100644 --- a/arch/renesas/src/rx65n/rx65n_cgc.c +++ b/arch/renesas/src/rx65n/rx65n_cgc.c @@ -1,35 +1,20 @@ /**************************************************************************** * arch/renesas/src/rx65n/rx65n_cgc.c * - * Copyright (C) 2008-2019 Gregory Nutt. All rights reserved. - * Author: Anjana + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ @@ -54,6 +39,7 @@ void r_cgc_create(void) { + volatile uint8_t i; #if ((24 * RX_CLK_1MHz) == RX_RESONATOR) /* Set main clock control registers */ @@ -141,6 +127,67 @@ void r_cgc_create(void) /* Set LOCO */ SYSTEM.LOCOCR.BIT.LCSTP = 1U; +#ifdef CONFIG_RX65N_RTC + RTC.RCR4.BYTE = _00_RTC_SOURCE_SELECT_SUB; + for (i = 0; i < 4; i++) + { + __asm("nop"); + } + + if (0 != RTC.RCR4.BIT.RCKSEL) + { + __asm("nop"); + } + + RTC.RCR3.BIT.RTCEN = 0; + for (i = 0; i < 4; i++) + { + __asm("nop"); + } + + if (0 != RTC.RCR3.BIT.RTCEN) + { + __asm("nop"); + } + + SYSTEM.SOSCCR.BYTE = 0x01; + if (0x01 != SYSTEM.SOSCCR.BYTE) + { + __asm("nop"); + } + + while (0 != SYSTEM.OSCOVFSR.BIT.SOOVF); + RTC.RCR3.BIT.RTCDV = 1U; + + /* Wait for the register modification to complete */ + + while (1U != RTC.RCR3.BIT.RTCDV) + { + /* Do nothing */ + } + + /* Set sub-clock oscillation wait time */ + + SYSTEM.SOSCWTCR.BYTE = _25_CGC_SOSCWTCR_VALUE; + + /* Set sub-clock */ + + SYSTEM.SOSCCR.BIT.SOSTP = 0U; + + /* Wait for the register modification to complete */ + + while (0U != SYSTEM.SOSCCR.BIT.SOSTP) + { + /* Do nothing */ + } + + /* Wait for sub-clock to be stable */ + + while (1U != SYSTEM.OSCOVFSR.BIT.SOOVF) + { + /* Do nothing */ + } +#endif #elif ((12 * RX_CLK_1MHz) == RX_RESONATOR) SYSTEM.MOFCR.BIT.MOFXIN = 0; SYSTEM.MOFCR.BIT.MOSEL = 0; @@ -154,6 +201,7 @@ void r_cgc_create(void) { while (0 == SYSTEM.OSCOVFSR.BIT.HCOVF); } + SYSTEM.MOFCR.BIT.MODRV2 = 2; SYSTEM.MOSCWTCR.BYTE = 0x53; SYSTEM.MOSCCR.BYTE = 0x00; @@ -166,36 +214,67 @@ void r_cgc_create(void) while (0 == SYSTEM.OSCOVFSR.BIT.MOOVF); if (0 == SYSTEM.RSTSR1.BIT.CWSF) { - volatile uint8_t i; - RTC.RCR4.BIT.RCKSEL = 0; - for (i = 0; i < 4; i++) - { - __asm("nop"); - } +#ifdef CONFIG_RX65N_RTC + RTC.RCR4.BYTE = _00_RTC_SOURCE_SELECT_SUB; + for (i = 0; i < 4; i++) + { + __asm("nop"); + } - if (0 != RTC.RCR4.BIT.RCKSEL) - { - __asm("nop"); - } + if (0 != RTC.RCR4.BIT.RCKSEL) + { + __asm("nop"); + } - RTC.RCR3.BIT.RTCEN = 0; - for (i = 0; i < 4; i++) - { - __asm("nop"); - } + RTC.RCR3.BIT.RTCEN = 0; + for (i = 0; i < 4; i++) + { + __asm("nop"); + } - if (0 != RTC.RCR3.BIT.RTCEN) - { - __asm("nop"); - } + if (0 != RTC.RCR3.BIT.RTCEN) + { + __asm("nop"); + } - SYSTEM.SOSCCR.BYTE = 0x01; - if (0x01 != SYSTEM.SOSCCR.BYTE) - { - __asm("nop"); - } + SYSTEM.SOSCCR.BYTE = 0x01; + if (0x01 != SYSTEM.SOSCCR.BYTE) + { + __asm("nop"); + } - while (0 != SYSTEM.OSCOVFSR.BIT.SOOVF); + while (0 != SYSTEM.OSCOVFSR.BIT.SOOVF); + RTC.RCR3.BIT.RTCDV = 1U; + + /* Wait for the register modification to complete */ + + while (1U != RTC.RCR3.BIT.RTCDV) + { + /* Do nothing */ + } + + /* Set sub-clock oscillation wait time */ + + SYSTEM.SOSCWTCR.BYTE = _25_CGC_SOSCWTCR_VALUE; + + /* Set sub-clock */ + + SYSTEM.SOSCCR.BIT.SOSTP = 0U; + + /* Wait for the register modification to complete */ + + while (0U != SYSTEM.SOSCCR.BIT.SOSTP) + { + /* Do nothing */ + } + + /* Wait for sub-clock to be stable */ + + while (1U != SYSTEM.OSCOVFSR.BIT.SOOVF) + { + /* Do nothing */ + } +#endif } else { diff --git a/arch/renesas/src/rx65n/rx65n_cgc.h b/arch/renesas/src/rx65n/rx65n_cgc.h index 56b10aeda70..8c2caac5e9f 100644 --- a/arch/renesas/src/rx65n/rx65n_cgc.h +++ b/arch/renesas/src/rx65n/rx65n_cgc.h @@ -1,35 +1,20 @@ /**************************************************************************** * arch/renesas/src/rx65n/rx65n_cgc.h * - * Copyright (C) 2008-2019 Gregory Nutt. All rights reserved. - * Author: Anjana + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ @@ -253,7 +238,7 @@ #define _00_RTC_SOURCE_SELECT_SUB (0x00u) /* Select sub-clock oscillator */ #define _01_RTC_SOURCE_SELECT_MAIN_FORCED (0x01u) /* Select main clock oscillator */ - +#define _25_CGC_SOSCWTCR_VALUE (0x25U) /* Interrupt Source Priority Register n (IPRn) */ /* Interrupt Priority Level Select (IPR[3:0]) */ @@ -281,7 +266,7 @@ /**************************************************************************** * Public Function Prototypes - ***************************************************************************/ + ****************************************************************************/ /**************************************************************************** * Name: r_cgc_create diff --git a/arch/renesas/src/rx65n/rx65n_definitions.h b/arch/renesas/src/rx65n/rx65n_definitions.h index 22b23783c49..5a9a2e08f77 100644 --- a/arch/renesas/src/rx65n/rx65n_definitions.h +++ b/arch/renesas/src/rx65n/rx65n_definitions.h @@ -1,45 +1,29 @@ /**************************************************************************** * arch/renesas/src/rx65n/rx65n_definitions.h * - * Copyright (C) 2008-2019 Gregory Nutt. All rights reserved. - * Author: Anjana - * Surya + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ***************************************************************************/ + ****************************************************************************/ #ifndef __ARCH_RENESAS_SRC_RX65N_RX65N_DEFINITIONS_H #define __ARCH_RENESAS_SRC_RX65N_RX65N_DEFINITIONS_H /**************************************************************************** * Included Files - ***************************************************************************/ + ****************************************************************************/ #include #include "rx65n/iodefine.h" @@ -47,9 +31,9 @@ /**************************************************************************** * Pre-processor Definitions - ***************************************************************************/ + ****************************************************************************/ -/* Memory-mapped register addresses ****************************************/ +/* Memory-mapped register addresses *****************************************/ #define RX65N_SCI0_BASE (uint32_t)&SCI0 #define RX65N_SCI1_BASE (uint32_t)&SCI1 @@ -468,13 +452,98 @@ #define SET_BYTE_HIGH (0xff) #define SET_BYTE_LOW (0x00) +/* RTC Register Offsets */ + +#define RX65N_RTC_R64CNT_OFFSET (0x0000) +#define RX65N_RTC_RSECCNT_OFFSET (0x0002) +#define RX65N_RTC_RMINCNT_OFFSET (0x0004) +#define RX65N_RTC_RHRCNT_OFFSET (0x0006) +#define RX65N_RTC_RWKCNT_OFFSET (0x0008) +#define RX65N_RTC_RDAYCNT_OFFSET (0x000a) +#define RX65N_RTC_RMONCNT_OFFSET (0x000c) +#define RX65N_RTC_RYRCNT_OFFSET (0x000e) +#define RX65N_RTC_RSECAR_OFFSET (0x0010) +#define RX65N_RTC_RMINAR_OFFSET (0x0012) +#define RX65N_RTC_RHRAR_OFFSET (0x0014) +#define RX65N_RTC_RWKAR_OFFSET (0x0016) +#define RX65N_RTC_RDAYAR_OFFSET (0x0018) +#define RX65N_RTC_RMONAR_OFFSET (0x001a) +#define RX65N_RTC_RYRAR_OFFSET (0x001c) +#define RX65N_RTC_RYRAREN_OFFSET (0x001e) +#define RX65N_RTC_RCR1_OFFSET (0x0022) +#define RX65N_RTC_RCR2_OFFSET (0x0024) +#define RX65N_RTC_RCR3_OFFSET (0x0026) +#define RX65N_RTC_RCR4_OFFSET (0x0028) +#define RX65N_RTC_RADJ_OFFSET (0x002e) + +#define RX65N_RTC_BASE (0x0008c400) +#define RX65N_RTC_R64CNT (RX65N_RTC_BASE + RX65N_RTC_R64CNT_OFFSET) +#define RX65N_RTC_RSECCNT (RX65N_RTC_BASE + RX65N_RTC_RSECCNT_OFFSET) +#define RX65N_RTC_RMINCNT (RX65N_RTC_BASE + RX65N_RTC_RMINCNT_OFFSET) +#define RX65N_RTC_RHRCNT (RX65N_RTC_BASE + RX65N_RTC_RHRCNT_OFFSET) +#define RX65N_RTC_RWKCNT (RX65N_RTC_BASE + RX65N_RTC_RWKCNT_OFFSET) +#define RX65N_RTC_RDAYCNT (RX65N_RTC_BASE + RX65N_RTC_RDAYCNT_OFFSET) +#define RX65N_RTC_RMONCNT (RX65N_RTC_BASE + RX65N_RTC_RMONCNT_OFFSET) +#define RX65N_RTC_RYRCNT (RX65N_RTC_BASE + RX65N_RTC_RYRCNT_OFFSET) +#define RX65N_RTC_RSECAR (RX65N_RTC_BASE + RX65N_RTC_RSECAR_OFFSET) +#define RX65N_RTC_RMINAR (RX65N_RTC_BASE + RX65N_RTC_RMINAR_OFFSET) +#define RX65N_RTC_RHRAR (RX65N_RTC_BASE + RX65N_RTC_RHRAR_OFFSET) +#define RX65N_RTC_RWKAR (RX65N_RTC_BASE + RX65N_RTC_RWKAR_OFFSET) +#define RX65N_RTC_RDAYAR (RX65N_RTC_BASE + RX65N_RTC_RDAYAR_OFFSET) +#define RX65N_RTC_RMONAR (RX65N_RTC_BASE + RX65N_RTC_RMONAR_OFFSET) +#define RX65N_RTC_RYRAR (RX65N_RTC_BASE + RX65N_RTC_RYRAR_OFFSET) +#define RX65N_RTC_RYRAREN (RX65N_RTC_BASE + RX65N_RTC_RYRAREN_OFFSET) +#define RX65N_RTC_RCR1 (RX65N_RTC_BASE + RX65N_RTC_RCR1_OFFSET) +#define RX65N_RTC_RCR2 (RX65N_RTC_BASE + RX65N_RTC_RCR2_OFFSET) +#define RX65N_RTC_RCR3 (RX65N_RTC_BASE + RX65N_RTC_RCR3_OFFSET) +#define RX65N_RTC_RCR4 (RX65N_RTC_BASE + RX65N_RTC_RCR4_OFFSET) +#define RX65N_RTC_RADJ (RX65N_RTC_BASE + RX65N_RTC_RADJ_OFFSET) + +#define RTC_RTC_ALRDIS (0x00) +#define RTC_RCR4_RCKSEL (0x00) +#define RTC_RCR3_RTCEN (0x01) +#define RTC_RCR3_RTCDV (0x02) +#define RTC_RCR2_START (0x01) +#define RTC_RCR2_CNTMD (0x00) +#define RTC_RCR2_RESET (0x01) +#define RTC_ALARM_INT_ENABLE (0x01) +#define RTC_CARRY_INT_ENABLE (0x02) +#define RTC_PERIOD_INT_ENABLE (0x04) +#define RTC_PERIODIC_INT_PERIOD_1 (0xe0) +#define _04_FOUR_READ_COUNT (0x04) +#define RTC_1_64_SEC_CYCLE (0x0005b8d9) +#define _0F_RTC_PRIORITY_LEVEL15 (0x0f) +#define RTC_RCR1_CUP (0x02) +#define RX65N_SUBCLKOSC_SOSCCR (0x00080033) +#define SUBCLKOSC_SOSCCR_SOSTP (0x01) +#define RX65N_SUBCLKOSC_SOSCWTCR (0x0008c293) +#define RTC_SOSCWTCR_VALUE (0x21) +#define RTC_DUMMY_READ (3) +#define _00_RTC_PRIORITY_LEVEL0 (0) +#define _04_RTC_PERIOD_INT_ENABLE (0x04) +#define RTC_RTC_CARRYDIS (0xe5) +#define RTC_RTC_PERDIS (0xe3) +#define RTC_RADJ_INITVALUE (0x0) +#define RTC_RCR2_AADJE (0x10) +#define RTC_RCR2_AADJP (0x20) + +#if defined(CONFIG_RTC) || defined(CONFIG_RTC_DRIVER) + +#define HAVE_RTC_DRIVER 1 + +#endif + +#define RX65N_RTC_WAIT_PERIOD 184 +#define RTC_RCR2_HR24 (0x40) +#define RTC_PERIODIC_INTERRUPT_2_SEC (0xf) + /**************************************************************************** * Public Types - ***************************************************************************/ + ****************************************************************************/ /**************************************************************************** * Public Data - ***************************************************************************/ + ****************************************************************************/ #ifndef __ASSEMBLER__ /* Serial Communications interface (SCI) */ diff --git a/arch/renesas/src/rx65n/rx65n_icu.h b/arch/renesas/src/rx65n/rx65n_icu.h index 65a6650087b..0eae842fc37 100644 --- a/arch/renesas/src/rx65n/rx65n_icu.h +++ b/arch/renesas/src/rx65n/rx65n_icu.h @@ -1,37 +1,22 @@ /**************************************************************************** * arch/renesas/src/rx65n/rx65n_icu.h * - * Copyright (C) 2008-2019 Gregory Nutt. All rights reserved. Gregory Nutt. - * Author: Anjana + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ***************************************************************************/ + ****************************************************************************/ #ifndef __ARCH_RENESAS_SRC_RX65N_RX65N_ICU_H #define __ARCH_RENESAS_SRC_RX65N_RX65N_ICU_H @@ -250,7 +235,7 @@ /**************************************************************************** * Public Function Prototypes - ***************************************************************************/ + ****************************************************************************/ /**************************************************************************** * Name: r_icu_create @@ -478,4 +463,4 @@ void r_icu_irqsetfallingedge(const uint8_t irq_no, const uint8_t set_f_edge); void r_icu_irqsetrisingedge(const uint8_t irq_no, const uint8_t set_r_edge); -#endif /* __ARCH_RENESAS_SRC_RX65N_RX65N_ICU_H *. +#endif /* __ARCH_RENESAS_SRC_RX65N_RX65N_ICU_H */ diff --git a/arch/renesas/src/rx65n/rx65n_irq.c b/arch/renesas/src/rx65n/rx65n_irq.c index 1f4009e752a..d63255f6afb 100644 --- a/arch/renesas/src/rx65n/rx65n_irq.c +++ b/arch/renesas/src/rx65n/rx65n_irq.c @@ -1,36 +1,20 @@ /**************************************************************************** * arch/renesas/src/rx65n/rx65n_irq.c * - * Copyright (C) 2008-2019 Gregory Nutt. All rights reserved. - * Author: Anjana - * Surya + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ @@ -174,6 +158,7 @@ void up_disable_irq(int irq) ICU.GENBL0.BIT.EN4 = 0; } #endif + #ifdef CONFIG_RX65N_SCI3 if (irq == RX65N_RXI3_IRQ) { @@ -245,6 +230,7 @@ void up_disable_irq(int irq) ICU.GENBL0.BIT.EN10 = 0; } #endif + #ifdef CONFIG_RX65N_SCI6 if (irq == RX65N_RXI6_IRQ) { @@ -420,6 +406,26 @@ void up_disable_irq(int irq) ICU.GENAL1.BIT.EN4 = 0; } #endif + +#ifdef CONFIG_RX65N_RTC + if (irq == RX65N_ALM_IRQ) + { + ICU.IER[0x0b].BIT.IEN4 = 0; + } + + if (irq == RX65N_PRD_IRQ) + { + ICU.IER[0x0b].BIT.IEN5 = 0; + } + +#ifdef CONFIG_RX65N_PERIB + if (irq == RX65N_INTB176_IRQ) + { + ICU.IER[16].BIT.IEN0 = 0; + } + +#endif +#endif } /**************************************************************************** @@ -511,6 +517,7 @@ void up_enable_irq(int irq) ICU.GENBL0.BIT.EN4 = 1; } #endif + #ifdef CONFIG_RX65N_SCI3 if (irq == RX65N_RXI3_IRQ) { @@ -582,6 +589,7 @@ void up_enable_irq(int irq) ICU.GENBL0.BIT.EN10 = 1; } #endif + #ifdef CONFIG_RX65N_SCI6 if (irq == RX65N_RXI6_IRQ) { @@ -757,4 +765,24 @@ void up_enable_irq(int irq) ICU.GENAL1.BIT.EN4 = 1; } #endif + +#ifdef CONFIG_RX65N_RTC + if (irq == RX65N_ALM_IRQ) + { + ICU.IER[0x0b].BIT.IEN4 = 1; + } + + if (irq == RX65N_PRD_IRQ) + { + ICU.IER[0x0b].BIT.IEN5 = 1; + } + +#ifdef CONFIG_RX65N_PERIB + if (irq == RX65N_INTB176_IRQ) + { + ICU.IER[16].BIT.IEN0 = 1; + } + +#endif +#endif } diff --git a/arch/renesas/src/rx65n/rx65n_port.c b/arch/renesas/src/rx65n/rx65n_port.c index e6f311397ba..796cdae9575 100644 --- a/arch/renesas/src/rx65n/rx65n_port.c +++ b/arch/renesas/src/rx65n/rx65n_port.c @@ -1,36 +1,20 @@ /**************************************************************************** * arch/renesas/src/rx65n/rx65n_port.c * - * Copyright (C) 2008-2019 Gregory Nutt. All rights reserved. - * Author: Anjana - * Surya + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ @@ -137,6 +121,7 @@ void r_port_create(void) # error "No Selection for PORT definition in rx65n_port.c" #endif } + #ifdef CONFIG_RX65N_EMAC0 void r_ether_port_configuration(void) { diff --git a/arch/renesas/src/rx65n/rx65n_rtc.c b/arch/renesas/src/rx65n/rx65n_rtc.c new file mode 100644 index 00000000000..c3f8119144a --- /dev/null +++ b/arch/renesas/src/rx65n/rx65n_rtc.c @@ -0,0 +1,1234 @@ +/**************************************************************************** + * arch/renesas/src/rx65n/rx65n_rtc.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include "up_arch.h" + +#include "nuttx/compiler.h" +#ifdef CONFIG_RX65N_RTC + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +# define rx65n_getreg(addr) getreg8(addr) +# define rx65n_putreg(val,addr) putreg8(val,addr) + +/* Configuration ************************************************************/ + +#ifdef CONFIG_RTC_HIRES +# ifndef CONFIG_RTC_FREQUENCY +# error "CONFIG_RTC_FREQUENCY is required for CONFIG_RTC_HIRES" +# endif +#else +# ifndef CONFIG_RTC_FREQUENCY +# define CONFIG_RTC_FREQUENCY 1 +# endif +# if CONFIG_RTC_FREQUENCY != 1 +# error "Only lo-res CONFIG_RTC_FREQUENCY of 1Hz is supported" +# endif +# endif + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +void up_enable_irq(int irq); +void up_disable_irq(int irq); +void rtc_prd_interrupt(void); +static uint32_t rtc_dec2bcd(uint8_t value); +static int rtc_bcd2dec(uint32_t value); + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/* Callback to use when the alarm expires */ + +#ifdef CONFIG_RTC_ALARM +struct alm_cbinfo_s +{ + volatile alm_callback_t ac_cb; /* Client callback function */ + volatile FAR void *ac_arg; /* Argument to pass with the callback function */ +}; +#endif + +/* Callback to use when the periodic interrupt expires */ + +#ifdef CONFIG_RTC_PERIODIC +struct prd_cbinfo_s +{ + volatile periodiccb_t prd_cb; /* Client callback function */ + volatile FAR void *prd_arg; /* Argument to pass with the callback function */ +}; +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +#ifdef CONFIG_RTC_ALARM +/* Callback to use when an EXTI is activated */ + +static struct alm_cbinfo_s g_alarmcb; +#endif + +#ifdef CONFIG_RTC_PERIODIC +static struct prd_cbinfo_s g_periodiccb; +#endif + +/* Callback to use when the cary interrupt expires */ + +#ifdef CONFIG_RX65N_CARRY +static carrycb_t g_carrycb; +#endif + +/**************************************************************************** + * Public Data + ****************************************************************************/ + +/* g_rtc_enabled is set true after the RTC has successfully initialized */ + +volatile bool g_rtc_enabled = false; + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: rtc_dumpregs + * + * Description: + * Disable RTC write protection + * + * Input Parameters: + * None + * + * Returned Value: + * None + * + ****************************************************************************/ + +#ifdef CONFIG_DEBUG_RTC_INFO +static void rtc_dumpregs(FAR const char *msg) +{ + rtcinfo("%s:\n", msg); + rtcinfo(" 64-Hz Counter: %08x\n", getreg8(RX65N_RTC_R64CNT)); + rtcinfo(" Second Counter: %08x\n", getreg8(RX65N_RTC_RSECCNT)); + rtcinfo(" Minute Counter: %08x\n", getreg8(RX65N_RTC_RMINCNT)); + rtcinfo(" Hour Counter: %08x\n", getreg8(RX65N_RTC_RHRCNT)); + rtcinfo(" Day-of-Week Counter: %08x\n", getreg8(RX65N_RTC_RWKCNT)); + rtcinfo(" Date Counter: %08x\n", getreg8(RX65N_RTC_RDAYCNT)); + rtcinfo(" Month Counter: %08x\n", getreg8(RX65N_RTC_RMONCNT)); + rtcinfo(" Year Counter: %08x\n", getreg8(RX65N_RTC_RYRCNT)); + rtcinfo(" Second Alarm Register: %08x\n", getreg8(RX65N_RTC_RSECAR)); + rtcinfo(" Minute Alarm Register: %08x\n", getreg8(RX65N_RTC_RMINAR)); + rtcinfo(" Hour Alarm Register: %08x\n", getreg8(RX65N_RTC_RHRAR)); + rtcinfo(" Day-of-Week Alarm Register: %08x\n", getreg8(RX65N_RTC_RWKAR)); + rtcinfo(" Date Alarm Register: %08x\n", getreg8(RX65N_RTC_RDAYAR)); + rtcinfo(" Month Alarm Register: %08x\n", getreg8(RX65N_RTC_RMONAR)); + rtcinfo(" Year Alarm Register: %08x\n", getreg8(RX65N_RTC_RYRAR)); + rtcinfo(" Year Alarm Enable Register: %08x\n", getreg8(RX65N_RTC_RYRAREN)); + rtcinfo(" RTC Control Register 1: %08x\n", getreg8(RX65N_RTC_RCR1)); + rtcinfo(" RTC Control Register 2: %08x\n", getreg8(RX65N_RTC_RCR2)); + rtcinfo(" RTC Control Register 3: %08x\n", getreg8(RX65N_RTC_RCR3)); + rtcinfo(" RTC Control Register 4: %08x\n", getreg8(RX65N_RTC_RCR4)); +} +#else +# define rtc_dumpregs(msg) +#endif + +/**************************************************************************** + * Name: rtc_dumptime + * + * Description: + * Disable RTC write protection + * + * Input Parameters: + * None + * + * Returned Value: + * None + * + ****************************************************************************/ + +#ifdef CONFIG_DEBUG_RTC_INFO +static void rtc_dumptime(FAR struct tm *tp, FAR const char *msg) +{ + rtcinfo("%s:\n", msg); + rtcinfo(" tm_sec: %08x\n", tp->tm_sec); + rtcinfo(" tm_min: %08x\n", tp->tm_min); + rtcinfo(" tm_hour: %08x\n", tp->tm_hour); + rtcinfo(" tm_mday: %08x\n", tp->tm_mday); + rtcinfo(" tm_mon: %08x\n", tp->tm_mon); + rtcinfo(" tm_year: %08x\n", tp->tm_year); +} +#else +# define rtc_dumptime(tp, msg) +#endif + +/**************************************************************************** + * Name: rtc_dec2bcd + * + * Description: + * Converts decimal value to BCD format + * + * Input Parameters: + * value - The byte to be converted. + * + * Returned Value: + * The value in BCD representation + * + ****************************************************************************/ + +static uint32_t rtc_dec2bcd(uint8_t value) +{ + return (uint8_t) ((((value / 10) << 4) & 0xf0) | (value % 10)); +} + +/**************************************************************************** + * Name: rtc_bcd2dec + * + * Description: + * Convert from 2 digit BCD to decimal. + * + * Input Parameters: + * value - The BCD value to be converted. + * + * Returned Value: + * The value in binary representation + * + ****************************************************************************/ + +static int rtc_bcd2dec(uint32_t value) +{ + return (int) ((((value & 0xf0) >> 4) * 10) + (value & 0x0f)); +} + +/**************************************************************************** + * Name: rtc_interrupt + * + * Description: + * RTC interrupt service routine + * + * Input Parameters: + * irq - The IRQ number that generated the interrupt + * context - Architecture specific register save information. + * + * Returned Value: + * Zero (OK) on success; A negated errno value on failure. + * + ****************************************************************************/ + +#ifdef CONFIG_RTC_ALARM +static int rtc_alm_interrupt(int irq, void *context, FAR void *arg) +{ + FAR struct alm_cbinfo_s *cbinfo; + alm_callback_t cb; + uint8_t source = rx65n_getreg(RX65N_RTC_RCR1); + if ((source & RTC_ALARM_INT_ENABLE) != 0) + { + /* Alarm callback */ + + cbinfo = &g_alarmcb; + cb = cbinfo->ac_cb; + arg = (FAR void *)cbinfo->ac_arg; + cbinfo->ac_cb = NULL; + cbinfo->ac_arg = NULL; + cb(arg, 0); + } + + up_disable_irq(RX65N_ALM_IRQ); + return 0; +} +#endif + +#ifdef CONFIG_RTC_PERIODIC +static int rtc_periodic_interrupt(int irq, void *context, FAR void *arg) +{ + FAR struct prd_cbinfo_s *cbinfo; + periodiccb_t cb; + uint8_t source = rx65n_getreg(RX65N_RTC_RCR1); + if ((source & RTC_PERIOD_INT_ENABLE) != 0) + { + /* Periodic callback */ + + cbinfo = &g_periodiccb; + cb = cbinfo->prd_cb; + arg = (FAR void *)cbinfo->prd_arg; + cb(arg, 0); + } + + return 0; +} +#endif + +#ifdef CONFIG_RX65N_CARRY +static int rtc_carry_interrupt(int irq, void *context, FAR void *arg) +{ + uint8_t source = rx65n_getreg(RX65N_RTC_RCR1); + if ((source & RTC_CARRY_INT_ENABLE) != 0) + { + /* Carry callback */ + + g_carrycb(); + } + + return 0; +} + +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: up_rtc_initialize + * + * Description: + * Initialize the hardware RTC per the selected configuration. + * This function is + * called once during the OS initialization sequence + * + * Input Parameters: + * None + * + * Returned Value: + * Zero (OK) on success; a negated errno on failure + * + ****************************************************************************/ + +int up_rtc_initialize(void) +{ + uint8_t regval; + uint32_t temp_byte; + rtc_dumpregs("On reset"); + + /* Disable ALM, PRD and CUP interrupts */ + + up_disable_irq(RX65N_ALM_IRQ); + up_disable_irq(RX65N_PRD_IRQ); + up_disable_irq(RX65N_INTB176_IRQ); + + /* Set RTC clock source as sub clock */ + + regval = getreg8(RX65N_RTC_RCR4); + regval |= RTC_RCR4_RCKSEL; + rx65n_putreg(regval, RX65N_RTC_RCR4); + + /* Set sub-clock oscillator */ + + regval = getreg8(RX65N_RTC_RCR3); + regval |= RTC_RCR3_RTCEN; + rx65n_putreg(regval, RX65N_RTC_RCR3); + + while (1U != RTC.RCR3.BIT.RTCEN) + { + /* waiting for sub-clock oscillator is operating */ + } + + /* Stop all counters */ + + rx65n_putreg(0, RX65N_RTC_RCR2); + while (0U != RTC.RCR2.BIT.START) + { + /* Ensure the clock is stopped while configuring it. */ + } + + /* Select count mode */ + + regval = getreg8(RX65N_RTC_RCR2); + regval |= RTC_RCR2_CNTMD; + rx65n_putreg(regval, RX65N_RTC_RCR2); + + while (0U != RTC.RCR2.BIT.CNTMD) + { + /* Wait for the calendar count mode complete setting */ + } + + /* Execute RTC software reset */ + + regval = getreg8(RX65N_RTC_RCR2); + regval |= RTC_RCR2_RESET; + rx65n_putreg(regval, RX65N_RTC_RCR2); + + while (0U != RTC.RCR2.BIT.RESET) + { + /* Wait for the reset to complete */ + } + + /* Stop RTC counter */ + + regval = getreg8(RX65N_RTC_RCR2); + regval &= ~(RTC_RCR2_START); + rx65n_putreg(regval, RX65N_RTC_RCR2); + + while (0U != RTC.RCR2.BIT.START) + { + /* Ensure the clock is stopped while configuring it. */ + } + + /* Clear ALM,PRD,CUP IR */ + + IR(RTC, ALM) = 0U; + IR(RTC, PRD) = 0U; + IR(PERIB, INTB176) = 0U; + + /* After a reset is generated, write to the RTC register + * when six cycles of the count source have elapsed + */ + + up_udelay(RX65N_RTC_WAIT_PERIOD); + + /* Start the counter and set 24hr mode */ + + regval = getreg8(RX65N_RTC_RCR2); + regval |= (RTC_RCR2_HR24); + rx65n_putreg(regval, RX65N_RTC_RCR2); + + /* Setting RADJ register */ + + regval = getreg8(RX65N_RTC_RADJ); + regval |= (RTC_RADJ_INITVALUE); + rx65n_putreg(regval, RX65N_RTC_RADJ); + + /* Setting AADJE and AADJP register */ + + regval = getreg8(RX65N_RTC_RCR2); + regval |= (RTC_RCR2_AADJE | RTC_RCR2_AADJP); + rx65n_putreg(regval, RX65N_RTC_RCR2); + g_rtc_enabled = true; + UNUSED(temp_byte); + return OK; +} + +/**************************************************************************** + * Name: up_rtc_gettime + * + * Description: + * Get the current date and time from the date/time RTC. + * Input Parameters: + * tp - The location to return the high resolution time value. + * + * Returned Value: + * Zero (OK) on success; a negated errno on failure + * + ****************************************************************************/ + +#if defined(CONFIG_RTC_HIRES) +int up_rtc_gettime(FAR struct timespec *tp) +{ + uint8_t weekcnt; + uint8_t daycnt; + uint8_t monthcnt; + uint8_t yearcnt; + uint8_t seccnt; + uint8_t mincnt; + uint8_t hrcnt; + uint8_t tmp_week; + uint8_t tmp_day; + uint8_t tmp_month; + uint8_t tmp_year; + uint16_t bcd_years; + uint8_t regval; + struct tm t; + + if (RTC.RCR2.BIT.START == 0) + { + RTC.RCR2.BIT.START = 1; + } + + do + { + weekcnt = getreg8(RX65N_RTC_RWKCNT); + daycnt = getreg8(RX65N_RTC_RDAYCNT); + monthcnt = getreg8(RX65N_RTC_RMONCNT); + yearcnt = getreg8(RX65N_RTC_RYRCNT); + seccnt = getreg8(RX65N_RTC_RSECCNT); + mincnt = getreg8(RX65N_RTC_RMINCNT); + hrcnt = getreg8(RX65N_RTC_RHRCNT); + tmp_week = getreg8(RX65N_RTC_RWKCNT); + tmp_day = getreg8(RX65N_RTC_RDAYCNT); + tmp_month = getreg8(RX65N_RTC_RMONCNT); + tmp_year = getreg8(RX65N_RTC_RYRCNT); + } + + while (tmp_week != weekcnt && tmp_day != daycnt && + tmp_month != monthcnt && tmp_year != yearcnt); + + /* Disable ICU CUP interrupt */ + + up_disable_irq(CONFIG_RX65N_PERIB); + + /* Enable RTC CUP interrupt */ + + regval = getreg8(RX65N_RTC_RCR1); + regval |= (RTC_RCR1_CUP); + rx65n_putreg(regval, RX65N_RTC_RCR1); + + do + { + /* Clear carry flag in ICU */ + + IR(PERIB, INTB176) = 0U; + + /* Read and convert RTC registers; + * mask off unknown bits and hour am/pm. + */ + + /* Seconds. (0-59) */ + + t.tm_sec = rtc_bcd2dec((uint8_t) (RTC.RSECCNT.BYTE & 0x7fu)); + t.tm_min = rtc_bcd2dec((uint8_t) (RTC.RMINCNT.BYTE & 0x7fu)); + t.tm_hour = rtc_bcd2dec((uint8_t) (RTC.RHRCNT.BYTE & 0x3fu)); + t.tm_mday = rtc_bcd2dec(RTC.RDAYCNT.BYTE); + t.tm_mon = rtc_bcd2dec(RTC.RMONCNT.BYTE) - 1; + + /* Years since 2000 */ + + bcd_years = (uint16_t) RTC.RYRCNT.WORD; + + t.tm_year = rtc_bcd2dec((uint8_t) (bcd_years & 0xff)) + 100; + + tp->tv_sec = mktime(&t); + tp->tv_nsec = 0; + } + + while (1 == IR(PERIB, INTB176)); + UNUSED(hrcnt); + UNUSED(mincnt); + UNUSED(seccnt); + return OK; +} +#endif + +/**************************************************************************** + * Name: up_rtc_settime + * + * Description: + * Set the RTC to the provided time. All RTC implementations + * must be able to + * set their time based on a standard timespec. + * + * Input Parameters: + * tp - the time to use + * + * Returned Value: + * Zero (OK) on success; a negated errno on failure + * + ****************************************************************************/ + +int up_rtc_settime(FAR const struct timespec *tp) +{ + FAR struct tm newtime; + int i; + volatile uint8_t dummy_byte; + volatile uint16_t dummy_word; + + /* Break out the time values (note that the time is set only to units of seconds) */ + + (void)gmtime_r(&tp->tv_sec, &newtime); + rtc_dumptime(&newtime, "Setting time"); + + /* Then write the broken out values to the RTC */ + + /* Convert the struct tm format to RTC time register fields. + * + * struct tm TIMR register + * tm_sec 0-61* SEC (0-59) + * tm_min 0-59 MIN (0-59) + * tm_hour 0-23 HOUR (0-23) + * + * *To allow for leap seconds. But these never actuall happen. + */ + + /* Stop all counters */ + + RTC.RCR2.BIT.START = 0U; + while (0U != RTC.RCR2.BIT.START) + { + /* Ensure the clock is stopped while configuring it. */ + } + + /* Execute RTC software reset */ + + RTC.RCR2.BIT.RESET = 1U; + while (1U != RTC.RCR2.BIT.RESET) + { + /* Wait for the reset to complete */ + } + + RTC.RCR2.BIT.HR24 = 1; + + /* Set time */ + + /* Set seconds. (0-59) */ + + RTC.RSECCNT.BYTE = rtc_dec2bcd((uint8_t)newtime.tm_sec); + + /* WAIT_LOOP */ + + for (i = 0; i < RTC_DUMMY_READ; i++) + { + dummy_byte = RTC.RSECCNT.BYTE; + } + + /* Set minutes (0-59) */ + + RTC.RMINCNT.BYTE = rtc_dec2bcd((uint8_t) newtime.tm_min); + + /* WAIT_LOOP */ + + for (i = 0; i < RTC_DUMMY_READ; i++) + { + dummy_byte = RTC.RMINCNT.BYTE; + } + + /* Set hours. (0-23) */ + + RTC.RHRCNT.BYTE = rtc_dec2bcd((uint8_t) newtime.tm_hour); + + /* WAIT_LOOP */ + + for (i = 0; i < RTC_DUMMY_READ; i++) + { + dummy_byte = RTC.RHRCNT.BYTE; + } + + /* Set the date */ + + /* Day of the week (0-6, 0=Sunday) */ + +#if defined(CONFIG_LIBC_LOCALTIME) || defined(CONFIG_TIME_EXTENDED) + RTC.RWKCNT.BYTE = rtc_dec2bcd((uint8_t) newtime.tm_wday); + + /* WAIT_LOOP */ + + for (i = 0; i < RTC_DUMMY_READ; i++) + { + dummy_byte = RTC.RWKCNT.BYTE; + } +#endif + + /* Day of the month (1-31) */ + + RTC.RDAYCNT.BYTE = rtc_dec2bcd((uint8_t) newtime.tm_mday); + + /* WAIT_LOOP */ + + for (i = 0; i < RTC_DUMMY_READ; i++) + { + dummy_byte = RTC.RDAYCNT.BYTE; + } + + /* Month. (1-12, 1=January) */ + + RTC.RMONCNT.BYTE = rtc_dec2bcd((uint8_t) (newtime.tm_mon + 1)); + + /* WAIT_LOOP */ + + for (i = 0; i < RTC_DUMMY_READ; i++) + { + dummy_byte = RTC.RMONCNT.BYTE; + } + + /* Year. (00-99) */ + + RTC.RYRCNT.WORD = (uint16_t) (rtc_dec2bcd((uint8_t) + ((newtime.tm_year + 1900) % 100))); + + /* WAIT_LOOP */ + + for (i = 0; i < RTC_DUMMY_READ; i++) + { + dummy_word = RTC.RYRCNT.WORD; + } + + RTC.RCR2.BIT.START = 1U; + + rtc_dumpregs("New time setting"); + UNUSED(dummy_word); + UNUSED(dummy_byte); + return OK; +} + +/**************************************************************************** + * Name: rx65n_rtc_getalarmdatetime + * + * Description: + * Get the current date and time for a RTC alarm. + * + * Input Parameters: + * reg - RTC alarm register + * tp - The location to return the high resolution time value. + * + * Returned Value: + * Zero (OK) on success; a negated errno on failure + * + ****************************************************************************/ + +#ifdef CONFIG_RTC_ALARM +static int rx65n_rtc_getalarmdatetime(FAR struct tm *tp) +{ + uint8_t bcd_years; + DEBUGASSERT(tp != NULL) + + tp->tm_sec = rtc_bcd2dec((uint8_t) (RTC.RSECAR.BYTE & 0x7fu)); + tp->tm_min = rtc_bcd2dec((uint8_t) (RTC.RMINAR.BYTE & 0x7fu)); + tp->tm_hour = rtc_bcd2dec((uint8_t) (RTC.RHRAR.BYTE & 0x3fu)); + tp->tm_mday = rtc_bcd2dec(RTC.RDAYAR.BYTE & 0x3fu); + tp->tm_mon = rtc_bcd2dec(RTC.RMONAR.BYTE & 0x1fu) - 1; + + /* Years since 2000 */ + + bcd_years = (uint8_t) RTC.RYRAR.WORD; + + tp->tm_year = rtc_bcd2dec((uint8_t) (bcd_years & 0xff)) + 100; + return 0; +} + +#endif +/**************************************************************************** + * Name: rx65n_rtc_rdalarm + * + * Description: + * Query an alarm configured in hardware. + * + * Input Parameters: + * alminfo - Information about the alarm configuration. + * + * Returned Value: + * Zero (OK) on success; a negated errno on failure + * + ****************************************************************************/ + +#ifdef CONFIG_RTC_ALARM +int rx65n_rtc_rdalarm(FAR struct alm_rdalarm_s *alminfo) +{ + int ret = -EINVAL; + DEBUGASSERT(alminfo != NULL); + ret = rx65n_rtc_getalarmdatetime((struct tm *)alminfo->ar_time); + return ret; +} +#endif + +/**************************************************************************** + * Name: rx65n_rtc_setalarm + * + * Description: + * Set up an alarm. + * + * Input Parameters: + * tp - the time to set the alarm + * callback - the function to call when the alarm expires. + * + * Returned Value: + * Zero (OK) on success; a negated errno on failure + * + ****************************************************************************/ + +#ifdef CONFIG_RTC_ALARM +int rx65n_rtc_setalarm(FAR struct alm_setalarm_s *alminfo) +{ + irqstate_t flags; + uint8_t dummy_byte; + uint8_t dummy_word; + uint8_t i; + int ret = -EBUSY; + + /* Is there already something waiting on the ALARM? */ + + flags = enter_critical_section(); + + /* Save the callback info */ + + g_alarmcb.ac_cb = alminfo->as_cb; + g_alarmcb.ac_arg = alminfo->as_arg; + + IEN(RTC, ALM) = 0U; + + /* Attach the Alarm Interrupt */ + + irq_attach(RX65N_ALM_IRQ, rtc_alm_interrupt, NULL); + + /* Start RTC counter */ + + RTC.RCR2.BIT.START = 1U; + while (1U != RTC.RCR2.BIT.START) + { + /* Wait for the register modification to complete */ + } + + /* Set time */ + + /* Set seconds. (0-59) */ + + RTC.RSECAR.BYTE |= 0x80u; + + /* WAIT_LOOP */ + + for (i = 0; i < RTC_DUMMY_READ; i++) + { + dummy_byte = RTC.RSECAR.BYTE; + } + + RTC.RSECAR.BYTE |= rtc_dec2bcd((uint8_t)alminfo->as_time.tm_sec); + + /* WAIT_LOOP */ + + for (i = 0; i < RTC_DUMMY_READ; i++) + { + dummy_byte = RTC.RSECAR.BYTE; + } + + /* Set minutes (0-59) */ + + RTC.RMINAR.BYTE |= 0x80u; + + /* WAIT_LOOP */ + + for (i = 0; i < RTC_DUMMY_READ; i++) + { + dummy_byte = RTC.RMINAR.BYTE; + } + + RTC.RMINAR.BYTE |= rtc_dec2bcd((uint8_t) alminfo->as_time.tm_min); + + /* WAIT_LOOP */ + + for (i = 0; i < RTC_DUMMY_READ; i++) + { + dummy_byte = RTC.RMINAR.BYTE; + } + + /* Set hours. (0-23) */ + + RTC.RHRAR.BYTE |= 0x80u; + + /* WAIT_LOOP */ + + for (i = 0; i < RTC_DUMMY_READ; i++) + { + dummy_byte = RTC.RHRAR.BYTE; + } + + RTC.RHRAR.BYTE |= rtc_dec2bcd((uint8_t) alminfo->as_time.tm_hour); + + /* WAIT_LOOP */ + + for (i = 0; i < RTC_DUMMY_READ; i++) + { + dummy_byte = RTC.RHRAR.BYTE; + } + + /* Day of the month (1-31) */ + + RTC.RDAYAR.BYTE |= 0x80u; + + /* WAIT_LOOP */ + + for (i = 0; i < RTC_DUMMY_READ; i++) + { + dummy_byte = RTC.RDAYAR.BYTE; + } + + RTC.RDAYAR.BYTE |= rtc_dec2bcd((uint8_t) alminfo->as_time.tm_mday); + + /* WAIT_LOOP */ + + for (i = 0; i < RTC_DUMMY_READ; i++) + { + dummy_byte = RTC.RDAYAR.BYTE; + } + + /* Month. (1-12, 1=January) */ + + RTC.RMONAR.BYTE |= 0x80u; + + /* WAIT_LOOP */ + + for (i = 0; i < RTC_DUMMY_READ; i++) + { + dummy_byte = RTC.RMONAR.BYTE; + } + + RTC.RMONAR.BYTE |= rtc_dec2bcd((uint8_t) ((alminfo->as_time.tm_mon)+ 1)); + + /* WAIT_LOOP */ + + for (i = 0; i < RTC_DUMMY_READ; i++) + { + dummy_byte = RTC.RMONAR.BYTE; + } + + /* Year. (00-99) */ + + RTC.RYRAR.WORD = (uint16_t) (rtc_dec2bcd((uint8_t) + ((alminfo->as_time.tm_year) + 1900))); + + /* WAIT_LOOP */ + + for (i = 0; i < RTC_DUMMY_READ; i++) + { + dummy_word = RTC.RYRAR.WORD; + } + + rtc_dumpregs("New alarm setting"); + + /* Enable RTC ALARM interrupt */ + + RTC.RCR1.BIT.AIE = 1U; + + /* Clear IR flag of ICU ALARM interrupt */ + + IR(RTC, ALM) = 0U; + + /* Enable alarm interrupts */ + + IEN(RTC, ALM) = 1U; + + /* Set Priority of ALM interrupt */ + + IPR(RTC, ALM) = _0F_RTC_PRIORITY_LEVEL15; + ret = OK; + leave_critical_section(flags); + UNUSED(dummy_byte); + UNUSED(dummy_word); + return ret; +} +#endif + +#ifdef CONFIG_RTC_PERIODIC +int rx65n_rtc_setperiodic(FAR const struct timespec *period, + periodiccb_t callback) +{ + irqstate_t flags; + volatile uint8_t regval; + uint8_t prd; + flags = enter_critical_section(); + + /* No.. Save the callback function pointer */ + + g_periodiccb.prd_cb = callback; + prd = period->tv_sec; + + /* Disable ICU PRD interrupt */ + + IEN(RTC, PRD) = 0U; + + /* Clear IR flag of PRD interrupt */ + + IR(RTC, PRD) = 0U; + + /* Set RTC control register 1 */ + + regval = getreg8(RX65N_RTC_RCR1); + regval |= 0x04 | (prd << 4); + rx65n_putreg(regval, RX65N_RTC_RCR1); + + irq_attach(RX65N_PRD_IRQ, rtc_periodic_interrupt, NULL); + + /* Start RTC counter */ + + RTC.RCR2.BIT.START = 1U; + + /* Enable ICU PRD interrupt */ + + IEN(RTC, PRD) = 1U; + + /* Set PRD priority level */ + + IPR(RTC, PRD) = _0F_RTC_PRIORITY_LEVEL15; + return OK; + leave_critical_section(flags); +} +#endif + +#ifdef CONFIG_RX65N_CARRY +void rx65n_rtc_set_carry(carrycb_t callback) +{ + irqstate_t flags; + flags = enter_critical_section(); + + /* No.. Save the callback function pointer */ + + g_carrycb = callback; + + /* Clear IR flag of CUP interrupt */ + + IR(PERIB, INTB176) = 0U; + irq_attach(RX65N_INTB176_IRQ, rtc_carry_interrupt, NULL); + + RTC.RCR2.BIT.START = 1U; + + /* Enable ICU CUP interrupt */ + + IEN(PERIB, INTB176) = 1U; + + /* Set CUP priority level */ + + ICU.SLIBR176.BYTE = 0x31u; + IPR(PERIB, INTB176) = 15; + RTC.RCR1.BIT.CIE = 1U; + + leave_critical_section(flags); +} + +#endif +#ifdef CONFIG_RTC_ALARM +int rx65n_rtc_cancelalarm(void) +{ + irqstate_t flags; + int ret = -ENODATA; + + flags = enter_critical_section(); + + /* Cancel the global callback function */ + + g_alarmcb.ac_cb = NULL; + g_alarmcb.ac_arg = NULL; + + /* Unset the alarm */ + + rx65n_putreg(0x0, RX65N_RTC_RSECAR); + rx65n_putreg(0x0, RX65N_RTC_RMINAR); + rx65n_putreg(0x0, RX65N_RTC_RHRAR); + rx65n_putreg(0x0, RX65N_RTC_RWKAR); + rx65n_putreg(0x0, RX65N_RTC_RDAYAR); + rx65n_putreg(0x0, RX65N_RTC_RMONAR); + rx65n_putreg(0x0, RX65N_RTC_RYRAR); + ret = OK; + + leave_critical_section(flags); + + return ret; +} + +#endif + +#ifdef CONFIG_RTC_PERIODIC +int rx65n_rtc_cancelperiodic(void) +{ + /* Disable ICU PRD interrupt */ + + IEN(RTC, PRD) = 0U; + + /* Clear IR flag of PRD interrupt*/ + + IR(RTC, PRD) = 0U; + + /* Disable RTC PRD interrupt */ + + RTC.RCR1.BIT.PIE = 0U; + while (0U != RTC.RCR1.BIT.PIE) + { + /* Wait for this write to complete.*/ + } + + return OK; +} + +#endif + +#if defined(CONFIG_RX65N_CARRY) + +int rx65n_rtc_cancelcarry(void) +{ + /* Clear IR flag of CUP interrupt*/ + + IR(PERIB, INTB176) = 0U; + + /* Disable ICU CUP interrupt */ + + IEN(PERIB, INTB176) = 0U; + + /* Disable RTC CUP interrupt */ + + RTC.RCR1.BIT.CIE = 0U; + return OK; +} + +#endif +/**************************************************************************** + * Name: up_rtc_getdatetime + * + * Description: + * Get the current date and time from the date/time RTC. This interface + * is only supported by the date/time RTC hardware implementation. + * It is used to replace the system timer. It is only used + * by the RTOS during initialization to set up the system time + * when CONFIG_RTC and CONFIG_RTC_DATETIME + * are selected (and CONFIG_RTC_HIRES is not). + * + * NOTE: Some date/time RTC hardware is capability of sub-second accuracy. + * That sub-second accuracy is lost in this interface. However, + * since the system time is reinitialized on each power-up/reset, + * there will be no timing inaccuracy in the long run. + * + * Input Parameters: + * tp - The location to return the high resolution time value. + * + * Returned Value: + * Zero (OK) on success; a negated errno on failure + * + ****************************************************************************/ + +#ifdef CONFIG_RTC_DATETIME +int up_rtc_getdatetime(FAR struct tm *tp) +{ + uint8_t weekcnt; + uint8_t daycnt; + uint8_t monthcnt; + uint8_t yearcnt; + uint8_t seccnt; + uint8_t mincnt; + uint8_t hrcnt; + uint8_t tmp_week; + uint8_t tmp_day; + uint8_t tmp_month; + uint8_t tmp_year; + uint16_t bcd_years; + uint8_t regval; + + /* Sample the data time registers. There is a race condition here... + * If we sample the time just before midnight on December 31, + * the date could be wrong because the day rolled over while were sampling. + */ + + if (RTC.RCR2.BIT.START == 0) + { + RTC.RCR2.BIT.START = 1; + } + + do + { + weekcnt = getreg8(RX65N_RTC_RWKCNT); + daycnt = getreg8(RX65N_RTC_RDAYCNT); + monthcnt = getreg8(RX65N_RTC_RMONCNT); + yearcnt = getreg8(RX65N_RTC_RYRCNT); + seccnt = getreg8(RX65N_RTC_RSECCNT); + mincnt = getreg8(RX65N_RTC_RMINCNT); + hrcnt = getreg8(RX65N_RTC_RHRCNT); + tmp_week = getreg8(RX65N_RTC_RWKCNT); + tmp_day = getreg8(RX65N_RTC_RDAYCNT); + tmp_month = getreg8(RX65N_RTC_RMONCNT); + tmp_year = getreg8(RX65N_RTC_RYRCNT); + } + + while (tmp_week != weekcnt && tmp_day != daycnt && + tmp_month != monthcnt && tmp_year != yearcnt); + + rtc_dumpregs("Reading Time"); + + /* Convert the RTC time register fields to struct tm format. + * + * struct tm TIMR register + * tm_sec 0-61* SEC (0-59) + * tm_min 0-59 MIN (0-59) + * tm_hour 0-23 HOUR (0-23) + * + * *To allow for leap seconds. But these never actuall happen. + */ + + /* Disable ICU CUP interrupt */ + + up_disable_irq(CONFIG_RX65N_PERIB); + + /* Enable RTC CUP interrupt */ + + regval = getreg8(RX65N_RTC_RCR1); + regval |= (RTC_RCR1_CUP); + rx65n_putreg(regval, RX65N_RTC_RCR1); + + do + { + /* Clear carry flag in ICU */ + + IR(PERIB, INTB176) = 0U; + + /* Read and convert RTC registers; + * mask off unknown bits and hour am/pm. + */ + + /* Seconds. (0-59) */ + + tp->tm_sec = rtc_bcd2dec((uint8_t) (RTC.RSECCNT.BYTE & 0x7fu)); + + /* Minutes. (0-59) */ + + tp->tm_min = rtc_bcd2dec((uint8_t) (RTC.RMINCNT.BYTE & 0x7fu)); + + /* Hours. (0-23) */ + + tp->tm_hour = rtc_bcd2dec((uint8_t) (RTC.RHRCNT.BYTE & 0x3fu)); + + /* Day of the month (1-31) */ + + tp->tm_mday = rtc_bcd2dec(RTC.RDAYCNT.BYTE); + + /* Months since January (0-11) */ + + tp->tm_mon = rtc_bcd2dec(RTC.RMONCNT.BYTE) - 1; + + /* Years since 2000 */ + + bcd_years = (uint16_t) RTC.RYRCNT.WORD; + + /* years years since 1900 (100-199) */ + + tp->tm_year = rtc_bcd2dec((uint8_t) (bcd_years & 0xff)) + 100; + + /* Days since Sunday (0-6) */ + +#if defined(CONFIG_LIBC_LOCALTIME) || defined(CONFIG_TIME_EXTENDED) + tp->tm_wday = (int) (RTC.RWKCNT.BYTE & 0x07u); +#endif + rtc_dumptime(tp, "Returning"); + } + + while (1 == IR(PERIB, INTB176)); + UNUSED(hrcnt); + UNUSED(mincnt); + UNUSED(seccnt); + return OK; +} + +#endif +#endif /* CONFIG_RX65N_RTC */ diff --git a/arch/renesas/src/rx65n/rx65n_rtc.h b/arch/renesas/src/rx65n/rx65n_rtc.h new file mode 100644 index 00000000000..0d63546b5f0 --- /dev/null +++ b/arch/renesas/src/rx65n/rx65n_rtc.h @@ -0,0 +1,246 @@ +/**************************************************************************** + * arch/renesas/src/rx65n/rx65n_rtc.h + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#ifndef __ARCH_RENESAS_SRC_RX65N_RTC_H +#define __ARCH_RENESAS_SRC_RX65N_RTC_H + +#include + +#include "chip.h" +#include "rx65n_definitions.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +#ifndef __ASSEMBLY__ + +#ifdef CONFIG_RTC_ALARM + +/* The form of an alarm callback */ + +typedef CODE void (*alm_callback_t)(FAR void *arg, unsigned int alarmid); + +/* Structure used to pass parameters to set an alarm */ + +struct alm_setalarm_s +{ + int as_id; /* enum alm_id_e */ + struct tm as_time; /* Alarm expiration time */ + alm_callback_t as_cb; /* Callback (if non-NULL) */ + FAR void *as_arg; /* Argument for callback */ +}; + +/* Structure used to pass parameters to query an alarm */ + +struct alm_rdalarm_s +{ + int ar_id; /* enum alm_id_e */ + FAR struct rtc_time *ar_time; /* Argument for storing ALARM RTC time */ +}; + +#endif /* CONFIG_RTC_ALARM */ + +#ifdef CONFIG_RTC_PERIODIC +typedef CODE int (*periodiccb_t)(FAR void *arg, unsigned int alarmid); +#endif + +#ifdef CONFIG_RX65N_CARRY +typedef void (*carrycb_t)(void); +#endif + +/**************************************************************************** + * Public Data + ****************************************************************************/ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +/**************************************************************************** + * Name: rx65n_rtc_setdatetime + * + * Description: + * Set the RTC to the provided time. RTC implementations which provide + * up_rtc_getdatetime() (CONFIG_RTC_DATETIME is selected) should provide + * this function. + * + * Input Parameters: + * tp - the time to use + * + * Returned Value: + * Zero (OK) on success; a negated errno on failure + * + ****************************************************************************/ + +#ifdef CONFIG_RTC_DATETIME +struct tm; +int rx65n_rtc_setdatetime(FAR const struct tm *tp); +#endif + +/**************************************************************************** + * Name: rx65n_rtc_havesettime + * + * Description: + * Check if RTC time has been set. + * + * Returned Value: + * Returns true if RTC date-time have been previously set. + * + ****************************************************************************/ + +bool rx65n_rtc_havesettime(void); + +#ifdef CONFIG_RTC_ALARM +/**************************************************************************** + * Name: rx65n_rtc_setalarm + * + * Description: + * Set an alarm to an absolute time using associated hardware. + * + * Input Parameters: + * alminfo - Information about the alarm configuration. + * + * Returned Value: + * Zero (OK) on success; a negated errno on failure + * + ****************************************************************************/ + +int rx65n_rtc_setalarm(FAR struct alm_setalarm_s *alminfo); + +/**************************************************************************** + * Name: rx65n_rtc_rdalarm + * + * Description: + * Query an alarm configured in hardware. + * + * Input Parameters: + * alminfo - Information about the alarm configuration. + * + * Returned Value: + * Zero (OK) on success; a negated errno on failure + * + ****************************************************************************/ + +int rx65n_rtc_rdalarm(FAR struct alm_rdalarm_s *alminfo); + +/**************************************************************************** + * Name: rx65n_rtc_cancelalarm + * + * Description: + * Cancel an alarm. + * + * Input Parameters: + * alarmid - Identifies the alarm to be cancelled + * + * Returned Value: + * Zero (OK) on success; a negated errno on failure + * + ****************************************************************************/ + +int rx65n_rtc_cancelalarm(void); +#endif /* CONFIG_RTC_ALARM */ + +#ifdef CONFIG_RTC_PERIODIC + +/**************************************************************************** + * Name: rx65n_rtc_setperiodic + * + * Description: + * Set a periodic RTC wakeup + * + * Input Parameters: + * period - Time to sleep between wakeups + * callback - Function to call when the period expires. + * + * Returned Value: + * Zero (OK) on success; a negated errno on failure + * + ****************************************************************************/ + +int rx65n_rtc_setperiodic(FAR const struct timespec *period, + periodiccb_t callback); + +/**************************************************************************** + * Name: rx65n_rtc_cancelperiodic + * + * Description: + * Cancel a periodic wakeup + * + * Input Parameters: + * + * Returned Value: + * Zero (OK) on success; a negated errno on failure + * + ****************************************************************************/ + +int rx65n_rtc_cancelperiodic(void); +#endif /* CONFIG_RTC_PERIODIC */ + +/**************************************************************************** + * Name: rx65n_rtc_lowerhalf + * + * Description: + * Instantiate the RTC lower half driver for the rx65n. General usage: + * + * #include + * #include "rx65n_rtc.h> + * + * struct rtc_lowerhalf_s *lower; + * lower = rx65n_rtc_lowerhalf(); + * rtc_initialize(0, lower); + * + * Input Parameters: + * None + * + * Returned Value: + * On success, a non-NULL RTC lower interface is returned. NULL is + * returned on any failure. + * + ****************************************************************************/ + +#ifdef CONFIG_RTC_DRIVER +struct rtc_lowerhalf_s; +FAR struct rtc_lowerhalf_s *rx65n_rtc_lowerhalf(void); +#endif + +#undef EXTERN +#if defined(__cplusplus) +} +#endif +#endif /* __ASSEMBLY__ */ +#endif /* __ARCH_RENESAS_SRC_RX65N_RTC_H */ diff --git a/arch/renesas/src/rx65n/rx65n_rtc_lowerhalf.c b/arch/renesas/src/rx65n/rx65n_rtc_lowerhalf.c new file mode 100644 index 00000000000..fc137f03c07 --- /dev/null +++ b/arch/renesas/src/rx65n/rx65n_rtc_lowerhalf.c @@ -0,0 +1,736 @@ +/**************************************************************************** + * arch/renesas/src/rx65n/rx65n_rtc_lowerhalf.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include +#include +#include +#include "chip.h" +#include +#include "up_arch.h" + +#ifdef CONFIG_RTC_DRIVER + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +# define rx65n_getreg(addr) getreg8(addr) +# define rx65n_putreg(val,addr) putreg8(val,addr) +# define RX65N_NALARMS 1 +/* Configuration ************************************************************/ + +#if defined(CONFIG_RTC_ALARM) && !defined(CONFIG_SCHED_WORKQUEUE) +# error CONFIG_RTC_ALARM requires CONFIG_SCHED_WORKQUEUE +#endif + +/**************************************************************************** + * Private Types + ****************************************************************************/ + + #ifdef CONFIG_RTC_ALARM +struct rx65n_cbinfo_s +{ + volatile rtc_alarm_callback_t cb; /* Callback when the alarm expires */ + volatile FAR void *priv; /* Private argument to accompany callback */ + uint8_t id; /* Identifies the alarm */ +}; +#endif + +/* This is the private type for the RTC state. It must be cast compatible + * with struct rtc_lowerhalf_s. + */ + +struct rx65n_lowerhalf_s +{ + /* This is the contained reference to the read-only, lower-half + * operations vtable (which may lie in FLASH or ROM) + */ + + FAR const struct rtc_ops_s *ops; + + /* Data following is private to this driver and not visible outside of + * this file. + */ + + sem_t devsem; /* Threads can only exclusively access the RTC */ + +#ifdef CONFIG_RTC_ALARM + /* Alarm callback information */ + + struct rx65n_cbinfo_s cbinfo[RX65N_NALARMS]; +#endif + +#ifdef CONFIG_RTC_PERIODIC + /* Periodic wakeup information */ + + struct lower_setperiodic_s periodic; +#endif +}; + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +/* Prototypes for static methods in struct rtc_ops_s */ + +static int rx65n_rdtime(FAR struct rtc_lowerhalf_s *lower, + FAR struct rtc_time *rtctime); +static int rx65n_settime(FAR struct rtc_lowerhalf_s *lower, + FAR const struct rtc_time *rtctime); +static bool rx65n_havesettime(FAR struct rtc_lowerhalf_s *lower); + +#ifdef CONFIG_RTC_ALARM +static int rx65n_setalarm(FAR struct rtc_lowerhalf_s *lower, + FAR const struct lower_setalarm_s *alarminfo); +static int rx65n_setrelative(FAR struct rtc_lowerhalf_s *lower, + FAR const struct lower_setrelative_s + *alarminfo); +static int rx65n_cancelalarm(FAR struct rtc_lowerhalf_s *lower, + int alarmid); +static int rx65n_rdalarm(FAR struct rtc_lowerhalf_s *lower, + FAR struct lower_rdalarm_s *alarminfo); +#endif + +#ifdef CONFIG_RTC_PERIODIC +static int rx65n_setperiodic(FAR struct rtc_lowerhalf_s *lower, + FAR const struct lower_setperiodic_s + *alarminfo); +static int rx65n_cancelperiodic(FAR struct rtc_lowerhalf_s *lower, int id); +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/* RX65N RTC driver operations */ + +static const struct rtc_ops_s g_rtc_ops = +{ + .rdtime = rx65n_rdtime, + .settime = rx65n_settime, + .havesettime = rx65n_havesettime, +#ifdef CONFIG_RTC_ALARM + .setalarm = rx65n_setalarm, + .setrelative = rx65n_setrelative, + .cancelalarm = rx65n_cancelalarm, + .rdalarm = rx65n_rdalarm, +#endif +#ifdef CONFIG_RTC_PERIODIC + .setperiodic = rx65n_setperiodic, + .cancelperiodic = rx65n_cancelperiodic, +#endif +#ifdef CONFIG_RTC_IOCTL + .ioctl = NULL, +#endif +#ifndef CONFIG_DISABLE_PSEUDOFS_OPERATIONS + .destroy = NULL, +#endif +}; + +/* RX65N RTC device state */ + +static struct rx65n_lowerhalf_s g_rtc_lowerhalf = +{ + .ops = &g_rtc_ops, +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: rx65n_alarm_callback + * + * Description: + * This is the function that is called from the RTC driver when the alarm + * goes off. It just invokes the upper half drivers callback. + * + * Input Parameters: + * None + * + * Returned Value: + * None + * + ****************************************************************************/ + +#ifdef CONFIG_RTC_ALARM +static void rx65n_alarm_callback(FAR void *arg, unsigned int alarmid) +{ + FAR struct rx65n_lowerhalf_s *lower; + FAR struct rx65n_cbinfo_s *cbinfo; + rtc_alarm_callback_t cb; + FAR void *priv; + + DEBUGASSERT(arg != NULL); + + lower = (struct rx65n_lowerhalf_s *)arg; + cbinfo = &lower->cbinfo[alarmid]; + + /* Sample and clear the callback information to minimize the window in + * time in which race conditions can occur. + */ + + cb = (rtc_alarm_callback_t)cbinfo->cb; + priv = (FAR void *)cbinfo->priv; + + cbinfo->cb = NULL; + cbinfo->priv = NULL; + + /* Perform the callback */ + + if (cb != NULL) + { + cb(priv, alarmid); + } +} +#endif /* CONFIG_RTC_ALARM */ + +/**************************************************************************** + * Name: rx65n_rdtime + * + * Description: + * Implements the rdtime() method of the RTC driver interface + * + * Input Parameters: + * lower - A reference to RTC lower half driver state structure + * rtctime - The location in which to return the current RTC time. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned + * on any failure. + * + ****************************************************************************/ + +static int rx65n_rdtime(FAR struct rtc_lowerhalf_s *lower, + FAR struct rtc_time *rtctime) +{ +#if defined(CONFIG_RTC_DATETIME) + /* This operation depends on the fact that struct rtc_time is cast + * compatible with struct tm. + */ + + return up_rtc_getdatetime((FAR struct tm *)rtctime); + +#elif defined(CONFIG_RTC_HIRES) + FAR struct timespec ts; + int ret; + + /* Get the higher resolution time */ + + ret = up_rtc_gettime(&ts); + if (ret < 0) + { + goto errout_with_errno; + } + + /* Convert the one second epoch time to a struct tm. This operation + * depends on the fact that struct rtc_time and struct tm are cast + * compatible. + */ + + if (!gmtime_r(&ts.tv_sec, (FAR struct tm *)rtctime)) + { + goto errout_with_errno; + } + + return OK; + +errout_with_errno: + ret = get_errno(); + DEBUGASSERT(ret > 0); + return -ret; +} + +/**************************************************************************** + * Name: rx65n_settime + * + * Description: + * Implements the settime() method of the RTC driver interface + * + * Input Parameters: + * lower - A reference to RTC lower half driver state structure + * rcttime - The new time to set + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned + * on any failure. + * + ****************************************************************************/ + +static int rx65n_settime(FAR struct rtc_lowerhalf_s *lower, + FAR const struct rtc_time *rtctime) +{ +#ifdef CONFIG_RTC_DATETIME + /* This operation depends on the fact that struct rtc_time is cast + * compatible with struct tm. + */ + + return rx65n_rtc_setdatetime((FAR const struct tm *)rtctime); + +#else + struct timespec ts; + + /* Convert the struct rtc_time to a time_t. Here we assume that struct + * rtc_time is cast compatible with struct tm. + */ + + ts.tv_sec = mktime((FAR struct tm *)rtctime); + ts.tv_nsec = 0; + + /* Now set the time (to one second accuracy) */ + + return up_rtc_settime(&ts); +#endif +} + +/**************************************************************************** + * Name: rx65n_havesettime + * + * Description: + * Implements the havesettime() method of the RTC driver interface + * + * Input Parameters: + * lower - A reference to RTC lower half driver state structure + * + * Returned Value: + * Returns true if RTC date-time have been previously set. + * + ****************************************************************************/ + +static bool rx65n_havesettime(FAR struct rtc_lowerhalf_s *lower) +{ + return true ; +} + +/**************************************************************************** + * Name: rx65n_setalarm + * + * Description: + * Set a new alarm. This function implements the setalarm() method of the + * RTC driver interface + * + * Input Parameters: + * lower - A reference to RTC lower half driver state structure + * alarminfo - Provided information needed to set the alarm + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned + * on any failure. + * + ****************************************************************************/ + +#ifdef CONFIG_RTC_ALARM +static int rx65n_setalarm(FAR struct rtc_lowerhalf_s *lower, + FAR const struct lower_setalarm_s *alarminfo) +{ + FAR struct rx65n_lowerhalf_s *priv; + FAR struct rx65n_cbinfo_s *cbinfo; + struct alm_setalarm_s lowerinfo; + int ret; + + DEBUGASSERT(lower != NULL && alarminfo != NULL && alarminfo->id == 0); + priv = (FAR struct rx65n_lowerhalf_s *)lower; + + ret = nxsem_wait(&priv->devsem); + if (ret < 0) + { + return ret; + } + + ret = -EINVAL; + if (alarminfo->id == 0) + { + cbinfo = &priv->cbinfo[0]; + cbinfo->cb = alarminfo->cb; + cbinfo->priv = alarminfo->priv; + cbinfo->id = alarminfo->id; + + /* Set the alarm */ + + lowerinfo.as_id = alarminfo->id; + lowerinfo.as_cb = rx65n_alarm_callback; + lowerinfo.as_arg = priv; + memcpy(&lowerinfo.as_time, &alarminfo->time, sizeof(struct tm)); + + /* And set the alarm */ + + ret = rx65n_rtc_setalarm(&lowerinfo); + if (ret < 0) + { + cbinfo->cb = NULL; + cbinfo->priv = NULL; + } + } + + nxsem_post(&priv->devsem); + + return ret; +} +#endif + +/**************************************************************************** + * Name: rx65n_setrelative + * + * Description: + * Set a new alarm relative to the current time. This function implements + * the setrelative() method of the RTC driver interface + * + * Input Parameters: + * lower - A reference to RTC lower half driver state structure + * alarminfo - Provided information needed to set the alarm + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned + * on any failure. + * + ****************************************************************************/ + +#ifdef CONFIG_RTC_ALARM +static int rx65n_setrelative(FAR struct rtc_lowerhalf_s *lower, + FAR const struct lower_setrelative_s + *alarminfo) +{ + struct lower_setalarm_s setalarm; + struct tm time; + struct timespec rtc_time; + time_t seconds; + int ret = -EINVAL; + + DEBUGASSERT(lower != NULL && alarminfo != NULL); + + if ((alarminfo->id >= 0) && alarminfo->reltime > 0) + { + /* Disable pre-emption while we do this so that we don't have to worry + * about being suspended and working on an old time. + */ + + sched_lock(); + +#if defined(CONFIG_RTC_DATETIME) + /* Get the broken out time and convert to seconds */ + + ret = up_rtc_getdatetime(&time); + if (ret < 0) + { + sched_unlock(); + return ret; + } + + ts.tv_sec = mktime(&time); + ts.tv_nsec = 0; + +#elif defined(CONFIG_RTC_HIRES) + /* Get the higher resolution time */ + + ret = up_rtc_gettime(&rtc_time); + if (ret >= 0) + { + /* Convert to seconds since the epoch */ + + seconds = mktime(&time); + + /* Add the seconds offset. Add one to the number of seconds + * because we are unsure of the phase of the timer. + */ + + seconds += (alarminfo->reltime + 1); + + /* And convert the time back to broken out format */ + + (void)gmtime_r(&seconds, (FAR struct tm *)&setalarm.time); + + /* The set the alarm using this absolute time */ + + setalarm.id = alarminfo->id; + setalarm.cb = alarminfo->cb; + setalarm.priv = alarminfo->priv; + + ret = rx65n_setalarm(lower, &setalarm); + } +#else + /* The resolution of time is only 1 second */ + + ts.tv_sec = up_rtc_time(); + ts.tv_nsec = 0; +#endif + + /* Remember the callback information */ + + sched_unlock(); + } + + return ret; +} +#endif + +/**************************************************************************** + * Name: rx65n_cancelalarm + * + * Description: + * Cancel the current alarm. This function implements the cancelalarm() + * method of the RTC driver interface + * + * Input Parameters: + * lower - A reference to RTC lower half driver state structure + * alarminfo - Provided information needed to set the alarm + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned + * on any failure. + * + ****************************************************************************/ + +#ifdef CONFIG_RTC_ALARM +static int rx65n_cancelalarm(FAR struct rtc_lowerhalf_s *lower, int alarmid) +{ + FAR struct rx65n_lowerhalf_s *priv; + FAR struct rx65n_cbinfo_s *cbinfo; + + DEBUGASSERT(lower != NULL); + DEBUGASSERT(alarmid == 0); + priv = (FAR struct rx65n_lowerhalf_s *)lower; + + /* Nullify callback information to reduce window for race conditions */ + + cbinfo = &priv->cbinfo[0]; + cbinfo->cb = NULL; + cbinfo->priv = NULL; + + /* Then cancel the alarm */ + + return rx65n_rtc_cancelalarm(); +} +#endif + +/**************************************************************************** + * Name: rx65n_rdalarm + * + * Description: + * Query the RTC alarm. + * + * Input Parameters: + * lower - A reference to RTC lower half driver state structure + * alarminfo - Provided information needed to query the alarm + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned + * on any failure. + * + ****************************************************************************/ + +#ifdef CONFIG_RTC_ALARM +static int rx65n_rdalarm(FAR struct rtc_lowerhalf_s *lower, + FAR struct lower_rdalarm_s *alarminfo) +{ + struct alm_rdalarm_s lowerinfo; + int ret = -EINVAL; + + DEBUGASSERT(lower != NULL && alarminfo != NULL && alarminfo->time != NULL); + if (alarminfo->id >= 0) + { + /* Disable pre-emption while we do this so that we don't have to worry + * about being suspended and working on an old time. + */ + + sched_lock(); + + lowerinfo.ar_id = alarminfo->id; + lowerinfo.ar_time = alarminfo->time; + + ret = rx65n_rtc_rdalarm(&lowerinfo); + + sched_unlock(); + } + + return ret; +} +#endif + +/**************************************************************************** + * Name: rx65n_periodic_callback + * + * Description: + * This is the function that is called from the RTC driver when the periodic + * wakeup goes off. It just invokes the upper half drivers callback. + * + * Input Parameters: + * None + * + * Returned Value: + * None + * + ****************************************************************************/ + +#ifdef CONFIG_RTC_PERIODIC +static int rx65n_periodic_callback(void) +{ + FAR struct rx65n_lowerhalf_s *lower; + struct lower_setperiodic_s *cbinfo; + periodiccb_t cb; + FAR void *priv; + + lower = (FAR struct rx65n_lowerhalf_s *)&g_rtc_lowerhalf; + + cbinfo = &lower->periodic; + cb = (periodiccb_t)cbinfo->cb; + priv = (FAR void *)cbinfo->priv; + + /* Perform the callback */ + + if (cb != NULL) + { + cb(priv, 0); + } + + return OK; +} +#endif /* CONFIG_RTC_PERIODIC */ + +/**************************************************************************** + * Name: rx65n_setperiodic + * + * Description: + * Set a new periodic wakeup relative to the current time, with a given + * period. This function implements the setperiodic() method of the RTC + * driver interface + * + * Input Parameters: + * lower - A reference to RTC lower half driver state structure + * alarminfo - Provided information needed to set the wakeup activity + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned + * on any failure. + * + ****************************************************************************/ + +#ifdef CONFIG_RTC_PERIODIC +static int rx65n_setperiodic(FAR struct rtc_lowerhalf_s *lower, + FAR const struct lower_setperiodic_s + *alarminfo) +{ + FAR struct rx65n_lowerhalf_s *priv; + int ret; + + DEBUGASSERT(lower != NULL && alarminfo != NULL); + priv = (FAR struct rx65n_lowerhalf_s *)lower; + + ret = nxsem_wait(&priv->devsem); + if (ret < 0) + { + return ret; + } + + memcpy(&priv->periodic, alarminfo, sizeof(struct lower_setperiodic_s)); + + ret = rx65n_rtc_setperiodic(&alarminfo->period, + (periodiccb_t)rx65n_periodic_callback); + + nxsem_post(&priv->devsem); + + return ret; +} +#endif + +/**************************************************************************** + * Name: rx65n_cancelperiodic + * + * Description: + * Cancel the current periodic wakeup activity. This function implements + * the cancelperiodic() method of the RTC driver interface + * + * Input Parameters: + * lower - A reference to RTC lower half driver state structure + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned + * on any failure. + * + ****************************************************************************/ + +#ifdef CONFIG_RTC_PERIODIC +static int rx65n_cancelperiodic(FAR struct rtc_lowerhalf_s *lower, int id) +{ + FAR struct rx65n_lowerhalf_s *priv; + int ret; + + DEBUGASSERT(lower != NULL); + priv = (FAR struct rx65n_lowerhalf_s *)lower; + + DEBUGASSERT(id == 0); + + ret = nxsem_wait(&priv->devsem); + if (ret < 0) + { + return ret; + } + + ret = rx65n_rtc_cancelperiodic(); + + nxsem_post(&priv->devsem); + + return ret; +} +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: rx65n_rtc_lowerhalf + * + * Description: + * Instantiate the RTC lower half driver for the RX65N. General usage: + * + * #include + * #include "rx65n_rtc.h> + * + * struct rtc_lowerhalf_s *lower; + * lower = rx65n_rtc_lowerhalf(); + * rtc_initialize(0, lower); + * + * Input Parameters: + * None + * + * Returned Value: + * On success, a non-NULL RTC lower interface is returned. NULL is + * returned on any failure. + * + ****************************************************************************/ + +FAR struct rtc_lowerhalf_s *rx65n_rtc_lowerhalf(void) +{ + nxsem_init(&g_rtc_lowerhalf.devsem, 0, 1); + + return (FAR struct rtc_lowerhalf_s *)&g_rtc_lowerhalf; +} + +#endif /* CONFIG_RTC_DRIVER */ +#endif diff --git a/arch/renesas/src/rx65n/rx65n_schedulesigaction.c b/arch/renesas/src/rx65n/rx65n_schedulesigaction.c index 0675aa9d19d..153c09e6c0e 100644 --- a/arch/renesas/src/rx65n/rx65n_schedulesigaction.c +++ b/arch/renesas/src/rx65n/rx65n_schedulesigaction.c @@ -1,35 +1,20 @@ /**************************************************************************** * arch/renesas/src/rx65n/rx65n_schedulesigaction.c * - * Copyright (C) 2008-2019 Gregory Nutt. All rights reserved. - * Author: Anjana + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ @@ -51,7 +36,7 @@ #include "up_arch.h" /**************************************************************************** - * Public Funictions + * Public Functions ****************************************************************************/ /**************************************************************************** diff --git a/arch/renesas/src/rx65n/rx65n_sci.c b/arch/renesas/src/rx65n/rx65n_sci.c index c82e68a99e6..cae59cd59b1 100644 --- a/arch/renesas/src/rx65n/rx65n_sci.c +++ b/arch/renesas/src/rx65n/rx65n_sci.c @@ -1,35 +1,20 @@ /**************************************************************************** * arch/renesas/src/rx65n/rx65n_sci.c * - * Copyright (C) 2008-2019 Gregory Nutt. All rights reserved. - * Author: Anjana + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ @@ -1529,6 +1514,7 @@ MD_STATUS r_sci5_serial_receive(uint8_t * const rx_buf, uint16_t rx_num) SCI5.SCR.BIT.RE = 1u; return OK; } + /**************************************************************************** * Name: r_sci5_serial_send * @@ -2177,6 +2163,7 @@ MD_STATUS r_sci10_serial_receive(uint8_t * const rx_buf, uint16_t rx_num) SCI10.SCR.BIT.RE = 1u; return OK; } + /**************************************************************************** * Name: r_sci10_serial_send * diff --git a/arch/renesas/src/rx65n/rx65n_serial.c b/arch/renesas/src/rx65n/rx65n_serial.c index 40b22cd220f..c2e76040c00 100644 --- a/arch/renesas/src/rx65n/rx65n_serial.c +++ b/arch/renesas/src/rx65n/rx65n_serial.c @@ -1,37 +1,22 @@ /**************************************************************************** * arch/renesas/src/rx65n/rx65n_serial.c * - * Copyright (C) 2008-2019 Gregory Nutt. All rights reserved. - * Author: Anjana + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ***************************************************************************/ + ****************************************************************************/ /**************************************************************************** * Included Files @@ -306,7 +291,7 @@ static void up_txint(struct uart_dev_s *dev, bool enable); static bool up_txready(struct uart_dev_s *dev); /**************************************************************************** - * Public Function Prototypes + * Public Functions ****************************************************************************/ void up_enable_irq(int irq); @@ -409,15 +394,17 @@ static struct up_dev_s g_sci0priv = static uart_dev_t g_sci0port = { .recv = - { - .size = CONFIG_SCI0_RXBUFSIZE, - .buffer = g_sci0rxbuffer, - }, + { + .size = CONFIG_SCI0_RXBUFSIZE, + .buffer = g_sci0rxbuffer, + }, + .xmit = - { - .size = CONFIG_SCI0_TXBUFSIZE, - .buffer = g_sci0txbuffer, - }, + { + .size = CONFIG_SCI0_TXBUFSIZE, + .buffer = g_sci0txbuffer, + }, + .ops = &g_sci_ops, .priv = &g_sci0priv, }; @@ -443,15 +430,17 @@ static struct up_dev_s g_sci1priv = static uart_dev_t g_sci1port = { .recv = - { - .size = CONFIG_SCI1_RXBUFSIZE, - .buffer = g_sci1rxbuffer, - }, + { + .size = CONFIG_SCI1_RXBUFSIZE, + .buffer = g_sci1rxbuffer, + }, + .xmit = - { - .size = CONFIG_SCI1_TXBUFSIZE, - .buffer = g_sci1txbuffer, - }, + { + .size = CONFIG_SCI1_TXBUFSIZE, + .buffer = g_sci1txbuffer, + }, + .ops = &g_sci_ops, .priv = &g_sci1priv, }; @@ -477,15 +466,17 @@ static struct up_dev_s g_sci2priv = static uart_dev_t g_sci2port = { .recv = - { - .size = CONFIG_SCI2_RXBUFSIZE, - .buffer = g_sci2rxbuffer, - }, + { + .size = CONFIG_SCI2_RXBUFSIZE, + .buffer = g_sci2rxbuffer, + }, + .xmit = - { - .size = CONFIG_SCI2_TXBUFSIZE, - .buffer = g_sci2txbuffer, - }, + { + .size = CONFIG_SCI2_TXBUFSIZE, + .buffer = g_sci2txbuffer, + }, + .ops = &g_sci_ops, .priv = &g_sci2priv, }; @@ -511,15 +502,17 @@ static struct up_dev_s g_sci3priv = static uart_dev_t g_sci3port = { .recv = - { - .size = CONFIG_SCI3_RXBUFSIZE, - .buffer = g_sci3rxbuffer, - }, + { + .size = CONFIG_SCI3_RXBUFSIZE, + .buffer = g_sci3rxbuffer, + }, + .xmit = - { - .size = CONFIG_SCI3_TXBUFSIZE, - .buffer = g_sci3txbuffer, - }, + { + .size = CONFIG_SCI3_TXBUFSIZE, + .buffer = g_sci3txbuffer, + }, + .ops = &g_sci_ops, .priv = &g_sci3priv, }; @@ -545,15 +538,17 @@ static struct up_dev_s g_sci4priv = static uart_dev_t g_sci4port = { .recv = - { - .size = CONFIG_SCI4_RXBUFSIZE, - .buffer = g_sci4rxbuffer, - }, + { + .size = CONFIG_SCI4_RXBUFSIZE, + .buffer = g_sci4rxbuffer, + }, + .xmit = - { - .size = CONFIG_SCI4_TXBUFSIZE, - .buffer = g_sci4txbuffer, - }, + { + .size = CONFIG_SCI4_TXBUFSIZE, + .buffer = g_sci4txbuffer, + }, + .ops = &g_sci_ops, .priv = &g_sci4priv, }; @@ -579,15 +574,17 @@ static struct up_dev_s g_sci5priv = static uart_dev_t g_sci5port = { .recv = - { - .size = CONFIG_SCI5_RXBUFSIZE, - .buffer = g_sci5rxbuffer, - }, + { + .size = CONFIG_SCI5_RXBUFSIZE, + .buffer = g_sci5rxbuffer, + }, + .xmit = - { - .size = CONFIG_SCI5_TXBUFSIZE, - .buffer = g_sci5txbuffer, - }, + { + .size = CONFIG_SCI5_TXBUFSIZE, + .buffer = g_sci5txbuffer, + }, + .ops = &g_sci_ops, .priv = &g_sci5priv, }; @@ -613,15 +610,17 @@ static struct up_dev_s g_sci6priv = static uart_dev_t g_sci6port = { .recv = - { - .size = CONFIG_SCI6_RXBUFSIZE, - .buffer = g_sci6rxbuffer, - }, + { + .size = CONFIG_SCI6_RXBUFSIZE, + .buffer = g_sci6rxbuffer, + }, + .xmit = - { - .size = CONFIG_SCI6_TXBUFSIZE, - .buffer = g_sci6txbuffer, - }, + { + .size = CONFIG_SCI6_TXBUFSIZE, + .buffer = g_sci6txbuffer, + }, + .ops = &g_sci_ops, .priv = &g_sci6priv, }; @@ -647,15 +646,17 @@ static struct up_dev_s g_sci7priv = static uart_dev_t g_sci7port = { .recv = - { - .size = CONFIG_SCI7_RXBUFSIZE, - .buffer = g_sci7rxbuffer, - }, + { + .size = CONFIG_SCI7_RXBUFSIZE, + .buffer = g_sci7rxbuffer, + }, + .xmit = - { - .size = CONFIG_SCI7_TXBUFSIZE, - .buffer = g_sci7txbuffer, - }, + { + .size = CONFIG_SCI7_TXBUFSIZE, + .buffer = g_sci7txbuffer, + }, + .ops = &g_sci_ops, .priv = &g_sci7priv, }; @@ -670,7 +671,7 @@ static struct up_dev_s g_sci8priv = .xmitirq = RX65N_TXI8_IRQ, .eriirq = RX65N_ERI8_IRQ, .teiirq = RX65N_TEI8_IRQ, - .grpibase = RX65N_GRPBL6_ADDR, + .grpibase = RX65N_GRPBL1_ADDR, .erimask = RX65N_GRPBL1_ERI8_MASK, .teimask = RX65N_GRPBL1_TEI8_MASK, .parity = CONFIG_SCI8_PARITY, @@ -681,15 +682,17 @@ static struct up_dev_s g_sci8priv = static uart_dev_t g_sci8port = { .recv = - { - .size = CONFIG_SCI8_RXBUFSIZE, - .buffer = g_sci8rxbuffer, - }, + { + .size = CONFIG_SCI8_RXBUFSIZE, + .buffer = g_sci8rxbuffer, + }, + .xmit = - { - .size = CONFIG_SCI8_TXBUFSIZE, - .buffer = g_sci8txbuffer, - }, + { + .size = CONFIG_SCI8_TXBUFSIZE, + .buffer = g_sci8txbuffer, + }, + .ops = &g_sci_ops, .priv = &g_sci8priv, }; @@ -715,15 +718,17 @@ static struct up_dev_s g_sci9priv = static uart_dev_t g_sci9port = { .recv = - { - .size = CONFIG_SCI9_RXBUFSIZE, - .buffer = g_sci9rxbuffer, - }, + { + .size = CONFIG_SCI9_RXBUFSIZE, + .buffer = g_sci9rxbuffer, + }, + .xmit = - { - .size = CONFIG_SCI9_TXBUFSIZE, - .buffer = g_sci9txbuffer, - }, + { + .size = CONFIG_SCI9_TXBUFSIZE, + .buffer = g_sci9txbuffer, + }, + .ops = &g_sci_ops, .priv = &g_sci9priv, }; @@ -749,15 +754,17 @@ static struct up_dev_s g_sci10priv = static uart_dev_t g_sci10port = { .recv = - { - .size = CONFIG_SCI10_RXBUFSIZE, - .buffer = g_sci10rxbuffer, - }, + { + .size = CONFIG_SCI10_RXBUFSIZE, + .buffer = g_sci10rxbuffer, + }, + .xmit = - { - .size = CONFIG_SCI10_TXBUFSIZE, - .buffer = g_sci10txbuffer, - }, + { + .size = CONFIG_SCI10_TXBUFSIZE, + .buffer = g_sci10txbuffer, + }, + .ops = &g_sci_ops, .priv = &g_sci10priv, }; @@ -783,15 +790,17 @@ static struct up_dev_s g_sci11priv = static uart_dev_t g_sci11port = { .recv = - { - .size = CONFIG_SCI11_RXBUFSIZE, - .buffer = g_sci11rxbuffer, - }, + { + .size = CONFIG_SCI11_RXBUFSIZE, + .buffer = g_sci11rxbuffer, + }, + .xmit = - { - .size = CONFIG_SCI11_TXBUFSIZE, - .buffer = g_sci11txbuffer, - }, + { + .size = CONFIG_SCI11_TXBUFSIZE, + .buffer = g_sci11txbuffer, + }, + .ops = &g_sci_ops, .priv = &g_sci11priv, }; @@ -817,15 +826,17 @@ static struct up_dev_s g_sci12priv = static uart_dev_t g_sci12port = { .recv = - { - .size = CONFIG_SCI12_RXBUFSIZE, - .buffer = g_sci12rxbuffer, - }, + { + .size = CONFIG_SCI12_RXBUFSIZE, + .buffer = g_sci12rxbuffer, + }, + .xmit = - { - .size = CONFIG_SCI12_TXBUFSIZE, - .buffer = g_sci12txbuffer, - }, + { + .size = CONFIG_SCI12_TXBUFSIZE, + .buffer = g_sci12txbuffer, + }, + .ops = &g_sci_ops, .priv = &g_sci12priv, }; @@ -1429,6 +1440,7 @@ static void up_txint(struct uart_dev_s *dev, bool enable) * in this event, priv->scr should hold the correct value upon * return from uuart_xmitchars(). */ + uart_xmitchars(dev); } } diff --git a/arch/renesas/src/rx65n/rx65n_vector_table.c b/arch/renesas/src/rx65n/rx65n_vector_table.c index 2a3f897172e..05b6e2785c7 100644 --- a/arch/renesas/src/rx65n/rx65n_vector_table.c +++ b/arch/renesas/src/rx65n/rx65n_vector_table.c @@ -1,37 +1,22 @@ /**************************************************************************** * arch/renesas/src/rx65n/rx65n_vector_table.c * - * Copyright (C) 2008-2019 Gregory Nutt. All rights reserved. - * Author: Anjana + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ***************************************************************************/ + ****************************************************************************/ /**************************************************************************** * Included Files @@ -181,6 +166,7 @@ void r_access_exception(void) __asm("nop"); #endif } + /**************************************************************************** * Name: r_floatingpoint_exception * diff --git a/boards/renesas/rx65n/rx65n-grrose/README.txt b/boards/renesas/rx65n/rx65n-grrose/README.txt index 2942d1d732a..f1734ac2276 100644 --- a/boards/renesas/rx65n/rx65n-grrose/README.txt +++ b/boards/renesas/rx65n/rx65n-grrose/README.txt @@ -11,6 +11,8 @@ Contents - Serial Console - LEDs - Networking + + - RTC - Debugging Board Features @@ -219,6 +221,22 @@ Configure UDP blaster application as mentioned below : CONFIG_EXAMPLES_UDPBLASTER_HOSTIP=0x0a4b1801 (10.75.24.1) ------> Gateway IP CONFIG_EXAMPLES_UDPBLASTER_NETMASK=0xfffffe00 (255.255.254.0) --------> Netmask CONFIG_EXAMPLES_UDPBLASTER_TARGETIP=0x0a4b189b (10.75.24.155) ---------> Target IP +RTC +========== + +NuttX Configurations +--------------- +The configurations listed in Renesas_RX65N_NuttX_RTC_Design.doc need to be enabled. + +RTC Testing +------------------ +The test cases mentioned in Renesas_RX65N_RTC_Test_Cases.xls are to be executed +as part of RTC testing. + +The following configurations are to be enabled as part of testing RTC examples. +CONFIG_EXAMPLES_ALARM +CONFIG_EXAMPLES_PERIODIC +CONFIG_EXAMPLES_CARRY Debugging ========== @@ -252,3 +270,8 @@ endif Select Motorola SREC format. 4. Download Renesas flash programmer tool from https://www.renesas.com/in/en/products/software-tools/tools/programmer/renesas-flash-programmer-programming-gui.html#downloads 5. Refer to the user manual document, for steps to flash NuttX binary using RFP tool. +Changes Made in NuttX 8.2 Code +================================ +1. In wd_start.c file, in function wd_expiration(), typecasting is done when the signal handler nxsig_timeout() is invoked. +2. In rtc.c, (drivers/timers/rtc.c) file, in function rtc_periodic_callback(), alarminfo->active = false is commented. +The reason being, periodic interrupt should not be disabled. Uncommenting the above mentioned line (alarminfo->active = false), will make the periodic interrupt come only once. diff --git a/boards/renesas/rx65n/rx65n-grrose/configs/netnsh/defconfig b/boards/renesas/rx65n/rx65n-grrose/configs/netnsh/defconfig index b1400ad1972..935c8ea8abe 100644 --- a/boards/renesas/rx65n/rx65n-grrose/configs/netnsh/defconfig +++ b/boards/renesas/rx65n/rx65n-grrose/configs/netnsh/defconfig @@ -5,58 +5,72 @@ # You can then do "make savedefconfig" to generate a new defconfig file that includes your # modifications. # -CONFIG_ARCH="renesas" -CONFIG_ARCH_BOARD="rx65n-grrose" CONFIG_ARCH_BOARD_RX65N_GRROSE=y -CONFIG_ARCH_CHIP="rx65n" +CONFIG_ARCH_BOARD="rx65n-grrose" CONFIG_ARCH_CHIP_R5F565NEHDFP=y -CONFIG_ARCH_INTERRUPTSTACK=1024 CONFIG_ARCH_RENESAS=y CONFIG_ARCH_STACKDUMP=y +CONFIG_ARCH="renesas" +CONFIG_ARCH_CHIP="rx65n" CONFIG_BOARD_LOOPSPERMSEC=15001 -CONFIG_BUILTIN=y -CONFIG_DEBUG_FEATURES=y -CONFIG_EXAMPLES_SERIALBLASTER=y -CONFIG_EXAMPLES_SERIALRX=y -CONFIG_EXAMPLES_SERIALRX_PRINTSTR=y -CONFIG_EXAMPLES_SERIALRX_PRIORITY=75 -CONFIG_FS_PROCFS=y -CONFIG_FS_PROCFS_REGISTER=y -CONFIG_MAX_TASKS=8 CONFIG_MOTOROLA_SREC=y +CONFIG_ENDIAN_LITTLE=y +CONFIG_SYSTEM_NSH=y +CONFIG_MAX_TASKS=8 +CONFIG_DEBUG_FEATURES=y +CONFIG_ARCH_INTERRUPTSTACK=1024 +CONFIG_BUILTIN=y +CONFIG_ETH0_PHY_LAN8720A=y CONFIG_NET=y CONFIG_NETDB_DNSCLIENT=y CONFIG_NETDB_DNSSERVER_NOADDR=y CONFIG_NETDEV_PHY_IOCTL=y CONFIG_NETDEV_STATISTICS=y -CONFIG_NETINIT_DHCPC=y -CONFIG_NETUTILS_DHCPC=y -CONFIG_NETUTILS_DHCPD=y CONFIG_NETUTILS_TFTPC=y CONFIG_NETUTILS_WEBCLIENT=y CONFIG_NET_ARP_SEND=y CONFIG_NET_BROADCAST=y CONFIG_NET_ICMP=y CONFIG_NET_ICMP_SOCKET=y +CONFIG_NET_SOCKOPTS=y CONFIG_NET_STATISTICS=y CONFIG_NET_TCP=y CONFIG_NET_TCPBACKLOG=y CONFIG_NET_TCP_WRITE_BUFFERS=y CONFIG_NET_UDP=y +CONFIG_NSH_BUILTIN_APPS=y CONFIG_NFILE_DESCRIPTORS=8 CONFIG_NFILE_STREAMS=8 -CONFIG_NSH_BUILTIN_APPS=y CONFIG_NSH_FILEIOSIZE=512 CONFIG_NSH_LINELEN=64 CONFIG_NSH_READLINE=y CONFIG_NUNGET_CHARS=0 CONFIG_PREALLOC_TIMERS=0 CONFIG_PTHREAD_STACK_DEFAULT=1024 -CONFIG_RAM_SIZE=655360 +CONFIG_RAM_SIZE=262144 CONFIG_RAM_START=0x00000000 CONFIG_RAW_BINARY=y +CONFIG_RX65N_SCI0=y +CONFIG_RX65N_SCI1=y +CONFIG_RX65N_SCI2=y +CONFIG_RX65N_SCI5=y +CONFIG_RX65N_SCI6=y +CONFIG_RX65N_SCI8=y +CONFIG_SCI0_SERIALDRIVER=y +CONFIG_SCI0_BAUD=115200 +CONFIG_SCI1_SERIAL_CONSOLE=y +CONFIG_SCI1_SERIALDRIVER=y +CONFIG_SCI1_BAUD=115200 +CONFIG_SCI2_SERIALDRIVER=y +CONFIG_SCI2_BAUD=115200 +CONFIG_SCI5_SERIALDRIVER=y +CONFIG_SCI5_BAUD=921600 +CONFIG_SCI6_SERIALDRIVER=y +CONFIG_SCI6_BAUD=115200 +CONFIG_SCI8_SERIALDRIVER=y +CONFIG_SCI8_BAUD=115200 +CONFIG_RX65N_EMAC=y CONFIG_RX65N_EMAC0=y -CONFIG_RX65N_EMAC0_PHYADDR=0 CONFIG_RX65N_EMAC0_PHYSR=30 CONFIG_RX65N_EMAC0_PHYSR_100FD=0x18 CONFIG_RX65N_EMAC0_PHYSR_100HD=0x08 @@ -65,16 +79,42 @@ CONFIG_RX65N_EMAC0_PHYSR_10HD=0x04 CONFIG_RX65N_EMAC0_PHYSR_ALTCONFIG=y CONFIG_RX65N_EMAC0_PHYSR_ALTMODE=0x1c CONFIG_RX65N_EMAC0_RMII=y -CONFIG_RX65N_SCI0=y +CONFIG_RX65N_EMAC0_PHYADDR=0 +CONFIG_SCHED_WORKQUEUE=y CONFIG_SCHED_HPWORK=y CONFIG_SCHED_LPWORK=y -CONFIG_SCI1_SERIAL_CONSOLE=y -CONFIG_SCI5_BAUD=921600 CONFIG_SDCLONE_DISABLE=y -CONFIG_STDIO_DISABLE_BUFFERING=y -CONFIG_SYSTEM_NSH=y -CONFIG_SYSTEM_NSH_PRIORITY=50 CONFIG_SYSTEM_PING=y +CONFIG_ICU=y +CONFIG_STDIO_DISABLE_BUFFERING=y CONFIG_TASK_NAME_SIZE=0 -CONFIG_USERMAIN_STACKSIZE=1024 CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_USERMAIN_STACKSIZE=1024 +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_FS_PROCFS=y +CONFIG_FS_PROCFS_REGISTER=y +CONFIG_NET_ETH_PKTSIZE = 590 +CONFIG_RX65N_CMTW0=y +CONFIG_RX65N_PERIB=y +CONFIG_NETUTILS_DHCPC=y +CONFIG_NETUTILS_DHCPD=y +CONFIG_NSH_DHCPC=y +CONFIG_NETINIT_DHCPC=y +CONFIG_SYSTEM_NSH_PRIORITY=50 +CONFIG_EXAMPLES_SERIALBLASTER=y +CONFIG_EXAMPLES_SERIALBLASTER_STACKSIZE=2048 +CONFIG_EXAMPLES_SERIALBLASTER_PRIORITY=50 +CONFIG_EXAMPLES_SERIALBLASTER_DEVPATH="/dev/ttyS2" +CONFIG_EXAMPLES_SERIALRX=y +CONFIG_EXAMPLES_SERIALRX_STACKSIZE=2048 +CONFIG_EXAMPLES_SERIALRX_PRIORITY=75 +CONFIG_EXAMPLES_SERIALRX_BUFSIZE=11520 +CONFIG_EXAMPLES_SERIALRX_DEVPATH="/dev/ttyS0" +CONFIG_EXAMPLES_SERIALRX_PRINTSTR=y +CONFIG_RTC=y +CONFIG_RTC_HIRES=y +CONFIG_RTC_ALARM=y +CONFIG_RX65N_RTC=y +CONFIG_RX65N_CARRY=y +CONFIG_RTC_DRIVER=y +CONFIG_NSH_ARCHINIT=y \ No newline at end of file diff --git a/boards/renesas/rx65n/rx65n-grrose/configs/nsh/defconfig b/boards/renesas/rx65n/rx65n-grrose/configs/nsh/defconfig index 32883e5f2bb..d7120f61e9e 100644 --- a/boards/renesas/rx65n/rx65n-grrose/configs/nsh/defconfig +++ b/boards/renesas/rx65n/rx65n-grrose/configs/nsh/defconfig @@ -5,22 +5,24 @@ # You can then do "make savedefconfig" to generate a new defconfig file that includes your # modifications. # -CONFIG_ARCH="renesas" -CONFIG_ARCH_BOARD="rx65n-grrose" CONFIG_ARCH_BOARD_RX65N_GRROSE=y -CONFIG_ARCH_CHIP="rx65n" +CONFIG_ARCH_BOARD="rx65n-grrose" CONFIG_ARCH_CHIP_R5F565NEHDFP=y -CONFIG_ARCH_INTERRUPTSTACK=1024 CONFIG_ARCH_RENESAS=y CONFIG_ARCH_STACKDUMP=y +CONFIG_ARCH="renesas" +CONFIG_ARCH_CHIP="rx65n" CONFIG_BOARD_LOOPSPERMSEC=15001 -CONFIG_BUILTIN=y -CONFIG_DEBUG_FEATURES=y -CONFIG_MAX_TASKS=8 CONFIG_MOTOROLA_SREC=y +CONFIG_ENDIAN_LITTLE=y +CONFIG_SYSTEM_NSH=y +CONFIG_MAX_TASKS=8 +CONFIG_DEBUG_FEATURES=y +CONFIG_ARCH_INTERRUPTSTACK=1024 +CONFIG_BUILTIN=y +CONFIG_NSH_BUILTIN_APPS=y CONFIG_NFILE_DESCRIPTORS=8 CONFIG_NFILE_STREAMS=8 -CONFIG_NSH_BUILTIN_APPS=y CONFIG_NSH_FILEIOSIZE=512 CONFIG_NSH_LINELEN=64 CONFIG_NSH_READLINE=y @@ -31,10 +33,29 @@ CONFIG_RAM_SIZE=655360 CONFIG_RAM_START=0x00000000 CONFIG_RAW_BINARY=y CONFIG_RX65N_SCI0=y +CONFIG_RX65N_SCI1=y +CONFIG_RX65N_SCI2=y +CONFIG_RX65N_SCI5=y +CONFIG_RX65N_SCI6=y +CONFIG_RX65N_SCI8=y +CONFIG_SCI0_SERIALDRIVER=y +CONFIG_SCI0_BAUD=115200 CONFIG_SCI1_SERIAL_CONSOLE=y +CONFIG_SCI1_SERIALDRIVER=y +CONFIG_SCI1_BAUD=115200 +CONFIG_SCI2_SERIALDRIVER=y +CONFIG_SCI2_BAUD=115200 +CONFIG_SCI5_SERIALDRIVER=y +CONFIG_SCI5_BAUD=115200 +CONFIG_SCI6_SERIALDRIVER=y +CONFIG_SCI6_BAUD=115200 +CONFIG_SCI8_SERIALDRIVER=y +CONFIG_SCI8_BAUD=115200 CONFIG_SDCLONE_DISABLE=y +CONFIG_ICU=y CONFIG_STDIO_DISABLE_BUFFERING=y -CONFIG_SYSTEM_NSH=y CONFIG_TASK_NAME_SIZE=0 -CONFIG_USERMAIN_STACKSIZE=1024 CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_USERMAIN_STACKSIZE=1024 +CONFIG_IDLETHREAD_STACKSIZE=1024 + diff --git a/boards/renesas/rx65n/rx65n-grrose/include/README.TXT b/boards/renesas/rx65n/rx65n-grrose/include/README.TXT new file mode 100644 index 00000000000..276276be396 --- /dev/null +++ b/boards/renesas/rx65n/rx65n-grrose/include/README.TXT @@ -0,0 +1,89 @@ +README +====== + + Overview + -------- + This directory contains logic to support a custom ROMFS start-up script. + This startup script is used by by the NSH when it starts provided that + CONFIG_NSH_ARCHROMFS=y. The script provides a ROMFS volume that will be + mounted at /etc and will look like this at run-time: + + NuttShell (NSH) NuttX-8.2 + nsh> ls -l /etc + /etc: + dr-xr-xr-x 0 . + -r--r--r-- 20 group + dr-xr-xr-x 0 init.d/ + -r--r--r-- 35 passwd + /etc/init.d: + dr-xr-xr-x 0 .. + -r--r--r-- 110 rcS + nsh> + + /etc/init.d/rcS is the start-up script; /etc/passwd is a the password + file. It supports a single user: + + USERNAME: admin + PASSWORD: Adminstrator + + nsh> cat /etc/passwd + admin:8Tv+Hbmr3pLddSjtzL0kwC:0:0:/ + + The encrypted passwords in the provided passwd file are only valid if the + TEA key is set to: 012345678 9abcdef0 012345678 9abcdef0. Changes to either + the key or the password word will require regeneration of the nsh_romfimg.h + header file. + + The format of the password file is: + + user:x:uid:gid:home + + Where: + user: User name + x: Encrypted password + uid: User ID (0 for now) + gid: Group ID (0 for now) + home: Login directory (/ for now) + + /etc/group is a group file. It is not currently used. + + nsh> cat /etc/group + root:*:0:root,admin + + The format of the group file is: + + group:x:gid:users + + Where: + group: The group name + x: Group password + gid: Group ID + users: A comma separated list of members of the group + + /etc/init.d/rcS should have the following contents : + vi rcS + echo "This is NuttX" + + Updating the ROMFS File System + ------------------------------ + The content on the nsh_romfsimg.h header file is generated from a sample + directory structure. That directory structure is contained in the etc/ directory and can be modified per the following steps: + + + 1. Change directory to etc/: + + cd etc/ + + 2. Make modifications as desired. + + 3. Create the new ROMFS image. + + genromfs -f romfs_img -d etc -V SimEtcVol + + 4. Convert the ROMFS image to a C header file + + xxd -i romfs_img >nsh_romfsimg.h + + 5. Edit nsh_romfsimg.h, mark both data definitions as 'const' so that + that will be stored in FLASH. + diff --git a/boards/renesas/rx65n/rx65n-grrose/include/board.h b/boards/renesas/rx65n/rx65n-grrose/include/board.h index 2c40898f4b6..6c66de88943 100644 --- a/boards/renesas/rx65n/rx65n-grrose/include/board.h +++ b/boards/renesas/rx65n/rx65n-grrose/include/board.h @@ -1,44 +1,29 @@ -/*************************************************************************** +/**************************************************************************** * boards/renesas/rx65n/rx65n-grrose/include/board.h * - * Copyright (C) 2008-2019 Gregory Nutt. All rights reserved. - * Author: Anjana + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ***************************************************************************/ + ****************************************************************************/ #ifndef __BOARDS_RENESAS_RX65N_RX65N_GRROSE_INCLUDE_BOARD_H #define __BOARDS_RENESAS_RX65N_RX65N_GRROSE_INCLUDE_BOARD_H -/*************************************************************************** +/**************************************************************************** * Included Files - ***************************************************************************/ + ****************************************************************************/ #ifndef __ASSEMBLY__ # include @@ -46,9 +31,9 @@ /**************************************************************************** * Pre-processor Definitions - ***************************************************************************/ + ****************************************************************************/ -/* Clocking ****************************************************************/ +/* Clocking *****************************************************************/ #define RX_CLK_1MHz (1000UL * 1000UL) #define RX_FCLK ( 60 * RX_CLK_1MHz) @@ -137,10 +122,6 @@ extern "C" #define EXTERN extern #endif -/**************************************************************************** - * Public Functions - ****************************************************************************/ - #undef EXTERN #ifdef __cplusplus } diff --git a/boards/renesas/rx65n/rx65n-grrose/scripts/linker_script.ld b/boards/renesas/rx65n/rx65n-grrose/scripts/linker_script.ld index 9d5572d2288..71997bd4619 100644 --- a/boards/renesas/rx65n/rx65n-grrose/scripts/linker_script.ld +++ b/boards/renesas/rx65n/rx65n-grrose/scripts/linker_script.ld @@ -26,10 +26,10 @@ SECTIONS } > ROM /* RSK-RX65N-1MB */ - .text 0xFFF00000: AT(0xFFF00000) +/* .text 0xFFF00000: AT(0xFFF00000) */ /* RSK-RX65N-2MB | GR-ROSE */ - /*.text 0xFFE00000: AT(0xFFE00000) */ + .text 0xFFE00000: AT(0xFFE00000) { *(.text) . = ALIGN(4); diff --git a/boards/renesas/rx65n/rx65n-grrose/src/Makefile b/boards/renesas/rx65n/rx65n-grrose/src/Makefile index 17a7873b45a..645bbe7feeb 100644 --- a/boards/renesas/rx65n/rx65n-grrose/src/Makefile +++ b/boards/renesas/rx65n/rx65n-grrose/src/Makefile @@ -1,35 +1,20 @@ ############################################################################ # configs/rx65n-grrose/src/Makefile # -# Copyright (C) 2008-2019 Gregory Nutt. All rights reserved. -# Author: Anjana +# Licensed to the Apache Software Foundation (ASF) under one or more +# contributor license agreements. See the NOTICE file distributed with +# this work for additional information regarding copyright ownership. The +# ASF licenses this file to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance with the +# License. You may obtain a copy of the License at # -# Redistribution and use in source and binary forms, with or without -# modification, are permitted provided that the following conditions -# are met: +# http://www.apache.org/licenses/LICENSE-2.0 # -# 1. Redistributions of source code must retain the above copyright -# notice, this list of conditions and the following disclaimer. -# 2. Redistributions in binary form must reproduce the above copyright -# notice, this list of conditions and the following disclaimer in -# the documentation and/or other materials provided with the -# distribution. -# 3. Neither the name NuttX nor the names of its contributors may be -# used to endorse or promote products derived from this software -# without specific prior written permission. -# -# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS -# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED -# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -# POSSIBILITY OF SUCH DAMAGE. +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT +# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the +# License for the specific language governing permissions and limitations +# under the License. # ############################################################################ @@ -41,7 +26,7 @@ CFLAGS += -I=$(ARCH_SRCDIR)/chip ASRCS = AOBJS = $(ASRCS:.asm=$(OBJEXT)) -CSRCS = rx65n_main.c +CSRCS = rx65n_appinit.c rx65n_bringup.c COBJS = $(CSRCS:.c=$(OBJEXT)) SRCS = $(ASRCS) $(CSRCS) diff --git a/boards/renesas/rx65n/rx65n-grrose/src/rx65n_appinit.c b/boards/renesas/rx65n/rx65n-grrose/src/rx65n_appinit.c new file mode 100644 index 00000000000..20e093e37bb --- /dev/null +++ b/boards/renesas/rx65n/rx65n-grrose/src/rx65n_appinit.c @@ -0,0 +1,81 @@ +/**************************************************************************** + * boards/renesas/rx65n/rx65n-grrose/src/rx65n_appinit.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include + +#include + +#ifdef CONFIG_LIB_BOARDCTL + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_app_initialize + * + * Description: + * Perform application specific initialization. This function is never + * called directly from application code, but only indirectly via the + * (non-standard) boardctl() interface using the command BOARDIOC_INIT. + * + * CONFIG_LIB_BOARDCTL=y : + * Called from the NSH library + * + * CONFIG_BOARD_LATE_INITIALIZE=y, CONFIG_NSH_LIBRARY=y, && + * CONFIG_LIB_BOARDCTL=n : + * Called from board_late_initialize(). + * + * Input Parameters: + * arg - The boardctl() argument is passed to the board_app_initialize() + * implementation without modification. The argument has no + * meaning to NuttX; the meaning of the argument is a contract + * between the board-specific initialization logic and the + * matching application logic. The value cold be such things as a + * mode enumeration value, a set of DIP switch switch settings, a + * pointer to configuration data read from a file or serial FLASH, + * or whatever you would like to do with it. Every implementation + * should accept zero/NULL as a default configuration. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure to indicate the nature of the failure. + * + ****************************************************************************/ + +int board_app_initialize(uintptr_t arg) +{ + /* Did we already initialize via board_late_initialize()? */ + +#ifndef CONFIG_BOARD_LATE_INITIALIZE + return rx65n_bringup(); +#else + return OK; +#endif +} + +#endif /* CONFIG_LIB_BOARDCTL */ diff --git a/boards/renesas/rx65n/rx65n-grrose/src/rx65n_bringup.c b/boards/renesas/rx65n/rx65n-grrose/src/rx65n_bringup.c new file mode 100644 index 00000000000..043f62af065 --- /dev/null +++ b/boards/renesas/rx65n/rx65n-grrose/src/rx65n_bringup.c @@ -0,0 +1,216 @@ +/**************************************************************************** + * boards/renesas/rx65n/rx65n-grrose/src/rx65n_bringup.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include +#include +#include +#include + +#include + +#include +#ifdef CONFIG_LIB_BOARDCTL + +#ifdef HAVE_RTC_DRIVER +# include +# include "rx65n_rtc.h" +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: rtc_driver_initialize + * + * Description: + * Initialize and register the RTC driver. + * + ****************************************************************************/ + +#ifdef HAVE_RTC_DRIVER +static int rtc_driver_initialize(void) +{ + FAR struct rtc_lowerhalf_s *lower; + int ret; + + /* Instantiate the rx65n lower-half RTC driver */ + + lower = rx65n_rtc_lowerhalf(); + if (lower == NULL) + { + serr("ERROR: Failed to instantiate the RTC lower-half driver\n"); + ret = -ENOMEM; + } + else + { + /* Bind the lower half driver and register the combined RTC driver + * as /dev/rtc0 + */ + + ret = rtc_initialize(0, lower); + if (ret < 0) + { + serr("ERROR: Failed to bind/register the RTC driver: %d\n", ret); + } + } + + return ret; +} + +#endif +/**************************************************************************** + * Name: rx65n_bringup + * + * Description: + * Perform architecture-specific initialization + * + * CONFIG_BOARD_LATE_INITIALIZE=y : + * Called from board_late_initialize(). + * + * CONFIG_BOARD_LATE_INITIALIZE=n && CONFIG_LIB_BOARDCTL=y : + * Called from the NSH library + * + ****************************************************************************/ + +int rx65n_bringup(void) +{ + int ret; +#ifdef HAVE_RTC_DRIVER + ret = rtc_driver_initialize(); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: rtc_driver_initialize failed: %d\n", ret); + } +#endif + +#ifdef CONFIG_FS_PROCFS + + /* Mount the procfs file system */ + + ret = mount(NULL, "/proc", "procfs", 0, NULL); + if (ret < 0) + { + syslog(LOG_ERR, + "ERROR: Failed to mount the PROC filesystem: %d (%d)\n", + ret, errno); + } + +#endif + return OK; +} + +#if defined (CONFIG_ARCH_HAVE_LEDS) && (CONFIG_ARCH_LEDS) + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_autoled1_on + * + * Description: + * Turns on LED 0 + * + ****************************************************************************/ + +void board_autoled1_on(int led) +{ + LED0 = LED_ON; +} + +/**************************************************************************** + * Name: board_autoled2_on + * + * Description: + * Turns on LED 1 + * + ****************************************************************************/ + +void board_autoled2_on(int led) +{ + LED1 = LED_ON; +} + +/**************************************************************************** + * Name: board_autoled_on + * + * Description: + * Turns on LED 0 & LED 1 + * + ****************************************************************************/ + +void board_autoled_on(int led) +{ + LED0 = LED_ON; + LED1 = LED_ON; +} + +/**************************************************************************** + * Name: board_autoled1_off + * + * Description: + * Turns off LED 0 + * + ****************************************************************************/ + +void board_autoled1_off(int led) +{ + LED0 = LED_OFF; +} + +/**************************************************************************** + * Name: board_autoled2_off + * + * Description: + * Turns off LED 1 + * + ****************************************************************************/ + +void board_autoled2_off(int led) +{ + LED1 = LED_OFF; +} + +/**************************************************************************** + * Name: board_autoled_off + * + * Description: + * Turns off LED 0 & LED 1 + * + ****************************************************************************/ + +void board_autoled_off(int led) +{ + LED0 = LED_OFF; + LED1 = LED_OFF; +} + +#endif +#endif diff --git a/boards/renesas/rx65n/rx65n-grrose/src/rx65n_main.c b/boards/renesas/rx65n/rx65n-grrose/src/rx65n_main.c deleted file mode 100644 index 15ddd485821..00000000000 --- a/boards/renesas/rx65n/rx65n-grrose/src/rx65n_main.c +++ /dev/null @@ -1,126 +0,0 @@ -/**************************************************************************** - * configs/rx65n-grrose/src/rx65n.main.c - * - * Copyright (C) 2008-2019 Gregory Nutt. All rights reserved. - * Author: Anjana - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************/ - -/**************************************************************************** - *Included files - ***************************************************************************/ - -#include "rx65n_macrodriver.h" -#include "arch/board/board.h" -#include "rx65n_definitions.h" - -/**************************************************************************** - * Public Functions - ****************************************************************************/ - -/**************************************************************************** - * Name: board_autoled1_on - * - * Description: - * Turns on LED 0 - * - ****************************************************************************/ - -void board_autoled1_on(int led) -{ - LED0 = LED_ON; -} - -/**************************************************************************** - * Name: board_autoled2_on - * - * Description: - * Turns on LED 1 - * - ****************************************************************************/ - -void board_autoled2_on(int led) -{ - LED1 = LED_ON; -} - -/**************************************************************************** - * Name: board_autoled_on - * - * Description: - * Turns on LED 0 & LED 1 - * - ****************************************************************************/ - -void board_autoled_on(int led) -{ - LED0 = LED_ON; - LED1 = LED_ON; -} - -/**************************************************************************** - * Name: board_autoled1_off - * - * Description: - * Turns off LED 0 - * - ****************************************************************************/ - -void board_autoled1_off(int led) -{ - LED0 = LED_OFF; -} - -/**************************************************************************** - * Name: board_autoled2_off - * - * Description: - * Turns off LED 1 - * - ****************************************************************************/ - -void board_autoled2_off(int led) -{ - LED1 = LED_OFF; -} - -/**************************************************************************** - * Name: board_autoled_off - * - * Description: - * Turns off LED 0 & LED 1 - * - ****************************************************************************/ - -void board_autoled_off(int led) -{ - LED0 = LED_OFF; - LED1 = LED_OFF; -} diff --git a/boards/renesas/rx65n/rx65n-rsk2mb/README.txt b/boards/renesas/rx65n/rx65n-rsk2mb/README.txt index e811b603492..6747512bcc5 100644 --- a/boards/renesas/rx65n/rx65n-rsk2mb/README.txt +++ b/boards/renesas/rx65n/rx65n-rsk2mb/README.txt @@ -11,6 +11,7 @@ Contents - Serial Console - LEDs - Networking + - RTC - Debugging Board Features @@ -177,6 +178,22 @@ Configure UDP blaster application as mentioned below : CONFIG_EXAMPLES_UDPBLASTER_HOSTIP=0x0a4b1801 (10.75.24.1) ------> Gateway IP CONFIG_EXAMPLES_UDPBLASTER_NETMASK=0xfffffe00 (255.255.254.0) --------> Netmask CONFIG_EXAMPLES_UDPBLASTER_TARGETIP=0x0a4b189b (10.75.24.155) ---------> Target IP +RTC +========== + +NuttX Configurations +--------------- +The configurations listed in Renesas_RX65N_NuttX_RTC_Design.doc need to be enabled. + +RTC Testing +------------------ +The test cases mentioned in Renesas_RX65N_RTC_Test_Cases.xls are to be executed +as part of RTC testing. + +The following configurations are to be enabled as part of testing RTC examples. +CONFIG_EXAMPLES_ALARM +CONFIG_EXAMPLES_PERIODIC +CONFIG_EXAMPLES_CARRY Debugging ========== @@ -210,3 +227,8 @@ endif Select Motorola SREC format. 4. Download Renesas flash programmer tool from https://www.renesas.com/in/en/products/software-tools/tools/programmer/renesas-flash-programmer-programming-gui.html#downloads 5. Refer to the user manual document, for steps to flash NuttX binary using RFP tool. +Changes Made in NuttX 8.2 Code +================================ +1. In wd_start.c file, in function wd_expiration(), typecasting is done when the signal handler nxsig_timeout() is invoked. +2. In rtc.c, (drivers/timers/rtc.c) file, in function rtc_periodic_callback(), alarminfo->active = false is commented. +The reason being, periodic interrupt should not be disabled. Uncommenting the above mentioned line (alarminfo->active = false), will make the periodic interrupt come only once. diff --git a/boards/renesas/rx65n/rx65n-rsk2mb/configs/netnsh/defconfig b/boards/renesas/rx65n/rx65n-rsk2mb/configs/netnsh/defconfig index 80aaa83fd70..f1483fa3f63 100644 --- a/boards/renesas/rx65n/rx65n-rsk2mb/configs/netnsh/defconfig +++ b/boards/renesas/rx65n/rx65n-rsk2mb/configs/netnsh/defconfig @@ -5,58 +5,60 @@ # You can then do "make savedefconfig" to generate a new defconfig file that includes your # modifications. # -CONFIG_ARCH="renesas" -CONFIG_ARCH_BOARD="rx65n-rsk2mb" CONFIG_ARCH_BOARD_RX65N_RSK2MB=y -CONFIG_ARCH_CHIP="rx65n" +CONFIG_ARCH_BOARD="rx65n" CONFIG_ARCH_CHIP_R5F565NEHDFC=y -CONFIG_ARCH_INTERRUPTSTACK=1024 CONFIG_ARCH_RENESAS=y CONFIG_ARCH_STACKDUMP=y +CONFIG_ARCH="renesas" +CONFIG_ARCH_CHIP="rx65n" CONFIG_BOARD_LOOPSPERMSEC=15001 -CONFIG_BUILTIN=y -CONFIG_DEBUG_FEATURES=y -CONFIG_EXAMPLES_SERIALBLASTER=y -CONFIG_EXAMPLES_SERIALRX=y -CONFIG_EXAMPLES_SERIALRX_PRINTSTR=y -CONFIG_EXAMPLES_SERIALRX_PRIORITY=75 -CONFIG_FS_PROCFS=y -CONFIG_FS_PROCFS_REGISTER=y -CONFIG_MAX_TASKS=8 CONFIG_MOTOROLA_SREC=y +CONFIG_ENDIAN_LITTLE=y +CONFIG_SYSTEM_NSH=y +CONFIG_MAX_TASKS=8 +CONFIG_DEBUG_FEATURES=y +CONFIG_ARCH_INTERRUPTSTACK=1024 +CONFIG_BUILTIN=y +CONFIG_ETH0_PHY_DP83620=y CONFIG_NET=y CONFIG_NETDB_DNSCLIENT=y CONFIG_NETDB_DNSSERVER_NOADDR=y CONFIG_NETDEV_PHY_IOCTL=y CONFIG_NETDEV_STATISTICS=y -CONFIG_NETINIT_DHCPC=y -CONFIG_NETUTILS_DHCPC=y -CONFIG_NETUTILS_DHCPD=y CONFIG_NETUTILS_TFTPC=y CONFIG_NETUTILS_WEBCLIENT=y CONFIG_NET_ARP_SEND=y CONFIG_NET_BROADCAST=y CONFIG_NET_ICMP=y CONFIG_NET_ICMP_SOCKET=y +CONFIG_NET_SOCKOPTS=y CONFIG_NET_STATISTICS=y CONFIG_NET_TCP=y CONFIG_NET_TCPBACKLOG=y CONFIG_NET_TCP_WRITE_BUFFERS=y CONFIG_NET_UDP=y +CONFIG_NSH_BUILTIN_APPS=y CONFIG_NFILE_DESCRIPTORS=8 CONFIG_NFILE_STREAMS=8 -CONFIG_NSH_BUILTIN_APPS=y CONFIG_NSH_FILEIOSIZE=512 CONFIG_NSH_LINELEN=64 CONFIG_NSH_READLINE=y CONFIG_NUNGET_CHARS=0 CONFIG_PREALLOC_TIMERS=0 CONFIG_PTHREAD_STACK_DEFAULT=1024 -CONFIG_RAM_SIZE=655360 +CONFIG_RAM_SIZE=262144 CONFIG_RAM_START=0x00000000 +CONFIG_RAMDISK_SIZE=393216 +CONFIG_RAMDISK_START=0x00800000 CONFIG_RAW_BINARY=y +CONFIG_SCI2_SERIALDRIVER=y +CONFIG_RX65N_SCI2=y +CONFIG_SCI8_SERIALDRIVER=y +CONFIG_SCI8_SERIAL_CONSOLE=y +CONFIG_RX65N_SCI8=y +CONFIG_RX65N_EMAC=y CONFIG_RX65N_EMAC0=y -CONFIG_RX65N_EMAC0_PHYADDR=30 CONFIG_RX65N_EMAC0_PHYSR=30 CONFIG_RX65N_EMAC0_PHYSR_100FD=0x4 CONFIG_RX65N_EMAC0_PHYSR_100HD=0x0 @@ -64,16 +66,42 @@ CONFIG_RX65N_EMAC0_PHYSR_10FD=0x6 CONFIG_RX65N_EMAC0_PHYSR_10HD=0x2 CONFIG_RX65N_EMAC0_PHYSR_ALTCONFIG=y CONFIG_RX65N_EMAC0_PHYSR_ALTMODE=0x6 -CONFIG_RX65N_SCI2=y -CONFIG_RX65N_SCI8=y +CONFIG_RX65N_EMAC0_MII=y +CONFIG_RX65N_EMAC0_PHYADDR=30 +CONFIG_SCHED_WORKQUEUE=y CONFIG_SCHED_HPWORK=y CONFIG_SCHED_LPWORK=y -CONFIG_SCI8_SERIAL_CONSOLE=y CONFIG_SDCLONE_DISABLE=y -CONFIG_STDIO_DISABLE_BUFFERING=y -CONFIG_SYSTEM_NSH=y -CONFIG_SYSTEM_NSH_PRIORITY=50 CONFIG_SYSTEM_PING=y +CONFIG_ICU=y +CONFIG_STDIO_DISABLE_BUFFERING=y CONFIG_TASK_NAME_SIZE=0 -CONFIG_USERMAIN_STACKSIZE=1024 CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_USERMAIN_STACKSIZE=1024 +CONFIG_FS_PROCFS=y +CONFIG_FS_PROCFS_REGISTER=y +CONFIG_NET_ETH_PKTSIZE = 590 +CONFIG_RX65N_CMTW0=y +CONFIG_RX65N_PERIB=y +CONFIG_NETUTILS_DHCPC=y +CONFIG_NETUTILS_DHCPD=y +CONFIG_NSH_DHCPC=y +CONFIG_NETINIT_DHCPC=y +CONFIG_SYSTEM_NSH_PRIORITY=50 +CONFIG_EXAMPLES_SERIALBLASTER=y +CONFIG_EXAMPLES_SERIALBLASTER_STACKSIZE=2048 +CONFIG_EXAMPLES_SERIALBLASTER_PRIORITY=50 +CONFIG_EXAMPLES_SERIALBLASTER_DEVPATH="/dev/ttyS2" +CONFIG_EXAMPLES_SERIALRX=y +CONFIG_EXAMPLES_SERIALRX_STACKSIZE=2048 +CONFIG_EXAMPLES_SERIALRX_PRIORITY=75 +CONFIG_EXAMPLES_SERIALRX_BUFSIZE=11520 +CONFIG_EXAMPLES_SERIALRX_DEVPATH="/dev/ttyS0" +CONFIG_EXAMPLES_SERIALRX_PRINTSTR=y +CONFIG_RTC=y +CONFIG_RTC_HIRES=y +CONFIG_RTC_ALARM=y +CONFIG_RX65N_RTC=y +CONFIG_RX65N_CARRY=y +CONFIG_RTC_DRIVER=y +CONFIG_NSH_ARCHINIT=y diff --git a/boards/renesas/rx65n/rx65n-rsk2mb/configs/nsh/defconfig b/boards/renesas/rx65n/rx65n-rsk2mb/configs/nsh/defconfig index ba409e5a036..ded912a08d8 100644 --- a/boards/renesas/rx65n/rx65n-rsk2mb/configs/nsh/defconfig +++ b/boards/renesas/rx65n/rx65n-rsk2mb/configs/nsh/defconfig @@ -7,21 +7,30 @@ # # CONFIG_NSH_DISABLE_IFCONFIG is not set # CONFIG_NSH_DISABLE_PS is not set -CONFIG_ARCH="renesas" -CONFIG_ARCH_BOARD="rx65n-rsk2mb" CONFIG_ARCH_BOARD_RX65N_RSK2MB=y -CONFIG_ARCH_CHIP="rx65n" +CONFIG_ARCH_BOARD="rx65n" CONFIG_ARCH_CHIP_R5F565NEHDFC=y -CONFIG_ARCH_INTERRUPTSTACK=1024 CONFIG_ARCH_RENESAS=y CONFIG_ARCH_STACKDUMP=y -CONFIG_BUILTIN=y -CONFIG_DEBUG_FEATURES=y -CONFIG_MAX_TASKS=8 +CONFIG_ARCH="renesas" +#CONFIG_BOARD_LOOPSPERMSEC=572 +#CONFIG_DISABLE_MOUNTPOINT=y +#CONFIG_DISABLE_MQUEUE=y +#CONFIG_DISABLE_POLL=y +#CONFIG_DISABLE_POSIX_TIMERS=y +#CONFIG_DISABLE_PTHREAD=y +#CONFIG_DISABLE_SIGNALS=y CONFIG_MOTOROLA_SREC=y +CONFIG_ENDIAN_LITTLE=y +CONFIG_SYSTEM_NSH=y +CONFIG_MAX_TASKS=8 +CONFIG_DEBUG_FEATURES=y +CONFIG_ARCH_INTERRUPTSTACK=1024 +CONFIG_BUILTIN=y +CONFIG_NSH_BUILTIN_APPS=y CONFIG_NFILE_DESCRIPTORS=8 CONFIG_NFILE_STREAMS=8 -CONFIG_NSH_BUILTIN_APPS=y +#CONFIG_NSH_CONSOLE_LOGIN=y CONFIG_NSH_FILEIOSIZE=512 CONFIG_NSH_LINELEN=64 CONFIG_NSH_READLINE=y @@ -31,12 +40,22 @@ CONFIG_PTHREAD_STACK_DEFAULT=1024 CONFIG_RAM_SIZE=655360 CONFIG_RAM_START=0x00000000 CONFIG_RAW_BINARY=y -CONFIG_RX65N_SCI2=y -CONFIG_RX65N_SCI8=y +#CONFIG_SCI0_SERIALDRIVER=y +#CONFIG_SCI0_SERIAL_CONSOLE=y +#CONFIG_RX65N_SCI0=y +#CONFIG_SCI1_SERIALDRIVER=y +#CONFIG_SCI1_SERIAL_CONSOLE=y +#CONFIG_RX65N_SCI1=y +CONFIG_SCI2_SERIALDRIVER=y CONFIG_SCI2_SERIAL_CONSOLE=y +CONFIG_RX65N_SCI2=y +CONFIG_SCI8_SERIALDRIVER=y +#CONFIG_SCI8_SERIAL_CONSOLE=y +CONFIG_RX65N_SCI8=y CONFIG_SDCLONE_DISABLE=y +CONFIG_ICU=y CONFIG_STDIO_DISABLE_BUFFERING=y -CONFIG_SYSTEM_NSH=y CONFIG_TASK_NAME_SIZE=0 -CONFIG_USERMAIN_STACKSIZE=1024 CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_USERMAIN_STACKSIZE=1024 + diff --git a/boards/renesas/rx65n/rx65n-rsk2mb/include/README.TXT b/boards/renesas/rx65n/rx65n-rsk2mb/include/README.TXT new file mode 100644 index 00000000000..9c7d2ae1d51 --- /dev/null +++ b/boards/renesas/rx65n/rx65n-rsk2mb/include/README.TXT @@ -0,0 +1,85 @@ +README +====== + + Overview + -------- + This directory contains logic to support a custom ROMFS start-up script. + This startup script is used by by the NSH when it starts provided that + CONFIG_NSH_ARCHROMFS=y. The script provides a ROMFS volume that will be + mounted at /etc and will look like this at run-time: + + NuttShell (NSH) NuttX-8.2 + nsh> ls -l /etc + /etc: + dr-xr-xr-x 0 . + -r--r--r-- 20 group + dr-xr-xr-x 0 init.d/ + -r--r--r-- 35 passwd + /etc/init.d: + dr-xr-xr-x 0 .. + -r--r--r-- 110 rcS + nsh> + + /etc/init.d/rcS is the start-up script; /etc/passwd is a the password + file. It supports a single user: + + USERNAME: admin + PASSWORD: Adminstrator + + nsh> cat /etc/passwd + admin:8Tv+Hbmr3pLddSjtzL0kwC:0:0:/ + + The encrypted passwords in the provided passwd file are only valid if the + TEA key is set to: 012345678 9abcdef0 012345678 9abcdef0. Changes to either + the key or the password word will require regeneration of the nsh_romfimg.h + header file. + + The format of the password file is: + + user:x:uid:gid:home + + Where: + user: User name + x: Encrypted password + uid: User ID (0 for now) + gid: Group ID (0 for now) + home: Login directory (/ for now) + + /etc/group is a group file. It is not currently used. + + nsh> cat /etc/group + root:*:0:root,admin + + The format of the group file is: + + group:x:gid:users + + Where: + group: The group name + x: Group password + gid: Group ID + users: A comma separated list of members of the group + + Updating the ROMFS File System + ------------------------------ + The content on the nsh_romfsimg.h header file is generated from a sample + directory structure. That directory structure is contained in the etc/ directory and can be modified per the following steps: + + + 1. Change directory to etc/: + + cd etc/ + + 2. Make modifications as desired. + + 3. Create the new ROMFS image. + + genromfs -f romfs_img -d etc -V SimEtcVol + + 4. Convert the ROMFS image to a C header file + + xxd -i romfs_img >nsh_romfsimg.h + + 5. Edit nsh_romfsimg.h, mark both data definitions as 'const' so that + that will be stored in FLASH. + diff --git a/boards/renesas/rx65n/rx65n-rsk2mb/include/board.h b/boards/renesas/rx65n/rx65n-rsk2mb/include/board.h index fca2d70f429..9f2f42d1100 100644 --- a/boards/renesas/rx65n/rx65n-rsk2mb/include/board.h +++ b/boards/renesas/rx65n/rx65n-rsk2mb/include/board.h @@ -1,44 +1,29 @@ -/*************************************************************************** +/**************************************************************************** * boards/renesas/rx65n/rx65n-rsk2mb/include/board.h * - * Copyright (C) 2008-2019 Gregory Nutt. All rights reserved. - * Author: Anjana + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ***************************************************************************/ + ****************************************************************************/ #ifndef __BOARDS_RENESAS_RX65N_RX65N_RSK2MB_INCLUDE_BOARD_H #define __BOARDS_RENESAS_RX65N_RX65N_RSK2MB_INCLUDE_BOARD_H -/*************************************************************************** +/**************************************************************************** * Included Files - ***************************************************************************/ + ****************************************************************************/ #ifndef __ASSEMBLY__ # include @@ -46,9 +31,9 @@ /**************************************************************************** * Pre-processor Definitions - ***************************************************************************/ + ****************************************************************************/ -/* Clocking ****************************************************************/ +/* Clocking *****************************************************************/ #define RX_CLK_1MHz (1000UL * 1000UL) #define RX_FCLK ( 60 * RX_CLK_1MHz) @@ -137,10 +122,6 @@ extern "C" #define EXTERN extern #endif -/**************************************************************************** - * Public Functions - ****************************************************************************/ - #undef EXTERN #ifdef __cplusplus } diff --git a/boards/renesas/rx65n/rx65n-rsk2mb/src/Makefile b/boards/renesas/rx65n/rx65n-rsk2mb/src/Makefile index 080d7310a2c..162e4883157 100644 --- a/boards/renesas/rx65n/rx65n-rsk2mb/src/Makefile +++ b/boards/renesas/rx65n/rx65n-rsk2mb/src/Makefile @@ -1,36 +1,21 @@ ############################################################################ # configs/rx65n-rsk2mb/src/Makefile # -# Copyright (C) 2008-2019 Gregory Nutt. All rights reserved. -# Author: Anjana -# -# Redistribution and use in source and binary forms, with or without -# modification, are permitted provided that the following conditions -# are met: -# -# 1. Redistributions of source code must retain the above copyright -# notice, this list of conditions and the following disclaimer. -# 2. Redistributions in binary form must reproduce the above copyright -# notice, this list of conditions and the following disclaimer in -# the documentation and/or other materials provided with the -# distribution. -# 3. Neither the name NuttX nor the names of its contributors may be -# used to endorse or promote products derived from this software -# without specific prior written permission. -# -# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS -# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED -# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -# POSSIBILITY OF SUCH DAMAGE. -# +# Licensed to the Apache Software Foundation (ASF) under one or more +# contributor license agreements. See the NOTICE file distributed with +# this work for additional information regarding copyright ownership. The +# ASF licenses this file to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance with the +# License. You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT +# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the +# License for the specific language governing permissions and limitations +# under the License. +# ############################################################################ -include $(TOPDIR)/Make.defs @@ -41,13 +26,14 @@ CFLAGS += -I=$(ARCH_SRCDIR)/chip ASRCS = AOBJS = $(ASRCS:.asm=$(OBJEXT)) -CSRCS = rx65n_main.c +CSRCS = rx65n_appinit.c rx65n_bringup.c COBJS = $(CSRCS:.c=$(OBJEXT)) SRCS = $(ASRCS) $(CSRCS) OBJS = $(AOBJS) $(COBJS) CFLAGS += -I=$(TOPDIR)/arch/$(CONFIG_ARCH)/src +CFLAGS += -I=$(TOPDIR)/arch/$(CONFIG_ARCH)/include all: libboard$(LIBEXT) diff --git a/boards/renesas/rx65n/rx65n-rsk2mb/src/rx65n_appinit.c b/boards/renesas/rx65n/rx65n-rsk2mb/src/rx65n_appinit.c new file mode 100644 index 00000000000..21e7b5481b9 --- /dev/null +++ b/boards/renesas/rx65n/rx65n-rsk2mb/src/rx65n_appinit.c @@ -0,0 +1,81 @@ +/**************************************************************************** + * boards/renesas/rx65n/rx65n-rsk2mb/src/rx65n_appinit.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include + +#include + +#ifdef CONFIG_LIB_BOARDCTL + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_app_initialize + * + * Description: + * Perform application specific initialization. This function is never + * called directly from application code, but only indirectly via the + * (non-standard) boardctl() interface using the command BOARDIOC_INIT. + * + * CONFIG_LIB_BOARDCTL=y : + * Called from the NSH library + * + * CONFIG_BOARD_LATE_INITIALIZE=y, CONFIG_NSH_LIBRARY=y, && + * CONFIG_LIB_BOARDCTL=n : + * Called from board_late_initialize(). + * + * Input Parameters: + * arg - The boardctl() argument is passed to the board_app_initialize() + * implementation without modification. The argument has no + * meaning to NuttX; the meaning of the argument is a contract + * between the board-specific initialization logic and the + * matching application logic. The value cold be such things as a + * mode enumeration value, a set of DIP switch switch settings, a + * pointer to configuration data read from a file or serial FLASH, + * or whatever you would like to do with it. Every implementation + * should accept zero/NULL as a default configuration. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure to indicate the nature of the failure. + * + ****************************************************************************/ + +int board_app_initialize(uintptr_t arg) +{ + /* Did we already initialize via board_late_initialize()? */ + +#ifndef CONFIG_BOARD_LATE_INITIALIZE + return rx65n_bringup(); +#else + return OK; +#endif +} + +#endif /* CONFIG_LIB_BOARDCTL */ diff --git a/boards/renesas/rx65n/rx65n-rsk2mb/src/rx65n_bringup.c b/boards/renesas/rx65n/rx65n-rsk2mb/src/rx65n_bringup.c new file mode 100644 index 00000000000..b29e7fb7cdb --- /dev/null +++ b/boards/renesas/rx65n/rx65n-rsk2mb/src/rx65n_bringup.c @@ -0,0 +1,216 @@ +/**************************************************************************** + * boards/renesas/rx65n/rx65n-rsk2mb/src/rx65n.bringup.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include +#include +#include +#include + +#include + +#include +#ifdef CONFIG_LIB_BOARDCTL + +#ifdef HAVE_RTC_DRIVER +# include +# include "rx65n_rtc.h" +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: rtc_driver_initialize + * + * Description: + * Initialize and register the RTC driver. + * + ****************************************************************************/ + +#ifdef HAVE_RTC_DRIVER +static int rtc_driver_initialize(void) +{ + FAR struct rtc_lowerhalf_s *lower; + int ret; + + /* Instantiate the rx65n lower-half RTC driver */ + + lower = rx65n_rtc_lowerhalf(); + if (lower == NULL) + { + serr("ERROR: Failed to instantiate the RTC lower-half driver\n"); + ret = -ENOMEM; + } + else + { + /* Bind the lower half driver and register the combined RTC driver + * as /dev/rtc0 + */ + + ret = rtc_initialize(0, lower); + if (ret < 0) + { + serr("ERROR: Failed to bind/register the RTC driver: %d\n", ret); + } + } + + return ret; +} + +#endif +/**************************************************************************** + * Name: rx65n_bringup + * + * Description: + * Perform architecture-specific initialization + * + * CONFIG_BOARD_LATE_INITIALIZE=y : + * Called from board_late_initialize(). + * + * CONFIG_BOARD_LATE_INITIALIZE=n && CONFIG_LIB_BOARDCTL=y : + * Called from the NSH library + * + ****************************************************************************/ + +int rx65n_bringup(void) +{ + int ret; +#ifdef HAVE_RTC_DRIVER + ret = rtc_driver_initialize(); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: rtc_driver_initialize failed: %d\n", ret); + } +#endif + +#ifdef CONFIG_FS_PROCFS + + /* Mount the procfs file system */ + + ret = mount(NULL, "/proc", "procfs", 0, NULL); + if (ret < 0) + { + syslog(LOG_ERR, + "ERROR: Failed to mount the PROC filesystem: %d (%d)\n", + ret, errno); + } + +#endif + return OK; +} + +#if defined (CONFIG_ARCH_HAVE_LEDS) && (CONFIG_ARCH_LEDS) + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_autoled1_on + * + * Description: + * Turns on LED 0 + * + ****************************************************************************/ + +void board_autoled1_on(int led) +{ + LED0 = LED_ON; +} + +/**************************************************************************** + * Name: board_autoled2_on + * + * Description: + * Turns on LED 1 + * + ****************************************************************************/ + +void board_autoled2_on(int led) +{ + LED1 = LED_ON; +} + +/**************************************************************************** + * Name: board_autoled_on + * + * Description: + * Turns on LED 0 & LED 1 + * + ****************************************************************************/ + +void board_autoled_on(int led) +{ + LED0 = LED_ON; + LED1 = LED_ON; +} + +/**************************************************************************** + * Name: board_autoled1_off + * + * Description: + * Turns off LED 0 + * + ****************************************************************************/ + +void board_autoled1_off(int led) +{ + LED0 = LED_OFF; +} + +/**************************************************************************** + * Name: board_autoled2_off + * + * Description: + * Turns off LED 1 + * + ****************************************************************************/ + +void board_autoled2_off(int led) +{ + LED1 = LED_OFF; +} + +/**************************************************************************** + * Name: board_autoled_off + * + * Description: + * Turns off LED 0 & LED 1 + * + ****************************************************************************/ + +void board_autoled_off(int led) +{ + LED0 = LED_OFF; + LED1 = LED_OFF; +} + +#endif +#endif diff --git a/boards/renesas/rx65n/rx65n-rsk2mb/src/rx65n_main.c b/boards/renesas/rx65n/rx65n-rsk2mb/src/rx65n_main.c deleted file mode 100644 index 15ddd485821..00000000000 --- a/boards/renesas/rx65n/rx65n-rsk2mb/src/rx65n_main.c +++ /dev/null @@ -1,126 +0,0 @@ -/**************************************************************************** - * configs/rx65n-grrose/src/rx65n.main.c - * - * Copyright (C) 2008-2019 Gregory Nutt. All rights reserved. - * Author: Anjana - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************/ - -/**************************************************************************** - *Included files - ***************************************************************************/ - -#include "rx65n_macrodriver.h" -#include "arch/board/board.h" -#include "rx65n_definitions.h" - -/**************************************************************************** - * Public Functions - ****************************************************************************/ - -/**************************************************************************** - * Name: board_autoled1_on - * - * Description: - * Turns on LED 0 - * - ****************************************************************************/ - -void board_autoled1_on(int led) -{ - LED0 = LED_ON; -} - -/**************************************************************************** - * Name: board_autoled2_on - * - * Description: - * Turns on LED 1 - * - ****************************************************************************/ - -void board_autoled2_on(int led) -{ - LED1 = LED_ON; -} - -/**************************************************************************** - * Name: board_autoled_on - * - * Description: - * Turns on LED 0 & LED 1 - * - ****************************************************************************/ - -void board_autoled_on(int led) -{ - LED0 = LED_ON; - LED1 = LED_ON; -} - -/**************************************************************************** - * Name: board_autoled1_off - * - * Description: - * Turns off LED 0 - * - ****************************************************************************/ - -void board_autoled1_off(int led) -{ - LED0 = LED_OFF; -} - -/**************************************************************************** - * Name: board_autoled2_off - * - * Description: - * Turns off LED 1 - * - ****************************************************************************/ - -void board_autoled2_off(int led) -{ - LED1 = LED_OFF; -} - -/**************************************************************************** - * Name: board_autoled_off - * - * Description: - * Turns off LED 0 & LED 1 - * - ****************************************************************************/ - -void board_autoled_off(int led) -{ - LED0 = LED_OFF; - LED1 = LED_OFF; -} diff --git a/boards/renesas/rx65n/rx65n/configs/nsh/defconfig b/boards/renesas/rx65n/rx65n/configs/nsh/defconfig index 7a33b3ad05d..f7ec25f4aa9 100644 --- a/boards/renesas/rx65n/rx65n/configs/nsh/defconfig +++ b/boards/renesas/rx65n/rx65n/configs/nsh/defconfig @@ -5,22 +5,23 @@ # You can then do "make savedefconfig" to generate a new defconfig file that includes your # modifications. # -CONFIG_ARCH="renesas" -CONFIG_ARCH_BOARD="rx65n" CONFIG_ARCH_BOARD_RX65N=y -CONFIG_ARCH_CHIP="rx65n" +CONFIG_ARCH_BOARD="rx65n" CONFIG_ARCH_CHIP_R5F565NEDDFC=y -CONFIG_ARCH_INTERRUPTSTACK=1024 CONFIG_ARCH_RENESAS=y CONFIG_ARCH_STACKDUMP=y -CONFIG_BUILTIN=y +CONFIG_ARCH="renesas" +CONFIG_MOTOROLA_SREC=y +CONFIG_ENDIAN_LITTLE=y +CONFIG_SYSTEM_NSH=y +CONFIG_MAX_TASKS=8 CONFIG_DEBUG_FEATURES=y CONFIG_DEBUG_SYMBOLS=y -CONFIG_MAX_TASKS=8 -CONFIG_MOTOROLA_SREC=y +CONFIG_ARCH_INTERRUPTSTACK=1024 +CONFIG_BUILTIN=y +CONFIG_NSH_BUILTIN_APPS=y CONFIG_NFILE_DESCRIPTORS=8 CONFIG_NFILE_STREAMS=8 -CONFIG_NSH_BUILTIN_APPS=y CONFIG_NSH_FILEIOSIZE=512 CONFIG_NSH_LINELEN=64 CONFIG_NSH_READLINE=y @@ -30,11 +31,13 @@ CONFIG_PTHREAD_STACK_DEFAULT=1024 CONFIG_RAM_SIZE=262144 CONFIG_RAM_START=0x00000000 CONFIG_RAW_BINARY=y -CONFIG_RX65N_SCI2=y +CONFIG_SCI2_SERIALDRIVER=y CONFIG_SCI2_SERIAL_CONSOLE=y +CONFIG_RX65N_SCI2=y CONFIG_SDCLONE_DISABLE=y +CONFIG_ICU=y CONFIG_STDIO_DISABLE_BUFFERING=y -CONFIG_SYSTEM_NSH=y CONFIG_TASK_NAME_SIZE=0 -CONFIG_USERMAIN_STACKSIZE=1024 CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_USERMAIN_STACKSIZE=1024 +