diff --git a/arch/arm/src/tiva/tiva_gpio.c b/arch/arm/src/tiva/tiva_gpio.c
index 9440a47b437..c749ad23bb2 100644
--- a/arch/arm/src/tiva/tiva_gpio.c
+++ b/arch/arm/src/tiva/tiva_gpio.c
@@ -734,13 +734,13 @@ static inline void tiva_interrupt(uint32_t pinset)
 
 #ifdef CONFIG_DEBUG_GPIO
   uint32_t regval;
-  vdbg("reg expected actual: [interrupt type=%d]\n", inttype);
+  gpiovdbg("reg expected actual: [interrupt type=%d]\n", inttype);
   regval = (getreg32(base+TIVA_GPIO_IS_OFFSET) & pin) ? pin : 0;
-  vdbg("IS  0x%08x 0x%08x\n", isset, regval);
+  gpiovdbg("IS  0x%08x 0x%08x\n", isset, regval);
   regval = (getreg32(base+TIVA_GPIO_IBE_OFFSET) & pin) ? pin : 0;
-  vdbg("IBE 0x%08x 0x%08x\n", ibeset, regval);
+  gpiovdbg("IBE 0x%08x 0x%08x\n", ibeset, regval);
   regval = (getreg32(base+TIVA_GPIO_IEV_OFFSET) & pin) ? pin : 0;
-  vdbg("IEV 0x%08x 0x%08x\n", ievset, regval);
+  gpiovdbg("IEV 0x%08x 0x%08x\n", ievset, regval);
 #endif
 }
 #endif
@@ -988,14 +988,14 @@ void tiva_gpio_lockport(uint32_t pinset, bool lock)
   if (lock)
     {
 #ifdef CONFIG_DEBUG_GPIO
-      vdbg("  locking port=%d pin=%d\n", port, pinno);
+      gpiovdbg("  locking port=%d pin=%d\n", port, pinno);
 #endif
       modifyreg32(base + TIVA_GPIO_CR_OFFSET, pinmask, 0);
     }
   else
     {
 #ifdef CONFIG_DEBUG_GPIO
-      vdbg("unlocking port=%d pin=%d\n", port, pinno);
+      gpiovdbg("unlocking port=%d pin=%d\n", port, pinno);
 #endif
       modifyreg32(base + TIVA_GPIO_CR_OFFSET, 0, pinmask);
     }
diff --git a/arch/arm/src/tiva/tiva_gpio.h b/arch/arm/src/tiva/tiva_gpio.h
index b36be3d08aa..8ca73dbf0e1 100644
--- a/arch/arm/src/tiva/tiva_gpio.h
+++ b/arch/arm/src/tiva/tiva_gpio.h
@@ -47,6 +47,7 @@
 
 #include <stdint.h>
 #include <stdbool.h>
+#include <debug.h>
 
 #include <nuttx/irq.h>
 
@@ -322,6 +323,20 @@
 #  define GPIO_PIN_6                  (6 << GPIO_PIN_SHIFT)
 #  define GPIO_PIN_7                  (7 << GPIO_PIN_SHIFT)
 
+/* Debug ********************************************************************/
+
+#ifdef CONFIG_DEBUG_SCHED
+# define gpiodbg(format, ...)    dbg(format, ##__VA_ARGS__)
+# define gpiolldbg(format, ...)  lldbg(format, ##__VA_ARGS__)
+# define gpiovdbg(format, ...)   vdbg(format, ##__VA_ARGS__)
+# define gpiollvdbg(format, ...) llvdbg(format, ##__VA_ARGS__)
+#else
+# define gpiodbg(x...)
+# define gpiolldbg(x...)
+# define gpiovdbg(x...)
+# define gpiollvdbg(x...)
+#endif
+
 /****************************************************************************
  * Public Types
  ****************************************************************************/
diff --git a/arch/arm/src/tiva/tiva_gpioirq.c b/arch/arm/src/tiva/tiva_gpioirq.c
index 3f7f23c4862..70b1d03b963 100644
--- a/arch/arm/src/tiva/tiva_gpioirq.c
+++ b/arch/arm/src/tiva/tiva_gpioirq.c
@@ -294,7 +294,7 @@ static int tiva_gpioporthandler(uint8_t port, void *context)
   uint8_t   pin;                                   /* Pin number */
 
   tiva_gpioirqclear(port, 0xff);
-  llvdbg("mis=0b%08b\n", mis & 0xff);
+  gpiollvdbg("mis=0b%08b\n", mis & 0xff);
 
   /* Now process each IRQ pending in the MIS */
 
@@ -304,10 +304,10 @@ static int tiva_gpioporthandler(uint8_t port, void *context)
         {
           if (((mis >> pin) & 1) != 0)
             {
-              llvdbg("port=%d pin=%d irq=%p index=%d\n",
-                     port, pin,
-                     g_gpioportirqvector[TIVA_GPIO_IRQ_IDX(port, pin)],
-                     TIVA_GPIO_IRQ_IDX(port, pin));
+              gpiollvdbg("port=%d pin=%d irq=%p index=%d\n",
+                         port, pin,
+                         g_gpioportirqvector[TIVA_GPIO_IRQ_IDX(port, pin)],
+                         TIVA_GPIO_IRQ_IDX(port, pin));
 
               g_gpioportirqvector[TIVA_GPIO_IRQ_IDX(port, pin)](irq, context);
             }
@@ -561,8 +561,8 @@ int tiva_gpioirqinitialize(void)
       g_gpioportirqvector[i] = irq_unexpected_isr;
     }
 
-  vdbg("tiva_gpioirqinitialize isr=%d/%d irq_unexpected_isr=%p\n",
-      i, TIVA_NIRQ_PINS, irq_unexpected_isr);
+  gpiovdbg("tiva_gpioirqinitialize isr=%d/%d irq_unexpected_isr=%p\n",
+           i, TIVA_NIRQ_PINS, irq_unexpected_isr);
 
   /* Then attach each GPIO interrupt handlers and enable corresponding GPIO
    * interrupts
@@ -693,8 +693,8 @@ xcpt_t tiva_gpioirqattach(uint32_t pinset, xcpt_t isr)
        * to the unexpected interrupt handler.
        */
 
-      vdbg("assign port=%d pin=%d function=%p to idx=%d\n",
-              port, pinno, isr, TIVA_GPIO_IRQ_IDX(port, pinno));
+      gpiovdbg("assign port=%d pin=%d function=%p to idx=%d\n",
+               port, pinno, isr, TIVA_GPIO_IRQ_IDX(port, pinno));
 
       if (isr == NULL)
         {
@@ -738,7 +738,7 @@ void tiva_gpioportirqattach(uint8_t port, xcpt_t isr)
        * to the unexpected interrupt handler.
        */
 
-      vdbg("assign function=%p to port=%d\n", isr, port);
+      gpiovdbg("assign function=%p to port=%d\n", isr, port);
 
       if (isr == NULL)
         {
diff --git a/arch/arm/src/tiva/tiva_ssi.c b/arch/arm/src/tiva/tiva_ssi.c
index aa205878aa4..094b8c82122 100644
--- a/arch/arm/src/tiva/tiva_ssi.c
+++ b/arch/arm/src/tiva/tiva_ssi.c
@@ -1026,10 +1026,10 @@ static int ssi_interrupt(int irq, void *context)
 
   /* Check for Rx FIFO overruns */
 
-#ifdef CONFIG_DEBUG
+#ifdef SSI_DEBUG
   if ((regval & SSI_RIS_ROR) != 0)
     {
-      lldbg("Rx FIFO Overrun!\n");
+      ssidbg("Rx FIFO Overrun!\n");
     }
 #endif
 
diff --git a/arch/arm/src/tiva/tiva_timerlib.c b/arch/arm/src/tiva/tiva_timerlib.c
index a9f3741d83c..a1e9f3f207b 100644
--- a/arch/arm/src/tiva/tiva_timerlib.c
+++ b/arch/arm/src/tiva/tiva_timerlib.c
@@ -3049,4 +3049,3 @@ void tiva_timer16_relmatch(TIMER_HANDLE handle, uint32_t relmatch, int tmndx)
 #endif
 }
 #endif
-