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arch/arm/src/samX/sam_gpioirq.c: fix pin base address calculation

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GPIO PIN base address calculation had double right shift, thus call
to SAM_PION_BASE was always with port = 0 instead of correct port
number. As a result, function sam_gpioirq didn't correctly configure
additional interrupt modes (only rising or falling edge and level
interrupts).

The issue occured on SAMv7 and SAM34 platforms (likely copy-pasted
from one to another).

Signed-off-by: Michal Lenc <michallenc@seznam.cz>
This commit is contained in:
Michal Lenc
2026-03-04 17:08:25 +01:00
committed by Xiang Xiao
parent 1cf0551cf0
commit e5f654f4ca
2 changed files with 2 additions and 2 deletions
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arch/arm/src/sam34/sam_gpioirq.c
+1 -1
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@@ -82,7 +82,7 @@
static inline uint32_t sam_gpiobase(gpio_pinset_t pinset) static inline uint32_t sam_gpiobase(gpio_pinset_t pinset)
{ {
int port = (pinset & GPIO_PORT_MASK) >> GPIO_PORT_SHIFT; int port = (pinset & GPIO_PORT_MASK) >> GPIO_PORT_SHIFT;
return SAM_PION_BASE(port >> GPIO_PORT_SHIFT); return SAM_PION_BASE(port);
} }
/**************************************************************************** /****************************************************************************
arch/arm/src/samv7/sam_gpioirq.c
+1 -1
View File
@@ -71,7 +71,7 @@
static inline uint32_t sam_gpiobase(gpio_pinset_t pinset) static inline uint32_t sam_gpiobase(gpio_pinset_t pinset)
{ {
int port = (pinset & GPIO_PORT_MASK) >> GPIO_PORT_SHIFT; int port = (pinset & GPIO_PORT_MASK) >> GPIO_PORT_SHIFT;
return SAM_PION_BASE(port >> GPIO_PORT_SHIFT); return SAM_PION_BASE(port);
} }
/**************************************************************************** /****************************************************************************