From e48a4edff450c9bb6926b7cfa06a06fd80d5fbd4 Mon Sep 17 00:00:00 2001 From: "chao.an" Date: Fri, 20 Aug 2021 12:36:56 +0800 Subject: [PATCH] arch/riscv/assert: enhance the assert dump enhance the assert dump to show the all tasks info including backtrace and registers [ 7.617000] [ EMERG] up_assert: Assertion failed at file:rv32im/riscv_exception.c line: 94 task: init [ 7.617000] [ EMERG] riscv_dumpstate: Call Trace: [ 7.617000] [ INFO] [BackTrace| 3|0]: 0x4202001e 0x42007cb4 0x42005782 0x42000fe2 0x403801e2 0x403800e2 0x4200bdd0 0x42009894 [ 7.617000] [ INFO] [BackTrace| 3|1]: 0x4200a62e 0x42008e8a 0x4200841e 0x42008320 0x42005ad0 0x42001a56 [ 7.617000] [ EMERG] riscv_registerdump: EPC:4200bdd0 [ 7.617000] [ EMERG] riscv_registerdump: A0:ffffffff A1:00000010 A2:3fc9a95c A3:00000031 A4:00000009 A5:00000002 A6:00000001 A7:00000074 ... ... [ 7.617000] [ EMERG] riscv_showtasks: Tasks status: [ 7.617000] [ EMERG] riscv_taskdump: Idle Task: PID=0 [ 7.617000] [ EMERG] riscv_taskdump: Stack Used=596 of 976 [ 7.617000] [ INFO] [BackTrace| 0|0]: 0x4200787e 0x3fc94ff0 [ 7.617000] [ EMERG] riscv_registerdump: EPC:4200787e [ 7.617000] [ EMERG] riscv_registerdump: A0:00000032 A1:3c1008fa A2:3fc94fa8 A3:00000000 A4:00000101 A5:00000032 A6:00000001 A7:00000074 ... [ 7.617000] [ EMERG] riscv_taskdump: [ 7.617000] [ EMERG] riscv_taskdump: hpwork: PID=1 [ 7.617000] [ EMERG] riscv_taskdump: Stack Used=292 of 2016 [ 7.617000] [ INFO] [BackTrace| 1|0]: 0x420082a6 0x4200328c 0x42001ab4 0x42001a42 [ 7.617000] [ EMERG] riscv_registerdump: EPC:420082a6 [ 7.617000] [ EMERG] riscv_registerdump: A0:00000002 A1:3fc98718 A2:3fc8307c A3:00000002 A4:00000000 A5:00000000 A6:00000000 A7:00000000 ... Change-Id: I284d9621fffd12e774d31133ba0277ba8abf8778 Signed-off-by: chao.an --- arch/risc-v/src/rv32im/riscv_assert.c | 126 +++++++++++----------- arch/risc-v/src/rv64gc/riscv_assert.c | 144 +++++++++++++------------- 2 files changed, 141 insertions(+), 129 deletions(-) diff --git a/arch/risc-v/src/rv32im/riscv_assert.c b/arch/risc-v/src/rv32im/riscv_assert.c index 59ee2584f3c..b551655fd95 100644 --- a/arch/risc-v/src/rv32im/riscv_assert.c +++ b/arch/risc-v/src/rv32im/riscv_assert.c @@ -84,32 +84,85 @@ static void riscv_stackdump(uint32_t sp, uint32_t stack_top) # define riscv_stackdump(sp, stack_top) #endif +/**************************************************************************** + * Name: riscv_registerdump + ****************************************************************************/ + +#ifdef CONFIG_ARCH_STACKDUMP +static inline void riscv_registerdump(FAR volatile uint32_t *regs) +{ + /* Are user registers available from interrupt processing? */ + + _alert("EPC:%08x \n", regs[REG_EPC]); + _alert("A0:%08x A1:%08x A2:%08x A3:%08x A4:%08x A5:%08x " + "A6:%08x A7:%08x\n", + regs[REG_A0], regs[REG_A1], regs[REG_A2], regs[REG_A3], + regs[REG_A4], regs[REG_A5], regs[REG_A6], regs[REG_A7]); + _alert("T0:%08x T1:%08x T2:%08x T3:%08x T4:%08x T5:%08x T6:%08x\n", + regs[REG_T0], regs[REG_T1], regs[REG_T2], regs[REG_T3], + regs[REG_T4], regs[REG_T5], regs[REG_T6]); + _alert("S0:%08x S1:%08x S2:%08x S3:%08x S4:%08x S5:%08x " + "S6:%08x S7:%08x\n", + regs[REG_S0], regs[REG_S1], regs[REG_S2], regs[REG_S3], + regs[REG_S4], regs[REG_S5], regs[REG_S6], regs[REG_S7]); + _alert("S8:%08x S9:%08x S10:%08x S11:%08x\n", + regs[REG_S8], regs[REG_S9], regs[REG_S10], regs[REG_S11]); +#ifdef RISCV_SAVE_GP + _alert("GP:%08x SP:%08x FP:%08x TP:%08x RA:%08x\n", + regs[REG_GP], regs[REG_SP], regs[REG_FP], regs[REG_TP], + regs[REG_RA]); +#else + _alert("SP:%08x FP:%08x TP:%08x RA:%08x\n", + regs[REG_SP], regs[REG_FP], regs[REG_TP], regs[REG_RA]); +#endif +} +#else +# define riscv_registerdump(reg) +#endif + /**************************************************************************** * Name: riscv_taskdump ****************************************************************************/ -#ifdef CONFIG_STACK_COLORATION +#if defined(CONFIG_STACK_COLORATION) || defined(CONFIG_SCHED_BACKTRACE) static void riscv_taskdump(FAR struct tcb_s *tcb, FAR void *arg) { /* Dump interesting properties of this task */ + _alert( #if CONFIG_TASK_NAME_SIZE > 0 - _alert("%s: PID=%d Stack Used=%lu of %lu\n", - tcb->name, tcb->pid, (unsigned long)up_check_tcbstack(tcb), - (unsigned long)tcb->adj_stack_size); + "%s: " +#endif + "PID=%d " +#ifdef CONFIG_STACK_COLORATION + "Stack Used=%lu of %lu\n", #else - _alert("PID: %d Stack Used=%lu of %lu\n", - tcb->pid, (unsigned long)up_check_tcbstack(tcb), + "Stack=%lu\n", +#endif +#if CONFIG_TASK_NAME_SIZE > 0 + tcb->name, +#endif + tcb->pid, +#ifdef CONFIG_STACK_COLORATION + (unsigned long)up_check_tcbstack(tcb), +#endif (unsigned long)tcb->adj_stack_size); + + /* Show back trace */ + +#ifdef CONFIG_SCHED_BACKTRACE + sched_dumpstack(tcb->pid); #endif + + /* Dump the registers */ + + riscv_registerdump(tcb->xcp.regs); } -#endif /**************************************************************************** * Name: riscv_showtasks ****************************************************************************/ -#ifdef CONFIG_STACK_COLORATION static inline void riscv_showtasks(void) { /* Dump interesting properties of each task in the crash environment */ @@ -120,55 +173,6 @@ static inline void riscv_showtasks(void) # define riscv_showtasks() #endif -/**************************************************************************** - * Name: riscv_registerdump - ****************************************************************************/ - -#ifdef CONFIG_ARCH_STACKDUMP -static inline void riscv_registerdump(void) -{ - /* Are user registers available from interrupt processing? */ - - if (g_current_regs) - { - _alert("EPC:%08x \n", - g_current_regs[REG_EPC]); - _alert("A0:%08x A1:%08x A2:%08x A3:%08x A4:%08x A5:%08x " - "A6:%08x A7:%08x\n", - g_current_regs[REG_A0], g_current_regs[REG_A1], - g_current_regs[REG_A2], g_current_regs[REG_A3], - g_current_regs[REG_A4], g_current_regs[REG_A5], - g_current_regs[REG_A6], g_current_regs[REG_A7]); - _alert("T0:%08x T1:%08x T2:%08x T3:%08x T4:%08x T5:%08x T6:%08x\n", - g_current_regs[REG_T0], g_current_regs[REG_T1], - g_current_regs[REG_T2], g_current_regs[REG_T3], - g_current_regs[REG_T4], g_current_regs[REG_T5], - g_current_regs[REG_T6]); - _alert("S0:%08x S1:%08x S2:%08x S3:%08x S4:%08x S5:%08x " - "S6:%08x S7:%08x\n", - g_current_regs[REG_S0], g_current_regs[REG_S1], - g_current_regs[REG_S2], g_current_regs[REG_S3], - g_current_regs[REG_S4], g_current_regs[REG_S5], - g_current_regs[REG_S6], g_current_regs[REG_S7]); - _alert("S8:%08x S9:%08x S10:%08x S11:%08x\n", - g_current_regs[REG_S8], g_current_regs[REG_S9], - g_current_regs[REG_S10], g_current_regs[REG_S11]); -#ifdef RISCV_SAVE_GP - _alert("GP:%08x SP:%08x FP:%08x TP:%08x RA:%08x\n", - g_current_regs[REG_GP], g_current_regs[REG_SP], - g_current_regs[REG_FP], g_current_regs[REG_TP], - g_current_regs[REG_RA]); -#else - _alert("SP:%08x FP:%08x TP:%08x RA:%08x\n", - g_current_regs[REG_SP], g_current_regs[REG_FP], - g_current_regs[REG_TP], g_current_regs[REG_RA]); -#endif - } -} -#else -# define riscv_registerdump() -#endif - /**************************************************************************** * Name: riscv_dumpstate ****************************************************************************/ @@ -185,9 +189,15 @@ static void riscv_dumpstate(void) uint32_t istacksize; #endif + /* Show back trace */ + +#ifdef CONFIG_SCHED_BACKTRACE + sched_dumpstack(rtcb->pid); +#endif + /* Dump the registers (if available) */ - riscv_registerdump(); + riscv_registerdump(CURRENT_REGS); /* Get the limits on the user stack memory */ diff --git a/arch/risc-v/src/rv64gc/riscv_assert.c b/arch/risc-v/src/rv64gc/riscv_assert.c index b9ad10df1bd..8d7c014efa5 100644 --- a/arch/risc-v/src/rv64gc/riscv_assert.c +++ b/arch/risc-v/src/rv64gc/riscv_assert.c @@ -86,32 +86,90 @@ static void up_stackdump(uint64_t sp, uintptr_t stack_top) } } +/**************************************************************************** + * Name: up_registerdump + ****************************************************************************/ + +static inline void up_registerdump(FAR volatile uintptr_t *regs) +{ + /* Are user registers available from interrupt processing? */ + + _alert("EPC:%016" PRIx64 " \n", regs[REG_EPC]); + _alert("A0:%016" PRIx64 " A1:%01" PRIx64 "6 A2:%016" PRIx64 + " A3:%016" PRIx64 " \n", + regs[REG_A0], regs[REG_A1], regs[REG_A2], regs[REG_A3]); + _alert("A4:%016" PRIx64 " A5:%016" PRIx64 "A6:%016" PRIx64 + " A7:%016" PRIx64 " \n", + regs[REG_A4], regs[REG_A5], regs[REG_A6], regs[REG_A7]); + _alert("T0:%016" PRIx64 " T1:%016" PRIx64 " T2:%016" PRIx64 + " T3:%016" PRIx64 " \n", + regs[REG_T0], regs[REG_T1], regs[REG_T2], regs[REG_T3]); + _alert("T4:%016" PRIx64 " T5:%016" PRIx64 " T6:%016" PRIx64 " \n", + regs[REG_T4], regs[REG_T5], regs[REG_T6]); + _alert("S0:%016" PRIx64 " S1:%016" PRIx64 " S2:%016" PRIx64 + " S3:%016" PRIx64 " \n", + regs[REG_S0], regs[REG_S1], regs[REG_S2], regs[REG_S3]); + _alert("S4:%016" PRIx64 " S5:%016" PRIx64 " S6:%016" PRIx64 + " S7:%016" PRIx64 " \n", + regs[REG_S4], regs[REG_S5], regs[REG_S6], regs[REG_S7]); + _alert("S8:%016" PRIx64 " S9:%016" PRIx64 " S10:%016" PRIx64 + " S11:%016" PRIx64 " \n", + regs[REG_S8], regs[REG_S9], regs[REG_S10], regs[REG_S11]); +#ifdef RISCV_SAVE_GP + _alert("GP:%016" PRIx64 " SP:%016" PRIx64 " FP:%016" PRIx64 + " TP:%016" PRIx64 " RA:%016" PRIx64 " \n", + regs[REG_GP], regs[REG_SP], regs[REG_FP], regs[REG_TP], + regs[REG_RA]); +#else + _alert("SP:%016" PRIx64 " FP:%016" PRIx64 " TP:%016" PRIx64 + " RA:%016" PRIx64 " \n", + regs[REG_SP], regs[REG_FP], regs[REG_TP], regs[REG_RA]); +#endif +} + /**************************************************************************** * Name: up_taskdump ****************************************************************************/ -#ifdef CONFIG_STACK_COLORATION +#if defined(CONFIG_STACK_COLORATION) || defined(CONFIG_SCHED_BACKTRACE) static void up_taskdump(FAR struct tcb_s *tcb, FAR void *arg) { /* Dump interesting properties of this task */ + _alert( #if CONFIG_TASK_NAME_SIZE > 0 - _alert("%s: PID=%d Stack Used=%lu of %lu\n", - tcb->name, tcb->pid, (unsigned long)up_check_tcbstack(tcb), - (unsigned long)tcb->adj_stack_size); + "%s: " +#endif + "PID=%d " +#ifdef CONFIG_STACK_COLORATION + "Stack Used=%lu of %lu\n", #else - _alert("PID: %d Stack Used=%lu of %lu\n", - tcb->pid, (unsigned long)up_check_tcbstack(tcb), + "Stack=%lu\n", +#endif +#if CONFIG_TASK_NAME_SIZE > 0 + tcb->name, +#endif + tcb->pid, +#ifdef CONFIG_STACK_COLORATION + (unsigned long)up_check_tcbstack(tcb), +#endif (unsigned long)tcb->adj_stack_size); + + /* Show back trace */ + +#ifdef CONFIG_SCHED_BACKTRACE + sched_dumpstack(tcb->pid); #endif + + /* Dump the registers */ + + up_registerdump(tcb->xcp.regs); } -#endif /**************************************************************************** * Name: up_showtasks ****************************************************************************/ -#ifdef CONFIG_STACK_COLORATION static inline void up_showtasks(void) { /* Dump interesting properties of each task in the crash environment */ @@ -122,68 +180,6 @@ static inline void up_showtasks(void) # define up_showtasks() #endif -/**************************************************************************** - * Name: up_registerdump - ****************************************************************************/ - -static inline void up_registerdump(void) -{ - /* Are user registers available from interrupt processing? */ - - if (CURRENT_REGS) - { - _alert("EPC:%016" PRIx64 " \n", - CURRENT_REGS[REG_EPC]); - - _alert("A0:%016" PRIx64 " A1:%01" PRIx64 "6 A2:%016" PRIx64 - " A3:%016" PRIx64 " \n", - CURRENT_REGS[REG_A0], CURRENT_REGS[REG_A1], - CURRENT_REGS[REG_A2], CURRENT_REGS[REG_A3]); - - _alert("A4:%016" PRIx64 " A5:%016" PRIx64 "A6:%016" PRIx64 - " A7:%016" PRIx64 " \n", - CURRENT_REGS[REG_A4], CURRENT_REGS[REG_A5], - CURRENT_REGS[REG_A6], CURRENT_REGS[REG_A7]); - - _alert("T0:%016" PRIx64 " T1:%016" PRIx64 " T2:%016" PRIx64 - " T3:%016" PRIx64 " \n", - CURRENT_REGS[REG_T0], CURRENT_REGS[REG_T1], - CURRENT_REGS[REG_T2], CURRENT_REGS[REG_T3]); - - _alert("T4:%016" PRIx64 " T5:%016" PRIx64 " T6:%016" PRIx64 " \n", - CURRENT_REGS[REG_T4], CURRENT_REGS[REG_T5], - CURRENT_REGS[REG_T6]); - - _alert("S0:%016" PRIx64 " S1:%016" PRIx64 " S2:%016" PRIx64 - " S3:%016" PRIx64 " \n", - CURRENT_REGS[REG_S0], CURRENT_REGS[REG_S1], - CURRENT_REGS[REG_S2], CURRENT_REGS[REG_S3]); - - _alert("S4:%016" PRIx64 " S5:%016" PRIx64 " S6:%016" PRIx64 - " S7:%016" PRIx64 " \n", - CURRENT_REGS[REG_S4], CURRENT_REGS[REG_S5], - CURRENT_REGS[REG_S6], CURRENT_REGS[REG_S7]); - - _alert("S8:%016" PRIx64 " S9:%016" PRIx64 " S10:%016" PRIx64 - " S11:%016" PRIx64 " \n", - CURRENT_REGS[REG_S8], CURRENT_REGS[REG_S9], - CURRENT_REGS[REG_S10], CURRENT_REGS[REG_S11]); - -#ifdef RISCV_SAVE_GP - _alert("GP:%016" PRIx64 " SP:%016" PRIx64 " FP:%016" PRIx64 - " TP:%016" PRIx64 " RA:%016" PRIx64 " \n", - CURRENT_REGS[REG_GP], CURRENT_REGS[REG_SP], - CURRENT_REGS[REG_FP], CURRENT_REGS[REG_TP], - CURRENT_REGS[REG_RA]); -#else - _alert("SP:%016" PRIx64 " FP:%016" PRIx64 " TP:%016" PRIx64 - " RA:%016" PRIx64 " \n", - CURRENT_REGS[REG_SP], CURRENT_REGS[REG_FP], - CURRENT_REGS[REG_TP], CURRENT_REGS[REG_RA]); -#endif - } -} - /**************************************************************************** * Name: up_dumpstate ****************************************************************************/ @@ -199,9 +195,15 @@ static void up_dumpstate(void) uintptr_t istacksize; #endif + /* Show back trace */ + +#ifdef CONFIG_SCHED_BACKTRACE + sched_dumpstack(rtcb->pid); +#endif + /* Dump the registers (if available) */ - up_registerdump(); + up_registerdump(CURRENT_REGS); /* Get the limits on the user stack memory */