diff --git a/arch/arm/src/a1x/a1x_boot.c b/arch/arm/src/a1x/a1x_boot.c index 731e46e6fdb..59d675661ab 100644 --- a/arch/arm/src/a1x/a1x_boot.c +++ b/arch/arm/src/a1x/a1x_boot.c @@ -188,7 +188,7 @@ static void a1x_vectormapping(void) while (vector_paddr < end_paddr) { - mmu_l2_setentry(VECTOR_L2_VBASE, vector_paddr, vector_vaddr, + mmu_l2_setentry(VECTOR_L2_VBASE, vector_paddr, vector_vaddr, MMU_L2_VECTORFLAGS); vector_paddr += 4096; vector_vaddr += 4096; diff --git a/arch/arm/src/am335x/am335x_boot.c b/arch/arm/src/am335x/am335x_boot.c index 4a96276f6a3..ee68fad9adb 100644 --- a/arch/arm/src/am335x/am335x_boot.c +++ b/arch/arm/src/am335x/am335x_boot.c @@ -272,7 +272,7 @@ static void am335x_vectormapping(void) while (vector_paddr < end_paddr) { - mmu_l2_setentry(VECTOR_L2_VBASE, vector_paddr, vector_vaddr, + mmu_l2_setentry(VECTOR_L2_VBASE, vector_paddr, vector_vaddr, MMU_L2_VECTORFLAGS); vector_paddr += 4096; vector_vaddr += 4096; diff --git a/arch/arm/src/dm320/Make.defs b/arch/arm/src/dm320/Make.defs index 349f9ef3aba..5507bcbabf9 100644 --- a/arch/arm/src/dm320/Make.defs +++ b/arch/arm/src/dm320/Make.defs @@ -20,6 +20,8 @@ include arm/Make.defs +CFLAGS += -Wno-array-bounds + CHIP_ASRCS = dm320_lowputc.S dm320_restart.S CHIP_CSRCS = dm320_allocateheap.c dm320_boot.c dm320_decodeirq.c diff --git a/arch/arm/src/dm320/dm320_boot.c b/arch/arm/src/dm320/dm320_boot.c index b1ace974949..c64ce1032ff 100644 --- a/arch/arm/src/dm320/dm320_boot.c +++ b/arch/arm/src/dm320/dm320_boot.c @@ -102,7 +102,7 @@ static inline void up_setlevel2coarseentry(uint32_t ctabvaddr, uint32_t paddr, uint32_t vaddr, uint32_t mmuflags) { - uint32_t *ctable = (uint32_t *)ctabvaddr; + uint32_t *ctable = (uint32_t *)ctabvaddr; uint32_t index; /* The coarse table divides a 1Mb address space up into 256 entries, each diff --git a/arch/arm/src/imx6/imx_boot.c b/arch/arm/src/imx6/imx_boot.c index a78eda0c2f5..764943cbd7a 100644 --- a/arch/arm/src/imx6/imx_boot.c +++ b/arch/arm/src/imx6/imx_boot.c @@ -179,7 +179,7 @@ static void imx_vectormapping(void) while (vector_paddr < end_paddr) { - mmu_l2_setentry(VECTOR_L2_VBASE, vector_paddr, vector_vaddr, + mmu_l2_setentry(VECTOR_L2_VBASE, vector_paddr, vector_vaddr, MMU_L2_VECTORFLAGS); vector_paddr += 4096; vector_vaddr += 4096; diff --git a/arch/arm/src/lpc31xx/Make.defs b/arch/arm/src/lpc31xx/Make.defs index 93d02ce3c8b..c625fc0b1df 100644 --- a/arch/arm/src/lpc31xx/Make.defs +++ b/arch/arm/src/lpc31xx/Make.defs @@ -20,6 +20,8 @@ include arm/Make.defs +CFLAGS += -Wno-array-bounds + CGU_CSRCS = lpc31_bcrndx.c lpc31_clkdomain.c lpc31_clkexten.c CGU_CSRCS += lpc31_clkfreq.c lpc31_clkinit.c lpc31_defclk.c CGU_CSRCS += lpc31_esrndx.c lpc31_fdcndx.c lpc31_fdivinit.c diff --git a/arch/arm/src/lpc31xx/lpc31_boot.c b/arch/arm/src/lpc31xx/lpc31_boot.c index 913c8687568..9618c2b3818 100644 --- a/arch/arm/src/lpc31xx/lpc31_boot.c +++ b/arch/arm/src/lpc31xx/lpc31_boot.c @@ -139,7 +139,7 @@ static inline void up_setlevel2coarseentry(uint32_t ctabvaddr, uint32_t vaddr, uint32_t mmuflags) { - uint32_t *ctable = (uint32_t *)ctabvaddr; + uint32_t *ctable = (uint32_t *)ctabvaddr; uint32_t index; /* The coarse table divides a 1Mb address space up into 256 entries, each @@ -246,7 +246,7 @@ static void up_vectormapping(void) while (vector_paddr < end_paddr) { - up_setlevel2coarseentry(PGTABLE_L2_COARSE_VBASE, vector_paddr, + up_setlevel2coarseentry(PGTABLE_L2_COARSE_VBASE, vector_paddr, vector_vaddr, MMU_L2_VECTORFLAGS); vector_paddr += 4096; vector_vaddr += 4096; diff --git a/arch/arm/src/rp2040/Make.defs b/arch/arm/src/rp2040/Make.defs index 9b978bb0d75..76aab709273 100644 --- a/arch/arm/src/rp2040/Make.defs +++ b/arch/arm/src/rp2040/Make.defs @@ -20,6 +20,8 @@ include armv6-m/Make.defs +CFLAGS += -Wno-array-bounds + CHIP_CSRCS += rp2040_idle.c CHIP_CSRCS += rp2040_irq.c CHIP_CSRCS += rp2040_uart.c diff --git a/arch/arm/src/sama5/sam_boot.c b/arch/arm/src/sama5/sam_boot.c index bc9a0bb0fe0..7efbb28f8ec 100644 --- a/arch/arm/src/sama5/sam_boot.c +++ b/arch/arm/src/sama5/sam_boot.c @@ -181,7 +181,7 @@ static void sam_vectormapping(void) while (vector_paddr < end_paddr) { - mmu_l2_setentry(VECTOR_L2_VBASE, vector_paddr, vector_vaddr, + mmu_l2_setentry(VECTOR_L2_VBASE, vector_paddr, vector_vaddr, MMU_L2_VECTORFLAGS); vector_paddr += 4096; vector_vaddr += 4096;