diff --git a/arch/arm/src/armv7-m/up_dcache.c b/arch/arm/src/armv7-m/up_dcache.c new file mode 100644 index 00000000000..30713cf3dcc --- /dev/null +++ b/arch/arm/src/armv7-m/up_dcache.c @@ -0,0 +1,429 @@ +/**************************************************************************** + * arch/arm/src/armv7-m/up_dcache.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Some logic in this header file derives from the ARM CMSIS core_cm7.h + * header file which has a compatible 3-clause BSD license: + * + * Copyright (c) 2009 - 2014 ARM LIMITED. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name ARM, NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include "cache.h" + +#ifdef CONFIG_ARMV7M_DCACHE + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: arch_enable_dcache + * + * Description: + * Enable the D-Cache + * + * Input Parameters: + * None + * + * Returned Value: + * None + * + ****************************************************************************/ + +void arch_enable_dcache(void) +{ + uint32_t ccsidr; + uint32_t ccr; + uint32_t sshift; + uint32_t wshift; + uint32_t sw; + uint32_t sets; + uint32_t ways; + + /* Get the characteristics of the D-Cache */ + + ccsidr = getreg32(NVIC_CCSIDR); + sets = CCSIDR_SETS(ccsidr); + sshift = CCSIDR_LSSHIFT(ccsidr) + 4; + ways = CCSIDR_WAYS(ccsidr); + wshift = arm_clz(ways) & 0x1f; + + /* Invalidate the D-Cache */ + + ARM_DSB(); + do + { + int32_t tmpways = ways; + + do + { + sw = ((tmpways << wshift) | (sets << sshift)); + putreg32(sw, NVIC_DCISW); + } + while (tmpways--); + } + while(sets--); + ARM_DSB(); + + /* Enable the D-Cache */ + + ccr = getreg32(NVIC_CFGCON); + ccr |= NVIC_CFGCON_DC; + putreg32(ccr, NVIC_CFGCON); + + ARM_DSB(); + ARM_ISB(); +} + +/**************************************************************************** + * Name: arch_disable_dcache + * + * Description: + * Disable the D-Cache + * + * Input Parameters: + * None + * + * Returned Value: + * None + * + ****************************************************************************/ + +void arch_disable_dcache(void) +{ + uint32_t ccsidr; + uint32_t ccr; + uint32_t sshift; + uint32_t wshift; + uint32_t sw; + uint32_t sets; + uint32_t ways; + + /* Get the characteristics of the D-Cache */ + + ccsidr = getreg32(NVIC_CCSIDR); + sets = CCSIDR_SETS(ccsidr); + sshift = CCSIDR_LSSHIFT(ccsidr) + 4; + ways = CCSIDR_WAYS(ccsidr); + wshift = arm_clz(ways) & 0x1f; + + ARM_DSB(); + + /* Disable the D-Cache */ + + ccr = getreg32(NVIC_CFGCON); + ccr &= ~NVIC_CFGCON_DC; + putreg32(ccr, NVIC_CFGCON); + + /* Clean and invalidate the D-Cache */ + + do + { + int32_t tmpways = ways; + + do + { + sw = ((tmpways << wshift) | (sets << sshift)); + putreg32(sw, NVIC_DCCISW); + } + while (tmpways--); + } + while (sets--); + + ARM_DSB(); + ARM_ISB(); +} + +/**************************************************************************** + * Name: arch_invalidate_dcache + * + * Description: + * Invalidate the data cache within the specified region; we will be + * performing a DMA operation in this region and we want to purge old data + * in the cache. + * + * Input Parameters: + * start - virtual start address of region + * end - virtual end address of region + 1 + * + * Returned Value: + * None + * + * Assumptions: + * This operation is not atomic. This function assumes that the caller + * has exclusive access to the address range so that no harm is done if + * the operation is pre-empted. + * + ****************************************************************************/ + +#if 0 /* Not implemented */ +void arch_invalidate_dcache(uintptr_t start, uintptr_t end) +{ +#warning Missing logic +} +#endif + +/**************************************************************************** + * Name: arch_invalidate_dcache_all + * + * Description: + * Invalidate the entire contents of D cache. + * + * Input Parameters: + * None + * + * Returned Value: + * None + * + ****************************************************************************/ + +void arch_invalidate_dcache_all(void) +{ + uint32_t ccsidr; + uint32_t sshift; + uint32_t wshift; + uint32_t sw; + uint32_t sets; + uint32_t ways; + + /* Get the characteristics of the D-Cache */ + + ccsidr = getreg32(NVIC_CCSIDR); + sets = CCSIDR_SETS(ccsidr); + sshift = CCSIDR_LSSHIFT(ccsidr) + 4; + ways = CCSIDR_WAYS(ccsidr); + wshift = arm_clz(ways) & 0x1f; + + ARM_DSB(); + + /* Invalidate D-Cache */ + + do + { + int32_t tmpways = ways; + + do + { + sw = ((tmpways << wshift) | (sets << sshift)); + putreg32(sw, NVIC_DCISW); + } + while (tmpways--); + } + while (sets--); + + ARM_DSB(); + ARM_ISB(); +} + +/**************************************************************************** + * Name: arch_clean_dcache + * + * Description: + * Clean the data cache within the specified region by flushing the + * contents of the data cache to memory. + * + * Input Parameters: + * start - virtual start address of region + * end - virtual end address of region + 1 + * + * Returned Value: + * None + * + * Assumptions: + * This operation is not atomic. This function assumes that the caller + * has exclusive access to the address range so that no harm is done if + * the operation is pre-empted. + * + ****************************************************************************/ + +#if 0 /* Not implemented */ +void arch_clean_dcache(uintptr_t start, uintptr_t end) +{ +#warning Missing logic +} +#endif + +/**************************************************************************** + * Name: arch_clean_dcache_all + * + * Description: + * Clean the entire data cache within the specified region by flushing the + * contents of the data cache to memory. + * + * Input Parameters: + * None + * + * Returned Value: + * None + * + * Assumptions: + * This operation is not atomic. This function assumes that the caller + * has exclusive access to the address range so that no harm is done if + * the operation is pre-empted. + * + ****************************************************************************/ + +void arch_clean_dcache_all(void) +{ + uint32_t ccsidr; + uint32_t sshift; + uint32_t wshift; + uint32_t sw; + uint32_t sets; + uint32_t ways; + + /* Get the characteristics of the D-Cache */ + + ccsidr = getreg32(NVIC_CCSIDR); + sets = CCSIDR_SETS(ccsidr); + sshift = CCSIDR_LSSHIFT(ccsidr) + 4; + ways = CCSIDR_WAYS(ccsidr); + wshift = arm_clz(ways) & 0x1f; + + ARM_DSB(); + + /* Clean D-Cache */ + + do + { + int32_t tmpways = ways; + + do + { + sw = ((tmpways << wshift) | (sets << sshift)); + putreg32(sw, NVIC_DCCSW); + } + while (tmpways--); + } + while(sets--); + + ARM_DSB(); + ARM_ISB(); +} + +/**************************************************************************** + * Name: arch_flush_dcache + * + * Description: + * Flush the data cache within the specified region by cleaning and + * invalidating the D cache. + * + * Input Parameters: + * start - virtual start address of region + * end - virtual end address of region + 1 + * + * Returned Value: + * None + * + * Assumptions: + * This operation is not atomic. This function assumes that the caller + * has exclusive access to the address range so that no harm is done if + * the operation is pre-empted. + * + ****************************************************************************/ + +#if 0 /* Not implemented */ +void arch_flush_dcache(uintptr_t start, uintptr_t end) +{ +#warning Missing logic +} +#endif + +/**************************************************************************** + * Name: arch_flush_dcache_all + * + * Description: + * Flush the entire data cache by cleaning and invalidating the D cache. + * + * Input Parameters: + * None + * + * Returned Value: + * None + * + * Assumptions: + * This operation is not atomic. This function assumes that the caller + * has exclusive access to the address range so that no harm is done if + * the operation is pre-empted. + * + ****************************************************************************/ + +void arch_flush_dcache_all(void) +{ + uint32_t ccsidr; + uint32_t sshift; + uint32_t wshift; + uint32_t sw; + uint32_t sets; + uint32_t ways; + + /* Get the characteristics of the D-Cache */ + + ccsidr = getreg32(NVIC_CCSIDR); + sets = CCSIDR_SETS(ccsidr); + sshift = CCSIDR_LSSHIFT(ccsidr) + 4; + ways = CCSIDR_WAYS(ccsidr); + wshift = arm_clz(ways) & 0x1f; + + ARM_DSB(); + + /* Clean and invalidate D-Cache */ + + do + { + int32_t tmpways = ways; + + do + { + sw = ((tmpways << wshift) | (sets << sshift)); + putreg32(sw, NVIC_DCCISW); + } + while (tmpways--); + } + while (sets--); + + ARM_DSB(); + ARM_ISB(); +} + +#endif /* CONFIG_ARMV7M_DCACHE */