nuttx: Fix the nightly build warning again

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
This commit is contained in:
Xiang Xiao
2020-04-14 14:35:23 +08:00
committed by Alin Jerpelea
parent e80fe4ba3d
commit df57cacd61
4 changed files with 31 additions and 46 deletions
+2 -32
View File
@@ -478,8 +478,6 @@ static inline void stm32l4_i2c_putreg32(FAR struct stm32l4_i2c_priv_s *priv,
static inline void stm32l4_i2c_modifyreg32(FAR struct stm32l4_i2c_priv_s *priv, static inline void stm32l4_i2c_modifyreg32(FAR struct stm32l4_i2c_priv_s *priv,
uint8_t offset, uint32_t clearbits, uint8_t offset, uint32_t clearbits,
uint32_t setbits); uint32_t setbits);
static inline int stm32l4_i2c_sem_wait(FAR struct i2c_master_s *dev);
static int stm32l4_i2c_sem_wait_noncancelable(FAR struct i2c_master_s *dev);
#ifdef CONFIG_STM32L4_I2C_DYNTIMEO #ifdef CONFIG_STM32L4_I2C_DYNTIMEO
static useconds_t stm32l4_i2c_tousecs(int msgc, FAR struct i2c_msg_s *msgs); static useconds_t stm32l4_i2c_tousecs(int msgc, FAR struct i2c_msg_s *msgs);
#endif /* CONFIG_STM32L4_I2C_DYNTIMEO */ #endif /* CONFIG_STM32L4_I2C_DYNTIMEO */
@@ -737,34 +735,6 @@ static inline void stm32l4_i2c_modifyreg32(FAR struct stm32l4_i2c_priv_s *priv,
modifyreg32(priv->config->base + offset, clearbits, setbits); modifyreg32(priv->config->base + offset, clearbits, setbits);
} }
/************************************************************************************
* Name: stm32l4_i2c_sem_wait
*
* Description:
* Take the exclusive access, waiting as necessary. May be interrupted by a
* signal.
*
************************************************************************************/
static inline int stm32l4_i2c_sem_wait(FAR struct i2c_master_s *dev)
{
return nxsem_wait(&((struct stm32l4_i2c_inst_s *)dev)->priv->sem_excl);
}
/************************************************************************************
* Name: stm32l4_i2c_sem_wait_noncancelable
*
* Description:
* Take the exclusive access, waiting as necessary
*
************************************************************************************/
static int stm32l4_i2c_sem_wait_noncancelable(FAR struct i2c_master_s *dev)
{
return
nxsem_wait_uninterruptible(&((struct stm32l4_i2c_inst_s *)dev)->priv->sem_excl);
}
/************************************************************************************ /************************************************************************************
* Name: stm32l4_i2c_tousecs * Name: stm32l4_i2c_tousecs
* *
@@ -2687,7 +2657,7 @@ static int stm32l4_i2c_transfer(FAR struct i2c_master_s *dev,
/* Ensure that address or flags don't change meanwhile */ /* Ensure that address or flags don't change meanwhile */
ret = stm32l4_i2c_sem_wait(dev); ret = nxsem_wait(&((struct stm32l4_i2c_inst_s *)dev)->priv->sem_excl);
if (ret >= 0) if (ret >= 0)
{ {
ret = stm32l4_i2c_process(dev, msgs, count); ret = stm32l4_i2c_process(dev, msgs, count);
@@ -2727,7 +2697,7 @@ static int stm32l4_i2c_reset(FAR struct i2c_master_s * dev)
/* Lock out other clients */ /* Lock out other clients */
ret = stm32l4_i2c_sem_wait_noncancelable(dev); ret = nxsem_wait_uninterruptible(&priv->sem_excl);
if (ret < 0) if (ret < 0)
{ {
return ret; return ret;
@@ -48,8 +48,6 @@
#include <arch/board/board.h> #include <arch/board/board.h>
#include <arch/chip/audio.h> #include <arch/chip/audio.h>
#include <arch/board/cxd56_clock.h>
#include "cxd56_audio_config.h" #include "cxd56_audio_config.h"
#include "cxd56_audio_analog.h" #include "cxd56_audio_analog.h"
#include "cxd56_audio_aca.h" #include "cxd56_audio_aca.h"
@@ -60,6 +58,14 @@
#define AUD_MCLK_EXT (0u<<16) /* External XTAL */ #define AUD_MCLK_EXT (0u<<16) /* External XTAL */
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
void cxd56_audio_clock_enable(uint32_t clk, uint32_t div);
void cxd56_audio_clock_disable(void);
bool cxd56_audio_clock_is_enabled(void);
/**************************************************************************** /****************************************************************************
* Private Data * Private Data
****************************************************************************/ ****************************************************************************/
+19 -12
View File
@@ -120,7 +120,7 @@ static uint8_t spi_status(FAR struct spi_dev_s *dev, uint32_t devid);
#ifdef CONFIG_SPI_CMDDATA #ifdef CONFIG_SPI_CMDDATA
static int spi_cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd); static int spi_cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd);
#endif #endif
static uint16_t spi_send(FAR struct spi_dev_s *dev, uint16_t ch); static uint32_t spi_send(FAR struct spi_dev_s *dev, uint32_t ch);
static void spi_sndblock(FAR struct spi_dev_s *dev, FAR const void *buffer, static void spi_sndblock(FAR struct spi_dev_s *dev, FAR const void *buffer,
size_t nwords); size_t nwords);
static void spi_recvblock(FAR struct spi_dev_s *dev, FAR void *buffer, static void spi_recvblock(FAR struct spi_dev_s *dev, FAR void *buffer,
@@ -145,7 +145,11 @@ static const struct spi_ops_s g_spiops =
.registercallback = 0, /* Not implemented */ .registercallback = 0, /* Not implemented */
}; };
static struct spi_dev_s g_spidev = {&g_spiops}; static struct spi_dev_s g_spidev =
{
&g_spiops
};
static sem_t g_exclsem = SEM_INITIALIZER(1); /* For mutually exclusive access */ static sem_t g_exclsem = SEM_INITIALIZER(1); /* For mutually exclusive access */
/**************************************************************************** /****************************************************************************
@@ -187,7 +191,7 @@ static int spi_lock(FAR struct spi_dev_s *dev, bool lock)
} }
else else
{ {
ret= nxsem_post(&g_exclsem); ret = nxsem_post(&g_exclsem);
} }
return ret; return ret;
@@ -232,7 +236,8 @@ static void spi_select(FAR struct spi_dev_s *dev, uint32_t devid,
/* Enable slave select (low enables) */ /* Enable slave select (low enables) */
putreg32(bit, CS_CLR_REGISTER); putreg32(bit, CS_CLR_REGISTER);
spiinfo("CS asserted: %08x->%08x\n", regval, getreg32(CS_PIN_REGISTER)); spiinfo("CS asserted: %08x->%08x\n",
regval, getreg32(CS_PIN_REGISTER));
} }
else else
{ {
@@ -405,7 +410,7 @@ static int spi_cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd)
* *
****************************************************************************/ ****************************************************************************/
static uint16_t spi_send(FAR struct spi_dev_s *dev, uint16_t wd) static uint32_t spi_send(FAR struct spi_dev_s *dev, uint32_t wd)
{ {
register uint16_t regval; register uint16_t regval;
@@ -486,8 +491,8 @@ static void spi_sndblock(FAR struct spi_dev_s *dev, FAR const void *buffer,
getreg16(LPC214X_SPI1_DR); getreg16(LPC214X_SPI1_DR);
} }
/* There is a race condition where TFE may go true just before /* There is a race condition where TFE may go true just before RNE
* RNE goes true and this loop terminates prematurely. The nasty little * goes true and this loop terminates prematurely. The nasty little
* delay in the following solves that (it could probably be tuned * delay in the following solves that (it could probably be tuned
* to improve performance). * to improve performance).
*/ */
@@ -524,10 +529,12 @@ static void spi_sndblock(FAR struct spi_dev_s *dev, FAR const void *buffer,
static void spi_recvblock(FAR struct spi_dev_s *dev, FAR void *buffer, static void spi_recvblock(FAR struct spi_dev_s *dev, FAR void *buffer,
size_t nwords) size_t nwords)
{ {
FAR uint8_t *ptr = (FAR uint8_t*)buffer; FAR uint8_t *ptr = (FAR uint8_t *)buffer;
uint32_t rxpending = 0; uint32_t rxpending = 0;
/* While there is remaining to be sent (and no synchronization error has occurred) */ /* While there is remaining to be sent
* (and no synchronization error has occurred)
*/
spiinfo("nwords: %d\n", nwords); spiinfo("nwords: %d\n", nwords);
while (nwords || rxpending) while (nwords || rxpending)
@@ -547,7 +554,7 @@ static void spi_recvblock(FAR struct spi_dev_s *dev, FAR void *buffer,
rxpending++; rxpending++;
} }
/* Now, read the RX data from the RX FIFO while the RX FIFO is not empty */ /* Now, read RX data from RX FIFO while RX FIFO is not empty */
spiinfo("RX: rxpending: %d\n", rxpending); spiinfo("RX: rxpending: %d\n", rxpending);
while (getreg8(LPC214X_SPI1_SR) & LPC214X_SPI1SR_RNE) while (getreg8(LPC214X_SPI1_SR) & LPC214X_SPI1SR_RNE)
@@ -595,8 +602,8 @@ FAR struct spi_dev_s *lpc214x_spibus_initialize(int port)
* *
* PINSEL1 P0.17/CAP1.2/SCK1/MAT1.2 Bits 2-3=10 for SCK1 * PINSEL1 P0.17/CAP1.2/SCK1/MAT1.2 Bits 2-3=10 for SCK1
* PINSEL1 P0.18/CAP1.3/MISO1/MAT1.3 Bits 4-5=10 for MISO1 * PINSEL1 P0.18/CAP1.3/MISO1/MAT1.3 Bits 4-5=10 for MISO1
* (This is the RESET line for the UG_2864AMBAG01, * (This is the RESET line for the UG_2864AMBAG01,
* although it is okay to configure it as an input too) * although it is okay to configure it as an input too)
* PINSEL1 P0.19/MAT1.2/MOSI1/CAP1.2 Bits 6-7=10 for MOSI1 * PINSEL1 P0.19/MAT1.2/MOSI1/CAP1.2 Bits 6-7=10 for MOSI1
* PINSEL1 P0.20/MAT1.3/SSEL1/EINT3 Bits 8-9=00 for P0.20 * PINSEL1 P0.20/MAT1.3/SSEL1/EINT3 Bits 8-9=00 for P0.20
* (we'll control it via GPIO or FIO) * (we'll control it via GPIO or FIO)
+2
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@@ -297,9 +297,11 @@ int local_pollsetup(FAR struct socket *psock, FAR struct pollfd *fds)
ret = OK; ret = OK;
break; break;
} }
#endif
return ret; return ret;
#ifdef CONFIG_NET_LOCAL_STREAM
pollerr: pollerr:
fds->revents |= POLLERR; fds->revents |= POLLERR;
nxsem_post(fds->sem); nxsem_post(fds->sem);