From dedf9045c13416e23f2155d9a546ae2ca8af7353 Mon Sep 17 00:00:00 2001 From: Eren Terzioglu Date: Tue, 17 Mar 2026 14:04:02 +0100 Subject: [PATCH] arch/risc-v/espressif: Add lpcore support for esp32p4 Add ULP lpcore support for esp32p4 Signed-off-by: Eren Terzioglu --- arch/risc-v/src/common/espressif/Kconfig | 2 +- arch/risc-v/src/common/espressif/Make.defs | 2 +- arch/risc-v/src/common/espressif/esp_ulp.c | 2 -- arch/risc-v/src/common/espressif/esp_ulp.mk | 28 ++++++++++++++++++ arch/risc-v/src/common/espressif/ulp_makefile | 29 +++++++++++++++++++ arch/risc-v/src/esp32p4/.gitignore | 1 + arch/risc-v/src/esp32p4/Make.defs | 3 ++ arch/risc-v/src/esp32p4/hal_esp32p4.mk | 15 ++++++++++ 8 files changed, 78 insertions(+), 4 deletions(-) create mode 100644 arch/risc-v/src/common/espressif/ulp_makefile diff --git a/arch/risc-v/src/common/espressif/Kconfig b/arch/risc-v/src/common/espressif/Kconfig index 67b97ca7393..1ffba391b51 100644 --- a/arch/risc-v/src/common/espressif/Kconfig +++ b/arch/risc-v/src/common/espressif/Kconfig @@ -434,7 +434,7 @@ menu "LP Core (Low-power core) Coprocessor Configuration" config ESPRESSIF_USE_LP_CORE bool "Enable LP Coprocessor" - depends on ARCH_CHIP_ESP32C6 + depends on ARCH_CHIP_ESP32C6 || ARCH_CHIP_ESP32P4 ---help--- Enable LP core (Low-power core) coprocessor diff --git a/arch/risc-v/src/common/espressif/Make.defs b/arch/risc-v/src/common/espressif/Make.defs index f1d10a6439c..9a204c4d7df 100644 --- a/arch/risc-v/src/common/espressif/Make.defs +++ b/arch/risc-v/src/common/espressif/Make.defs @@ -207,7 +207,7 @@ endif ESP_HAL_3RDPARTY_REPO = esp-hal-3rdparty ifndef ESP_HAL_3RDPARTY_VERSION - ESP_HAL_3RDPARTY_VERSION = 6c272b562a73107a852d44b9c6fb5df57245cbd7 + ESP_HAL_3RDPARTY_VERSION = 41b8c5f12063f6cce5796ce50b5eb4bd2ceeeb12 endif ifndef ESP_HAL_3RDPARTY_URL diff --git a/arch/risc-v/src/common/espressif/esp_ulp.c b/arch/risc-v/src/common/espressif/esp_ulp.c index 4c2fc30b47e..de242d3db08 100644 --- a/arch/risc-v/src/common/espressif/esp_ulp.c +++ b/arch/risc-v/src/common/espressif/esp_ulp.c @@ -205,7 +205,6 @@ static void esp_ulp_register(void) int esp_ulp_load_bin(const char *buffer, size_t buflen) { int ret = ERROR; - ulp_lp_core_stop(); ret = ulp_lp_core_load_binary((const uint8_t *)buffer, buflen); ulp_lp_core_run(&cfg); return ret; @@ -228,5 +227,4 @@ int esp_ulp_load_bin(const char *buffer, size_t buflen) void esp_ulp_init(void) { esp_ulp_register(); - ulp_lp_core_run(&cfg); } diff --git a/arch/risc-v/src/common/espressif/esp_ulp.mk b/arch/risc-v/src/common/espressif/esp_ulp.mk index f6aedfcbdaf..12398cb1def 100644 --- a/arch/risc-v/src/common/espressif/esp_ulp.mk +++ b/arch/risc-v/src/common/espressif/esp_ulp.mk @@ -84,6 +84,23 @@ ULP_INCLUDES += $(INCDIR_PREFIX)$(CHIP)$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)c ULP_INCLUDES += $(INCDIR_PREFIX)$(CHIP)$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)ulp$(DELIM)lp_core$(DELIM)lp_core$(DELIM)include ULP_INCLUDES += $(INCDIR_PREFIX)$(CHIP)$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)ulp$(DELIM)lp_core$(DELIM)shared$(DELIM)include ULP_INCLUDES += $(INCDIR_PREFIX)$(CHIP)$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)upper_hal_uart$(DELIM)include +ifeq ($(CONFIG_ARCH_CHIP_ESP32P4),y) + ifeq ($(CONFIG_ESP32P4_REV_MIN_300),y) + ULP_INCLUDES += $(INCDIR_PREFIX)$(CHIP)$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)register$(DELIM)hw_ver3 + ULP_INCLUDES += $(INCDIR_PREFIX)$(CHIP)$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)register$(DELIM)soc$(DELIM) + else + ULP_INCLUDES += $(INCDIR_PREFIX)$(CHIP)$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)register$(DELIM)hw_ver1 + ULP_INCLUDES += $(INCDIR_PREFIX)$(CHIP)$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)register$(DELIM)soc$(DELIM) + endif + ULP_INCLUDES += $(INCDIR_PREFIX)$(CHIP)$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_adc$(DELIM)include + ULP_INCLUDES += $(INCDIR_PREFIX)$(CHIP)$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_adc$(DELIM)$(CHIP_SERIES)$(DELIM)include + ULP_INCLUDES += $(INCDIR_PREFIX)$(CHIP)$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_i2s$(DELIM)include + ULP_INCLUDES += $(INCDIR_PREFIX)$(CHIP)$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_i2s$(DELIM)$(CHIP_SERIES)$(DELIM)include + ULP_INCLUDES += $(INCDIR_PREFIX)$(CHIP)$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_touch_sens$(DELIM)include + ULP_INCLUDES += $(INCDIR_PREFIX)$(CHIP)$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_touch_sens$(DELIM)$(CHIP_SERIES)$(DELIM)include + ULP_INCLUDES += $(INCDIR_PREFIX)$(CHIP)$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)ld + ULP_INCLUDES += $(INCDIR_PREFIX)$(CHIP)$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)upper_hal_i2s$(DELIM)include +endif ULP_INCLUDES += $(INCDIR_PREFIX)$(CHIP)$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)nuttx$(DELIM)include ULP_INCLUDES += $(INCDIR_PREFIX)$(CHIP)$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)nuttx$(DELIM)$(CHIP_SERIES)$(DELIM)include @@ -93,6 +110,12 @@ ULP_INCLUDES += $(INCDIR_PREFIX)$(CHIP)$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)n ULP_LDINCLUDES += -T$(CHIP)$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).peripherals.ld ULP_LDINCLUDES += -T$(ULP_FOLDER)$(DELIM)ulp_sections.ld +ifeq ($(CONFIG_ARCH_CHIP_ESP32P4),y) + ULP_LDINCLUDES += -T$(CHIP)$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES)lp.rom.ld + ULP_LDINCLUDES += -T$(CHIP)$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES)lp.rom.newlib.ld + ULP_LDINCLUDES += -T$(CHIP)$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES)lp.rom.version.ld + ULP_LDINCLUDES += -T$(CHIP)$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES)lp.rom.api.ld +endif # Source files @@ -118,6 +141,11 @@ ULP_CSOURCES += $(CHIP)$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM ULP_CSOURCES += $(CHIP)$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)ulp$(DELIM)lp_core$(DELIM)shared$(DELIM)ulp_lp_core_lp_adc_shared.c ULP_CSOURCES += $(CHIP)$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)ulp$(DELIM)lp_core$(DELIM)shared$(DELIM)ulp_lp_core_lp_vad_shared.c ULP_CSOURCES += $(CHIP)$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)ulp$(DELIM)lp_core$(DELIM)shared$(DELIM)ulp_lp_core_critical_section_shared.c +ifeq ($(CONFIG_ARCH_CHIP_ESP32P4),y) + ULP_CSOURCES += $(CHIP)$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)ulp$(DELIM)lp_core$(DELIM)lp_core$(DELIM)lp_core_touch.c + ULP_CSOURCES += $(CHIP)$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)ulp$(DELIM)lp_core$(DELIM)lp_core$(DELIM)port$(DELIM)lp_core_mailbox_impl_hw.c + ULP_CSOURCES += $(CHIP)$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)ulp$(DELIM)lp_core$(DELIM)lp_core$(DELIM)lp_core_mailbox.c +endif # Add ULP app source files and directories diff --git a/arch/risc-v/src/common/espressif/ulp_makefile b/arch/risc-v/src/common/espressif/ulp_makefile new file mode 100644 index 00000000000..0757eca557f --- /dev/null +++ b/arch/risc-v/src/common/espressif/ulp_makefile @@ -0,0 +1,29 @@ +############################################################################ +# arch/risc-v/src/common/espressif/ulp_makefile +# +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed to the Apache Software Foundation (ASF) under one or more +# contributor license agreements. See the NOTICE file distributed with +# this work for additional information regarding copyright ownership. The +# ASF licenses this file to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance with the +# License. You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT +# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the +# License for the specific language governing permissions and limitations +# under the License. +# +############################################################################ + +ULP_APP_USE_TEST_BIN = y + +ULP_APP_NAME = esp_ulp +ULP_APP_FOLDER = $(TOPDIR)$(DELIM)arch$(DELIM)risc-v$(DELIM)src$(DELIM)$(CHIP_SERIES) +ULP_APP_BIN = $(TOPDIR)$(DELIM)Documentation$(DELIM)platforms$(DELIM)risc-v$(DELIM)$(CONFIG_ARCH_CHIP)$(DELIM)boards$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)ulp_blink.bin + +include $(TOPDIR)$(DELIM)arch$(DELIM)risc-v$(DELIM)src$(DELIM)common$(DELIM)espressif$(DELIM)esp_ulp.mk diff --git a/arch/risc-v/src/esp32p4/.gitignore b/arch/risc-v/src/esp32p4/.gitignore index d40b86f3a0d..4f35cf6fd45 100644 --- a/arch/risc-v/src/esp32p4/.gitignore +++ b/arch/risc-v/src/esp32p4/.gitignore @@ -2,3 +2,4 @@ /esp-nuttx-bootloader /*.zip /esp-hal-3rdparty +/ulp diff --git a/arch/risc-v/src/esp32p4/Make.defs b/arch/risc-v/src/esp32p4/Make.defs index 2eb843fe745..14bd7193c12 100644 --- a/arch/risc-v/src/esp32p4/Make.defs +++ b/arch/risc-v/src/esp32p4/Make.defs @@ -26,3 +26,6 @@ include common/espressif/Make.defs CHIP_CSRCS += esp_chip_rev.c CFLAGS += ${DEFINE_PREFIX}_RETARGETABLE_LOCKING + +# TODO: Remove these flags once ulp/lp_core/lp_core.c is updated. +CFLAGS += -Wno-array-bounds -Wno-stringop-overflow diff --git a/arch/risc-v/src/esp32p4/hal_esp32p4.mk b/arch/risc-v/src/esp32p4/hal_esp32p4.mk index 38c595dd28d..7a7c24c88c6 100644 --- a/arch/risc-v/src/esp32p4/hal_esp32p4.mk +++ b/arch/risc-v/src/esp32p4/hal_esp32p4.mk @@ -142,6 +142,13 @@ else endif INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)spi_flash$(DELIM)include INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)spi_flash$(DELIM)include$(DELIM)esp_flash_chips +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)ulp +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)ulp$(DELIM)lp_core +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)ulp$(DELIM)lp_core$(DELIM)shared +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)ulp$(DELIM)lp_core$(DELIM)shared$(DELIM)include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)ulp$(DELIM)lp_core$(DELIM)include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)ulp$(DELIM)ulp_common +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)ulp$(DELIM)ulp_common$(DELIM)include INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)upper_hal_dma$(DELIM)include INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)upper_hal_dma$(DELIM)src INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)upper_hal_gpio$(DELIM)include @@ -168,6 +175,9 @@ ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM) ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.systimer.ld ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).peripherals.ld ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)riscv$(DELIM)ld$(DELIM)rom.api.ld +ifeq ($(CONFIG_ESPRESSIF_USE_LP_CORE),y) + ARCHSCRIPT += $(TOPDIR)$(DELIM)arch$(DELIM)$(CONFIG_ARCH)$(DELIM)src$(DELIM)board$(DELIM)scripts$(DELIM)ulp_aliases.ld +endif # Source files @@ -253,6 +263,7 @@ CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_ CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)peripheral_domain_pd.c CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)pmu_init.c CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)pmu_param.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)pmu_pvt.c CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)rtc_clk_init.c CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)rtc_clk.c CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)rtc_time.c @@ -324,6 +335,10 @@ CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)spi_ CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)spi_flash$(DELIM)spi_flash_hpm_enable.c CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)spi_flash$(DELIM)spi_flash_os_func_app.c CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)spi_flash$(DELIM)spi_flash_os_func_noos.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)ulp$(DELIM)lp_core$(DELIM)lp_core_i2c.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)ulp$(DELIM)lp_core$(DELIM)lp_core.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)ulp$(DELIM)lp_core$(DELIM)shared$(DELIM)ulp_lp_core_memory_shared.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)ulp$(DELIM)lp_core$(DELIM)shared$(DELIM)ulp_lp_core_lp_timer_shared.c CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)upper_hal_dma$(DELIM)src$(DELIM)esp_dma_utils.c CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)upper_hal_dma$(DELIM)src$(DELIM)gdma_link.c CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)upper_hal_dma$(DELIM)src$(DELIM)gdma.c