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Kinetis SDHC - Enable clock after selected

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This commit is contained in:
David Sidrane
2017-02-10 14:34:54 -10:00
parent 067b51f5f1
commit ddd1f8c507
1 changed files with 10 additions and 9 deletions
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arch/arm/src/kinetis/kinetis_sdhc.c
+10 -9
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@@ -2808,15 +2808,6 @@ FAR struct sdio_dev_s *sdhc_initialize(int slotno)
priv->waitwdog = wd_create(); priv->waitwdog = wd_create();
DEBUGASSERT(priv->waitwdog); DEBUGASSERT(priv->waitwdog);
/* Enable clocking to the SDHC module. Clocking is still diabled in
* the SYSCTRL register.
*/
regval = getreg32(KINETIS_SIM_SCGC3);
regval |= SIM_SCGC3_SDHC;
putreg32(regval, KINETIS_SIM_SCGC3);
mcinfo("SIM_SCGC3: %08x\n", regval);
/* In addition to the system clock, the SDHC module needs a clock for the /* In addition to the system clock, the SDHC module needs a clock for the
* base for the external card clock. There are four possible sources for * base for the external card clock. There are four possible sources for
* this clock, selected by the SIM's SOPT2 register: * this clock, selected by the SIM's SOPT2 register:
@@ -2833,6 +2824,16 @@ FAR struct sdio_dev_s *sdhc_initialize(int slotno)
putreg32(regval, KINETIS_SIM_SOPT2); putreg32(regval, KINETIS_SIM_SOPT2);
mcinfo("SIM_SOPT2: %08x\n", regval); mcinfo("SIM_SOPT2: %08x\n", regval);
/* Enable clocking to the SDHC module. Clocking is still disabled in
* the SYSCTRL register.
*/
regval = getreg32(KINETIS_SIM_SCGC3);
regval |= SIM_SCGC3_SDHC;
putreg32(regval, KINETIS_SIM_SCGC3);
mcinfo("SIM_SCGC3: %08x\n", regval);
/* Configure pins for 1 or 4-bit, wide-bus operation (the chip is capable /* Configure pins for 1 or 4-bit, wide-bus operation (the chip is capable
* of 8-bit wide bus operation but D4-D7 are not configured). * of 8-bit wide bus operation but D4-D7 are not configured).
* *