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Driver for the 24-Bit Differential Input ADC ADS1242 that communicates via SPI with a MCU. Reading the ADC conversion result as well as configuring the ADC, setting the input channel, etc. is implemented via ioctl calls. However, it does not yet implement the standard ADC interface.
This commit is contained in:
Entinger Alexander
committed by
Gregory Nutt
Gregory Nutt
parent
61819c0e3e
commit
dc8c14aa53
+1
-1
Submodule arch updated: 39dca5d1dc...69b5f95ae5
@@ -43,6 +43,13 @@ config ADS1255_FREQUENCY
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endif # ADC_ADS125X
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endif # ADC_ADS125X
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config ADC_ADS1242
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bool "ADS1242"
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default n
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select SPI
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---help---
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Enable driver support for the ADS1242 24-Bit SPI powered ADC.
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config ADC_PGA11X
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config ADC_PGA11X
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bool "TI PGA112/3/6/7 support"
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bool "TI PGA112/3/6/7 support"
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default n
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default n
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File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,202 @@
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/****************************************************************************
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* include/nuttx/sensors/ads1242.h
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*
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* Copyright (C) 2016, DS-Automotion GmbH. All rights reserved.
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* Author: Alexander Entinger <a.entinger@ds-automotion.com>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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#ifndef NUTTX_INCLUDE_NUTTX_ANALOG_ADS1242_H_
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#define NUTTX_INCLUDE_NUTTX_ANALOG_ADS1242_H_
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <nuttx/fs/ioctl.h>
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#include <nuttx/spi/spi.h>
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#if defined(CONFIG_SPI) && defined(CONFIG_ADC_ADS1242)
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* IOCTL Commands ***********************************************************/
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#define ANIOC_ADS2142_READ _ANIOC(0x0001) /* Arg: uint32_t *value */
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#define ANIOC_ADS2142_SET_GAIN _ANIOC(0x0002) /* Arg: uint8_t value */
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#define ANIOC_ADS2142_SET_POSITIVE_INPUT _ANIOC(0x0003) /* Arg: uint8_t value */
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#define ANIOC_ADS2142_SET_NEGATIVE_INPUT _ANIOC(0x0004) /* Arg: uint8_t value */
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#define ANIOC_ADS2142_IS_DATA_READY _ANIOC(0x0005) /* Arg: bool *value */
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#define ANIOC_ADS2142_DO_SYSTEM_OFFSET_CALIB _ANIOC(0x0006) /* Arg: None */
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/* ADS1242 REGISTER *********************************************************/
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#define ADS1242_REG_SETUP (0x00) /* Setup Register */
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#define ADS1242_REG_MUX (0x01) /* Multiplexer Control Register */
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#define ADS1242_REG_ACR (0x02) /* Analog Control Register */
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#define ADS1242_REG_ODAC (0x03) /* Offset DAC */
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#define ADS1242_REG_DIO (0x04) /* Data I/O */
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#define ADS1242_REG_DIR (0x05) /* Direction Control for Data I/O */
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#define ADS1242_REG_IOCON (0x06) /* I/O Configuration Register */
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/* ADS1242 REGISTER Bit Definitions *****************************************/
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/* SETUP */
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#define ADS1242_REG_SETUP_BIT_BOCS (1 << 3)
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#define ADS1242_REG_SETUP_BIT_PGA2 (1 << 2)
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#define ADS1242_REG_SETUP_BIT_PGA1 (1 << 1)
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#define ADS1242_REG_SETUP_BIT_PGA0 (1 << 0)
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/* MUX */
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#define ADS1242_REG_MUX_BIT_PSEL3 (1 << 7)
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#define ADS1242_REG_MUX_BIT_PSEL2 (1 << 6)
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#define ADS1242_REG_MUX_BIT_PSEL1 (1 << 5)
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#define ADS1242_REG_MUX_BIT_PSEL0 (1 << 4)
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#define ADS1242_REG_MUX_BIT_NSEL3 (1 << 3)
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#define ADS1242_REG_MUX_BIT_NSEL2 (1 << 2)
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#define ADS1242_REG_MUX_BIT_NSEL1 (1 << 1)
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#define ADS1242_REG_MUX_BIT_NSEL0 (1 << 0)
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/* ACR */
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#define ADS1242_REG_ACR_BIT_nDRDY (1 << 7)
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#define ADS1242_REG_ACR_BIT_UnB (1 << 6)
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#define ADS1242_REG_ACR_BIT_SPEED (1 << 5)
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#define ADS1242_REG_ACR_BIT_BUFEN (1 << 4)
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#define ADS1242_REG_ACR_BIT_BITORDER (1 << 3)
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#define ADS1242_REG_ACR_BIT_RANGE (1 << 2)
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#define ADS1242_REG_ACR_BIT_DR1 (1 << 1)
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#define ADS1242_REG_ACR_BIT_DR0 (1 << 0)
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/* ADS1242 SPI COMMANDS *****************************************************/
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#define ADS1242_CMD_READ_DATA (0x01)
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#define ADS1242_CMD_READ_REGISTER (0x10)
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#define ADS1242_CMD_WRITE_REGISTER (0x50)
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#define ADS1242_CMD_SELF_OFFSET_CALIB (0xF1)
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#define ADS1242_CMD_SELF_GAIN_CALIB (0xf2)
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#define ADS1242_CMD_SYSTEM_OFFSET_CALIB (0xf3)
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#define ADS1242_CMD_RESET (0xfe)
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/* SPI BUS PARAMETERS *******************************************************/
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/* 100 kHz, SCLK period has to be at least 4 x tOsc period of ADS1242
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* oscillator circuit.
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*/
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#define ADS1242_SPI_FREQUENCY (100000)
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/* Device uses SPI Mode 1: CKPOL = 0, CKPHA = 1 */
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#define ADS1242_SPI_MODE (SPIDEV_MODE1)
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/****************************************************************************
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* Public Types
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****************************************************************************/
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typedef enum
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{
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ADS1242_x1 = 0,
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ADS1242_x2 = ADS1242_REG_SETUP_BIT_PGA0,
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ADS1242_x4 = ADS1242_REG_SETUP_BIT_PGA1,
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ADS1242_x8 = ADS1242_REG_SETUP_BIT_PGA1 | ADS1242_REG_SETUP_BIT_PGA0,
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ADS1242_x16 = ADS1242_REG_SETUP_BIT_PGA2,
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ADS1242_x32 = ADS1242_REG_SETUP_BIT_PGA2 | ADS1242_REG_SETUP_BIT_PGA0,
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ADS1242_x64 = ADS1242_REG_SETUP_BIT_PGA2 | ADS1242_REG_SETUP_BIT_PGA1,
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ADS1242_x128 = ADS1242_REG_SETUP_BIT_PGA2 | ADS1242_REG_SETUP_BIT_PGA1 |
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ADS1242_REG_SETUP_BIT_PGA0
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} ADS1242_GAIN_SELECTION;
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typedef enum
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{
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ADS1242_P_AIN0 = 0,
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ADS1242_P_AIN1 = ADS1242_REG_MUX_BIT_PSEL0,
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ADS1242_P_AIN2 = ADS1242_REG_MUX_BIT_PSEL1,
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ADS1242_P_AIN3 = ADS1242_REG_MUX_BIT_PSEL1 | ADS1242_REG_MUX_BIT_PSEL0,
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ADS1242_P_AIN4 = ADS1242_REG_MUX_BIT_PSEL2,
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ADS1242_P_AIN5 = ADS1242_REG_MUX_BIT_PSEL2 | ADS1242_REG_MUX_BIT_PSEL0,
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ADS1242_P_AIN6 = ADS1242_REG_MUX_BIT_PSEL2 | ADS1242_REG_MUX_BIT_PSEL1,
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ADS1242_P_AIN7 = ADS1242_REG_MUX_BIT_PSEL2 | ADS1242_REG_MUX_BIT_PSEL1 |
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ADS1242_REG_MUX_BIT_PSEL0,
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} ADS1242_POSITIVE_INPUT_SELECTION;
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typedef enum
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{
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ADS1242_N_AIN0 = 0,
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ADS1242_N_AIN1 = ADS1242_REG_MUX_BIT_NSEL0,
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ADS1242_N_AIN2 = ADS1242_REG_MUX_BIT_NSEL1,
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ADS1242_N_AIN3 = ADS1242_REG_MUX_BIT_NSEL1 | ADS1242_REG_MUX_BIT_NSEL0,
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ADS1242_N_AIN4 = ADS1242_REG_MUX_BIT_NSEL2,
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ADS1242_N_AIN5 = ADS1242_REG_MUX_BIT_NSEL2 | ADS1242_REG_MUX_BIT_NSEL0,
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ADS1242_N_AIN6 = ADS1242_REG_MUX_BIT_NSEL2 | ADS1242_REG_MUX_BIT_NSEL1,
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ADS1242_N_AIN7 = ADS1242_REG_MUX_BIT_NSEL2 | ADS1242_REG_MUX_BIT_NSEL1 |
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ADS1242_REG_MUX_BIT_NSEL0,
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} ADS1242_NEGATIVE_INPUT_SELECTION;
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/****************************************************************************
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* Public Function Prototypes
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****************************************************************************/
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#ifdef __cplusplus
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#define EXTERN extern "C"
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extern "C"
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{
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#else
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#define EXTERN extern
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#endif
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/****************************************************************************
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* Name: ads1242_register
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*
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* Description:
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* Register the ADS1242 character device as 'devpath'
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*
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* Input Parameters:
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* devpath - The full path to the driver to register. E.g., "/dev/ads1242"
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* spi - An instance of the SPI interface to use to communicate with ADS1242
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* osc_freq_hz - The frequency of the ADS1242 oscillator in Hz. Required for
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* calculating the minimum delay periods when accessing the device via SPI.
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*
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*
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* Returned Value:
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* Zero (OK) on success; a negated errno value on failure.
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*
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****************************************************************************/
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int ads1242_register(FAR const char *devpath, FAR struct spi_dev_s *spi,
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uint32_t const osc_freq_hz);
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#undef EXTERN
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#ifdef __cplusplus
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}
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#endif
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#endif /* CONFIG_SPI && CONFIG_ADC_ADS1242 */
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#endif /* NUTTX_INCLUDE_NUTTX_ANALOG_ADS1242_H_ */
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