diff --git a/arch/arm/src/stm32f0l0/hardware/stm32_adc.h b/arch/arm/src/stm32f0l0/hardware/stm32_adc.h
index eeaa3234e32..8dd587ab335 100644
--- a/arch/arm/src/stm32f0l0/hardware/stm32_adc.h
+++ b/arch/arm/src/stm32f0l0/hardware/stm32_adc.h
@@ -34,8 +34,8 @@
  *
  ********************************************************************************/
 
-#ifndef __ARCH_ARM_SRC_STM32F0L0_CHIP_STM32_ADC_H
-#define __ARCH_ARM_SRC_STM32F0L0_CHIP_STM32_ADC_H
+#ifndef __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_ADC_H
+#define __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_ADC_H
 
 /********************************************************************************
  * Included Files
@@ -268,4 +268,4 @@
 #  define ADC_CCR_LFMEN             (1 << 25)  /* Bit 25: Low Frequency Mode enable */
 #endif
 
-#endif /* __ARCH_ARM_SRC_STM32F0L0_CHIP_STM32_ADC_H */
+#endif /* __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_ADC_H */
diff --git a/arch/arm/src/stm32f0l0/hardware/stm32_can.h b/arch/arm/src/stm32f0l0/hardware/stm32_can.h
index a3dc2ba6e04..7e82c3e15bf 100644
--- a/arch/arm/src/stm32f0l0/hardware/stm32_can.h
+++ b/arch/arm/src/stm32f0l0/hardware/stm32_can.h
@@ -34,8 +34,8 @@
  *
  ************************************************************************************/
 
-#ifndef __ARCH_ARM_SRC_STM32F0L0_CHIP_STM32_CAN_H
-#define __ARCH_ARM_SRC_STM32F0L0_CHIP_STM32_CAN_H
+#ifndef __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_CAN_H
+#define __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_CAN_H
 
 /************************************************************************************
  * Included Files
@@ -466,4 +466,4 @@
 #define CAN_FA1R_FACT_SHIFT       (0)      /* Bits 13:0: Filter Active */
 #define CAN_FA1R_FACT_MASK        (0x3fff << CAN_FA1R_FACT_SHIFT)
 
-#endif /* __ARCH_ARM_SRC_STM32F0L0_CHIP_STM32_CAN_H */
+#endif /* __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_CAN_H */
diff --git a/arch/arm/src/stm32f0l0/hardware/stm32_comp.h b/arch/arm/src/stm32f0l0/hardware/stm32_comp.h
index c8dca2f4e82..b59648d1f3c 100644
--- a/arch/arm/src/stm32f0l0/hardware/stm32_comp.h
+++ b/arch/arm/src/stm32f0l0/hardware/stm32_comp.h
@@ -34,8 +34,8 @@
  *
  ************************************************************************************/
 
-#ifndef __ARCH_ARM_SRC_STM32F0L0_CHIP_STM32_COMP_H
-#define __ARCH_ARM_SRC_STM32F0L0_CHIP_STM32_COMP_H
+#ifndef __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_COMP_H
+#define __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_COMP_H
 
 /************************************************************************************
  * Included Files
@@ -135,4 +135,4 @@
 #define COMP_CSR_COMP2OUT             (1 << 14)   /* Bit 14: Comparator 1 output */
 #define COMP_CSR_COMP2LOCK            (1 << 15)   /* Bit 15: Comparator 1 lock */
 
-#endif /* __ARCH_ARM_SRC_STM32F0L0_CHIP_STM32_COMP_H */
+#endif /* __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_COMP_H */
diff --git a/arch/arm/src/stm32f0l0/hardware/stm32_crc.h b/arch/arm/src/stm32f0l0/hardware/stm32_crc.h
index d368142eb9c..d1a81841b4d 100644
--- a/arch/arm/src/stm32f0l0/hardware/stm32_crc.h
+++ b/arch/arm/src/stm32f0l0/hardware/stm32_crc.h
@@ -34,8 +34,8 @@
  *
  ************************************************************************************/
 
-#ifndef __ARCH_ARM_SRC_STM32F0L0_CHIP_STM32_CRC_H
-#define __ARCH_ARM_SRC_STM32F0L0_CHIP_STM32_CRC_H
+#ifndef __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_CRC_H
+#define __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_CRC_H
 
 /************************************************************************************
  * Included Files
@@ -87,4 +87,4 @@
 #  define CRC_CR_REVIN_WORD     (3 << CRC_CR_REVIN_SHIFT) /* 11: reversal done by word */
 #define CRC_CR_REVOUT           (1 << 7)  /* This bit controls the reversal of the bit order of the output data */
 
-#endif /* __ARCH_ARM_SRC_STM32F0L0_CHIP_STM32_CRC_H */
+#endif /* __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_CRC_H */
diff --git a/arch/arm/src/stm32f0l0/hardware/stm32_crs.h b/arch/arm/src/stm32f0l0/hardware/stm32_crs.h
index 8f95ff0f6c2..8df33f4d53b 100644
--- a/arch/arm/src/stm32f0l0/hardware/stm32_crs.h
+++ b/arch/arm/src/stm32f0l0/hardware/stm32_crs.h
@@ -34,8 +34,8 @@
  *
  ************************************************************************************/
 
-#ifndef __ARCH_ARM_SRC_STM32F0L0_CHIP_STM32_CRS_H
-#define __ARCH_ARM_SRC_STM32F0L0_CHIP_STM32_CRS_H
+#ifndef __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_CRS_H
+#define __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_CRS_H
 
 /************************************************************************************
  * Pre-processor Definitions
@@ -112,4 +112,4 @@
 #define CRS_ICR_ERRC               (1 << 2)  /* Bit 2: Error clear flag */
 #define CRS_ICR_ESYNCC             (1 << 3)  /* Bit 3: Expected SYNC clear flag */
 
-#endif /* __ARCH_ARM_SRC_STM32F0L0_CHIP_STM32_CRS_H */
+#endif /* __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_CRS_H */
diff --git a/arch/arm/src/stm32f0l0/hardware/stm32_dac.h b/arch/arm/src/stm32f0l0/hardware/stm32_dac.h
index a61111ec0e5..cbf23506bb0 100644
--- a/arch/arm/src/stm32f0l0/hardware/stm32_dac.h
+++ b/arch/arm/src/stm32f0l0/hardware/stm32_dac.h
@@ -34,8 +34,8 @@
  *
  ************************************************************************************/
 
-#ifndef __ARCH_ARM_SRC_STM32F0L0_CHIP_STM32_DAC_H
-#define __ARCH_ARM_SRC_STM32F0L0_CHIP_STM32_DAC_H
+#ifndef __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_DAC_H
+#define __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_DAC_H
 
 /************************************************************************************
  * Included Files
@@ -215,4 +215,4 @@
 #define DAC_SR_DMAUDR1            (1 << 13)  /* Bit 13: DAC channel 1 DMA underrun flag */
 #define DAC_SR_DMAUDR2            (1 << 29)  /* Bit 29: DAC channel 2 DMA underrun flag */
 
-#endif /* __ARCH_ARM_SRC_STM32F0L0_CHIP_STM32_DAC_H */
+#endif /* __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_DAC_H */
diff --git a/arch/arm/src/stm32f0l0/hardware/stm32_dma_v1.h b/arch/arm/src/stm32f0l0/hardware/stm32_dma_v1.h
index e31964ab805..1ee0fa0ad0b 100644
--- a/arch/arm/src/stm32f0l0/hardware/stm32_dma_v1.h
+++ b/arch/arm/src/stm32f0l0/hardware/stm32_dma_v1.h
@@ -33,8 +33,8 @@
  *
  ************************************************************************************/
 
-#ifndef __ARCH_ARM_SRC_STM32F0L0_HEARDWARE_STM32_DMA_V1_H
-#define __ARCH_ARM_SRC_STM32F0L0_HEARDWARE_STM32_DMA_V1_H
+#ifndef __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_DMA_V1_H
+#define __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_DMA_V1_H
 
 /************************************************************************************
  * Pre-processor Definitions
@@ -550,4 +550,4 @@
 #  error "Unknown DMA channel assignments"
 #endif
 
-#endif /* __ARCH_ARM_SRC_STM32F0L0_HEARDWARE_STM32_DMA_V1_H */
+#endif /* __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_DMA_V1_H */
diff --git a/arch/arm/src/stm32f0l0/hardware/stm32_dmamux.h b/arch/arm/src/stm32f0l0/hardware/stm32_dmamux.h
index 2e64fd28520..7b89c73450d 100644
--- a/arch/arm/src/stm32f0l0/hardware/stm32_dmamux.h
+++ b/arch/arm/src/stm32f0l0/hardware/stm32_dmamux.h
@@ -33,8 +33,8 @@
  *
  ************************************************************************************/
 
-#ifndef __ARCH_ARM_SRC_STM32F0L0_CHIP_STM32_DMAMUX_H
-#define __ARCH_ARM_SRC_STM32F0L0_CHIP_STM32_DMAMUX_H
+#ifndef __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_DMAMUX_H
+#define __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_DMAMUX_H
 
 /************************************************************************************
  * Included Files
@@ -159,4 +159,4 @@
 #  error "Unsupported STM32 M0 sub family"
 #endif
 
-#endif /* __ARCH_ARM_SRC_STM32F0L0_CHIP_STM32_DMAMUX_H */
+#endif /* __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_DMAMUX_H */
diff --git a/arch/arm/src/stm32f0l0/hardware/stm32_exti.h b/arch/arm/src/stm32f0l0/hardware/stm32_exti.h
index 27ff33dbc86..489fe427838 100644
--- a/arch/arm/src/stm32f0l0/hardware/stm32_exti.h
+++ b/arch/arm/src/stm32f0l0/hardware/stm32_exti.h
@@ -34,8 +34,8 @@
  *
  ************************************************************************************/
 
-#ifndef __ARCH_ARM_SRC_STM32F0L0_CHIP_STM32_EXTI_H
-#define __ARCH_ARM_SRC_STM32F0L0_CHIP_STM32_EXTI_H
+#ifndef __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_EXTI_H
+#define __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_EXTI_H
 
 /************************************************************************************
  * Included Files
@@ -54,4 +54,4 @@
 #  error "Unrecognized STM32 M0 EXTI"
 #endif
 
-#endif /* __ARCH_ARM_SRC_STM32F0L0_CHIP_STM32_EXTI_H */
+#endif /* __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_EXTI_H */
diff --git a/arch/arm/src/stm32f0l0/hardware/stm32_flash.h b/arch/arm/src/stm32f0l0/hardware/stm32_flash.h
index 5902974b625..f88ffcb00b2 100644
--- a/arch/arm/src/stm32f0l0/hardware/stm32_flash.h
+++ b/arch/arm/src/stm32f0l0/hardware/stm32_flash.h
@@ -33,8 +33,8 @@
  *
  ************************************************************************************/
 
-#ifndef __ARCH_ARM_SRC_STM32F0L0_CHIP_STM32_FLASH_H
-#define __ARCH_ARM_SRC_STM32F0L0_CHIP_STM32_FLASH_H
+#ifndef __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_FLASH_H
+#define __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_FLASH_H
 
 /************************************************************************************
  * Included Files
@@ -53,4 +53,4 @@
 #  error "Unsupported STM32 M0 FLASH"
 #endif
 
-#endif /* __ARCH_ARM_SRC_STM32F0L0_CHIP_STM32_FLASH_H */
+#endif /* __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_FLASH_H */
diff --git a/arch/arm/src/stm32f0l0/hardware/stm32_gpio.h b/arch/arm/src/stm32f0l0/hardware/stm32_gpio.h
index 8647ffa878d..53a16de0836 100644
--- a/arch/arm/src/stm32f0l0/hardware/stm32_gpio.h
+++ b/arch/arm/src/stm32f0l0/hardware/stm32_gpio.h
@@ -33,8 +33,8 @@
  *
  ************************************************************************************/
 
-#ifndef __ARCH_ARM_SRC_STM32F0L0_CHIP_STM32_GPIO_H
-#define __ARCH_ARM_SRC_STM32F0L0_CHIP_STM32_GPIO_H
+#ifndef __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_GPIO_H
+#define __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_GPIO_H
 
 /************************************************************************************
  * Pre-processor Definitions
@@ -355,4 +355,4 @@
 
 #define GPIO_BRR(n)                (1 << (n))
 
-#endif /* __ARCH_ARM_SRC_STM32F0L0_CHIP_STM32_GPIO_H */
+#endif /* __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_GPIO_H */
diff --git a/arch/arm/src/stm32f0l0/hardware/stm32_i2c.h b/arch/arm/src/stm32f0l0/hardware/stm32_i2c.h
index 3ad47e6c583..e5f2c1a838e 100644
--- a/arch/arm/src/stm32f0l0/hardware/stm32_i2c.h
+++ b/arch/arm/src/stm32f0l0/hardware/stm32_i2c.h
@@ -34,8 +34,8 @@
  *
  ************************************************************************************/
 
-#ifndef __ARCH_ARM_SRC_STM32F0L0_CHIP_STM32_I2C_H
-#define __ARCH_ARM_SRC_STM32F0L0_CHIP_STM32_I2C_H
+#ifndef __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_I2C_H
+#define __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_I2C_H
 
 /************************************************************************************
  * Pre-processor Definitions
@@ -235,4 +235,4 @@
 
 #define I2C_TXDR_MASK             (0xff)
 
-#endif /* __ARCH_ARM_SRC_STM32F0L0_CHIP_STM32_I2C_H */
+#endif /* __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_I2C_H */
diff --git a/arch/arm/src/stm32f0l0/hardware/stm32_memorymap.h b/arch/arm/src/stm32f0l0/hardware/stm32_memorymap.h
index 5d37afa6498..fdac75815ba 100644
--- a/arch/arm/src/stm32f0l0/hardware/stm32_memorymap.h
+++ b/arch/arm/src/stm32f0l0/hardware/stm32_memorymap.h
@@ -34,8 +34,8 @@
  *
  ************************************************************************************/
 
-#ifndef __ARCH_ARM_SRC_STM32F0L0_CHIP_STM32_MEMORYMAP_H
-#define __ARCH_ARM_SRC_STM32F0L0_CHIP_STM32_MEMORYMAP_H
+#ifndef __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_MEMORYMAP_H
+#define __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_MEMORYMAP_H
 
 /************************************************************************************
  * Included Files
@@ -55,4 +55,4 @@
 #  error "Unsupported STM32 M0 memory map"
 #endif
 
-#endif /* __ARCH_ARM_SRC_STM32F0L0_CHIP_STM32_MEMORYMAP_H */
+#endif /* __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_MEMORYMAP_H */
diff --git a/arch/arm/src/stm32f0l0/hardware/stm32_rcc.h b/arch/arm/src/stm32f0l0/hardware/stm32_rcc.h
index d43670cc5bd..69a1bfc6f73 100644
--- a/arch/arm/src/stm32f0l0/hardware/stm32_rcc.h
+++ b/arch/arm/src/stm32f0l0/hardware/stm32_rcc.h
@@ -34,8 +34,8 @@
  *
  ************************************************************************************/
 
-#ifndef __ARCH_ARM_SRC_STM32F0L0_CHIP_STM32_RCC_H
-#define __ARCH_ARM_SRC_STM32F0L0_CHIP_STM32_RCC_H
+#ifndef __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_RCC_H
+#define __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_RCC_H
 
 /************************************************************************************
  * Included Files
@@ -54,4 +54,4 @@
 #  error "Unsupported STM32 M0 RCC"
 #endif
 
-#endif /* __ARCH_ARM_SRC_STM32F0L0_CHIP_STM32_RCC_H */
+#endif /* __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_RCC_H */
diff --git a/arch/arm/src/stm32f0l0/hardware/stm32_rng.h b/arch/arm/src/stm32f0l0/hardware/stm32_rng.h
index 081c18a0fb1..dc932526379 100644
--- a/arch/arm/src/stm32f0l0/hardware/stm32_rng.h
+++ b/arch/arm/src/stm32f0l0/hardware/stm32_rng.h
@@ -33,8 +33,8 @@
  *
  ************************************************************************************/
 
-#ifndef __ARCH_ARM_STC_STM32F0L0_HARDWARE_STM32_RNG_H
-#define __ARCH_ARM_STC_STM32F0L0_HARDWARE_STM32_RNG_H
+#ifndef __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_RNG_H
+#define __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_RNG_H
 
 /************************************************************************************
  * Included Files
@@ -75,4 +75,4 @@
 #define RNG_SR_CEIS               (1 << 5) /* Bit 5: Clock error interrupt status */
 #define RNG_SR_SEIS               (1 << 6) /* Bit 6: Seed error interrupt status */
 
-#endif	/* __ARCH_ARM_STC_STM32F0L0_HARDWARE_STM32_RNG_H */
+#endif	/* __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_RNG_H */
diff --git a/arch/arm/src/stm32f0l0/hardware/stm32_rtcc.h b/arch/arm/src/stm32f0l0/hardware/stm32_rtcc.h
index d40da9470fb..c5eb492a649 100644
--- a/arch/arm/src/stm32f0l0/hardware/stm32_rtcc.h
+++ b/arch/arm/src/stm32f0l0/hardware/stm32_rtcc.h
@@ -34,8 +34,8 @@
  *
  ************************************************************************************/
 
-#ifndef __ARCH_ARM_SRC_STM32F0L0_CHIP_STM32_RTCC_H
-#define __ARCH_ARM_SRC_STM32F0L0_CHIP_STM32_RTCC_H
+#ifndef __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_RTCC_H
+#define __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_RTCC_H
 
 /************************************************************************************
  * Pre-processor Definitions
@@ -321,4 +321,4 @@
 #define RTC_ALRMSSR_MASKSS_SHIFT  (24)  /* Bits 24-27:  Mask the most-significant bits starting at this bit */
 #define RTC_ALRMSSR_MASKSS_MASK   (0xf << RTC_ALRMSSR_MASKSS_SHIFT)
 
-#endif /* __ARCH_ARM_SRC_STM32F0L0_CHIP_STM32_RTCC_H */
+#endif /* __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_RTCC_H */
diff --git a/arch/arm/src/stm32f0l0/hardware/stm32_spi.h b/arch/arm/src/stm32f0l0/hardware/stm32_spi.h
index 7d8efa1e03d..651a10567f5 100644
--- a/arch/arm/src/stm32f0l0/hardware/stm32_spi.h
+++ b/arch/arm/src/stm32f0l0/hardware/stm32_spi.h
@@ -33,8 +33,8 @@
  *
  ************************************************************************************/
 
-#ifndef __ARCH_ARM_SRC_STM32F0L0_CHIP_STM32_SPI_H
-#define __ARCH_ARM_SRC_STM32F0L0_CHIP_STM32_SPI_H
+#ifndef __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_SPI_H
+#define __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_SPI_H
 
 /************************************************************************************
  * Included Files
@@ -269,4 +269,4 @@
 #define SPI_I2SPR_ODD             (1 << 8)  /* Bit 8: Odd factor for the prescaler */
 #define SPI_I2SPR_MCKOE           (1 << 9)  /* Bit 9: Master clock output enable */
 
-#endif /* __ARCH_ARM_SRC_STM32F0L0_CHIP_STM32_SPI_H */
+#endif /* __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_SPI_H */
diff --git a/arch/arm/src/stm32f0l0/hardware/stm32_syscfg.h b/arch/arm/src/stm32f0l0/hardware/stm32_syscfg.h
index 7851947b83f..da971d0300a 100644
--- a/arch/arm/src/stm32f0l0/hardware/stm32_syscfg.h
+++ b/arch/arm/src/stm32f0l0/hardware/stm32_syscfg.h
@@ -34,8 +34,8 @@
  *
  ****************************************************************************************************/
 
-#ifndef __ARCH_ARM_SRC_STM32F0L0_CHIP_STM32_SYSCFG_H
-#define __ARCH_ARM_SRC_STM32F0L0_CHIP_STM32_SYSCFG_H
+#ifndef __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_SYSCFG_H
+#define __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_SYSCFG_H
 
 /****************************************************************************************************
  * Included Files
@@ -54,4 +54,4 @@
 #  error "Unsupported STM32 M0 SYSCFG"
 #endif
 
-#endif /* __ARCH_ARM_SRC_STM32F0L0_CHIP_STM32_SYSCFG_H */
+#endif /* __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_SYSCFG_H */
diff --git a/arch/arm/src/stm32f0l0/hardware/stm32_tim.h b/arch/arm/src/stm32f0l0/hardware/stm32_tim.h
index 793e5fb68da..00e8171ceea 100644
--- a/arch/arm/src/stm32f0l0/hardware/stm32_tim.h
+++ b/arch/arm/src/stm32f0l0/hardware/stm32_tim.h
@@ -34,8 +34,8 @@
  *
  ****************************************************************************************************/
 
-#ifndef __ARCH_ARM_SRC_STM32F0L0_CHIP_STM32_TIM_H
-#define __ARCH_ARM_SRC_STM32F0L0_CHIP_STM32_TIM_H
+#ifndef __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_TIM_H
+#define __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_TIM_H
 
 /****************************************************************************************************
  * Pre-processor Definitions
@@ -49,4 +49,4 @@
 
 /* Register Bitfield Definitions ********************************************************************/
 
-#endif /* __ARCH_ARM_SRC_STM32F0L0_CHIP_STM32_TIM_H */
+#endif /* __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_TIM_H */
diff --git a/arch/arm/src/stm32f0l0/hardware/stm32_uart.h b/arch/arm/src/stm32f0l0/hardware/stm32_uart.h
index e4c2ab6ba1c..420c40bd6d6 100644
--- a/arch/arm/src/stm32f0l0/hardware/stm32_uart.h
+++ b/arch/arm/src/stm32f0l0/hardware/stm32_uart.h
@@ -34,8 +34,8 @@
  *
  ************************************************************************************/
 
-#ifndef __ARCH_ARM_SRC_STM32F0L0_CHIP_STM32_UART_H
-#define __ARCH_ARM_SRC_STM32F0L0_CHIP_STM32_UART_H
+#ifndef __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_UART_H
+#define __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_UART_H
 
 /************************************************************************************
  * Included Files
@@ -52,4 +52,4 @@
 #  error "Unsupported STM32 M0 USART"
 #endif
 
-#endif /* __ARCH_ARM_STC_STM32F0L0_CHIP_STM32_UART_H */
+#endif /* __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_UART_H */
diff --git a/arch/arm/src/stm32f0l0/hardware/stm32_uart_v1.h b/arch/arm/src/stm32f0l0/hardware/stm32_uart_v1.h
index 78d402c34a2..4a5f7a02c0f 100644
--- a/arch/arm/src/stm32f0l0/hardware/stm32_uart_v1.h
+++ b/arch/arm/src/stm32f0l0/hardware/stm32_uart_v1.h
@@ -34,8 +34,8 @@
  *
  ************************************************************************************/
 
-#ifndef __ARCH_ARM_SRC_STM32F0L0_CHIP_STM32F0_UART_V1_H
-#define __ARCH_ARM_SRC_STM32F0L0_CHIP_STM32F0_UART_V1_H
+#ifndef __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32F0_UART_V1_H
+#define __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32F0_UART_V1_H
 
 /************************************************************************************
  * Included Files
@@ -313,4 +313,4 @@
 #define USART_TDR_SHIFT           (0)       /* Bits 8:0: Data value */
 #define USART_TDR_MASK            (0xff << USART_TDR_SHIFT)
 
-#endif /* __ARCH_ARM_STC_STM32F0L0_CHIP_STM32_UART_V1_H */
+#endif /* __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_UART_V1_H */
diff --git a/arch/arm/src/stm32f0l0/hardware/stm32_uart_v2.h b/arch/arm/src/stm32f0l0/hardware/stm32_uart_v2.h
index 42ff8bdf470..e956deb3276 100644
--- a/arch/arm/src/stm32f0l0/hardware/stm32_uart_v2.h
+++ b/arch/arm/src/stm32f0l0/hardware/stm32_uart_v2.h
@@ -33,8 +33,8 @@
  *
  ************************************************************************************/
 
-#ifndef __ARCH_ARM_SRC_STM32F0L0_CHIP_STM32F0_UART_V2_H
-#define __ARCH_ARM_SRC_STM32F0L0_CHIP_STM32F0_UART_V2_H
+#ifndef __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32F0_UART_V2_H
+#define __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32F0_UART_V2_H
 
 /************************************************************************************
  * Included Files
@@ -360,4 +360,4 @@
 # define USART_PRESC_DIV128       (10 << USART_PRESC_SHIFT) /* Input clock divided by 128 */
 # define USART_PRESC_DIV256       (11 << USART_PRESC_SHIFT) /* Input clock divided by 256 */
 
-#endif /* __ARCH_ARM_STC_STM32F0L0_CHIP_STM32_UART_V2_H */
+#endif /* __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_UART_V2_H */
diff --git a/arch/arm/src/stm32f0l0/hardware/stm32_usbdev.h b/arch/arm/src/stm32f0l0/hardware/stm32_usbdev.h
index a93160654e7..f0a06bb441f 100644
--- a/arch/arm/src/stm32f0l0/hardware/stm32_usbdev.h
+++ b/arch/arm/src/stm32f0l0/hardware/stm32_usbdev.h
@@ -33,8 +33,8 @@
  *
  ************************************************************************************/
 
-#ifndef __ARCH_ARM_SRC_STM32F0L0_CHIP_STM32_USBDEV_H
-#define __ARCH_ARM_SRC_STM32F0L0_CHIP_STM32_USBDEV_H
+#ifndef __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_USBDEV_H
+#define __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_USBDEV_H
 
 /************************************************************************************
  * Included Files
@@ -261,4 +261,4 @@
 #define USB_COUNT_RX_MASK              (0x03ff << USB_COUNT_RX_SHIFT)
 
 #endif /* CONFIG_STM32F0L0_HAVE_USBDEV */
-#endif /* __ARCH_ARM_SRC_STM32F0L0_CHIP_STM32_USBDEV_H */
+#endif /* __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_USBDEV_H */
diff --git a/arch/arm/src/stm32f0l0/hardware/stm32_wdt.h b/arch/arm/src/stm32f0l0/hardware/stm32_wdt.h
index e545b818af6..dc6ebef315b 100644
--- a/arch/arm/src/stm32f0l0/hardware/stm32_wdt.h
+++ b/arch/arm/src/stm32f0l0/hardware/stm32_wdt.h
@@ -34,8 +34,8 @@
  *
  ************************************************************************************/
 
-#ifndef __ARCH_ARM_SRC_STM32F0L0_CHIP_STM32_WDG_H
-#define __ARCH_ARM_SRC_STM32F0L0_CHIP_STM32_WDG_H
+#ifndef __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_WDG_H
+#define __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_WDG_H
 
 /************************************************************************************
  * Included Files
@@ -139,4 +139,4 @@
 
 #define WWDG_SR_EWIF           (1 << 0)  /* Bit 0: Early Wakeup Interrupt Flag */
 
-#endif /* __ARCH_ARM_SRC_STM32F0L0_CHIP_STM32_WDG_H */
+#endif /* __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_WDG_H */
diff --git a/arch/arm/src/stm32f0l0/hardware/stm32f05x_pinmap.h b/arch/arm/src/stm32f0l0/hardware/stm32f05x_pinmap.h
index 153a4c1a388..05883195c5d 100644
--- a/arch/arm/src/stm32f0l0/hardware/stm32f05x_pinmap.h
+++ b/arch/arm/src/stm32f0l0/hardware/stm32f05x_pinmap.h
@@ -34,8 +34,8 @@
  *
  ************************************************************************************/
 
-#ifndef __ARCH_ARM_SRC_STM32F0L0_CHIP_STM32F05X_PINMAP_H
-#define __ARCH_ARM_SRC_STM32F0L0_CHIP_STM32F05X_PINMAP_H
+#ifndef __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32F05X_PINMAP_H
+#define __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32F05X_PINMAP_H
 
 /************************************************************************************
  * Included Files
@@ -133,4 +133,4 @@
 #define GPIO_I2C2_SCL       (GPIO_ALT | GPIO_AF1 | GPIO_OPENDRAIN | GPIO_SPEED_HIGH | GPIO_PORTB | GPIO_PIN10)
 #define GPIO_I2C2_SDA       (GPIO_ALT | GPIO_AF1 | GPIO_OPENDRAIN | GPIO_SPEED_HIGH | GPIO_PORTB | GPIO_PIN11)
 
-#endif /* __ARCH_ARM_SRC_STM32F0L0_CHIP_STM32F05X_PINMAP_H */
+#endif /* __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32F05X_PINMAP_H */
diff --git a/arch/arm/src/stm32f0l0/hardware/stm32f05xf07xf09x_memorymap.h b/arch/arm/src/stm32f0l0/hardware/stm32f05xf07xf09x_memorymap.h
index 110db4b0e71..841097b97d3 100644
--- a/arch/arm/src/stm32f0l0/hardware/stm32f05xf07xf09x_memorymap.h
+++ b/arch/arm/src/stm32f0l0/hardware/stm32f05xf07xf09x_memorymap.h
@@ -34,8 +34,8 @@
  *
  ************************************************************************************/
 
-#ifndef __ARCH_ARM_SRC_STM32F0L0_CHIP_ST32F05XF07XF09X_MEMORYMAP_H
-#define __ARCH_ARM_SRC_STM32F0L0_CHIP_ST32F05XF07XF09X_MEMORYMAP_H
+#ifndef __ARCH_ARM_SRC_STM32F0L0_HARDWARE_ST32F05XF07XF09X_MEMORYMAP_H
+#define __ARCH_ARM_SRC_STM32F0L0_HARDWARE_ST32F05XF07XF09X_MEMORYMAP_H
 
 /************************************************************************************
  * Pre-processor Definitions
@@ -154,4 +154,4 @@
 #define STM32_SCS_BASE       0xe000e000
 #define STM32_DEBUGMCU_BASE  0xe0042000
 
-#endif /* __ARCH_ARM_SRC_STM32F0L0_CHIP_ST32F05XF07XF09X_MEMORYMAP_H */
+#endif /* __ARCH_ARM_SRC_STM32F0L0_HARDWARE_ST32F05XF07XF09X_MEMORYMAP_H */
diff --git a/arch/arm/src/stm32f0l0/hardware/stm32f07x_pinmap.h b/arch/arm/src/stm32f0l0/hardware/stm32f07x_pinmap.h
index 18cf426856f..86dfff58ede 100644
--- a/arch/arm/src/stm32f0l0/hardware/stm32f07x_pinmap.h
+++ b/arch/arm/src/stm32f0l0/hardware/stm32f07x_pinmap.h
@@ -34,8 +34,8 @@
  *
  ************************************************************************************/
 
-#ifndef __ARCH_ARM_SRC_STM32F0L0_CHIP_STM32F07X_PINMAP_H
-#define __ARCH_ARM_SRC_STM32F0L0_CHIP_STM32F07X_PINMAP_H
+#ifndef __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32F07X_PINMAP_H
+#define __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32F07X_PINMAP_H
 
 /************************************************************************************
  * Included Files
@@ -397,4 +397,4 @@
 
 #define GPIO_USB_NOE             (GPIO_ALT | GPIO_AF2 | GPIO_PORTA | GPIO_PIN13)
 
-#endif /* __ARCH_ARM_SRC_STM32F0L0_CHIP_STM32F07X_PINMAP_H */
+#endif /* __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32F07X_PINMAP_H */
diff --git a/arch/arm/src/stm32f0l0/hardware/stm32f09x_pinmap.h b/arch/arm/src/stm32f0l0/hardware/stm32f09x_pinmap.h
index 5c55782f865..a136099cf3f 100644
--- a/arch/arm/src/stm32f0l0/hardware/stm32f09x_pinmap.h
+++ b/arch/arm/src/stm32f0l0/hardware/stm32f09x_pinmap.h
@@ -34,8 +34,8 @@
  *
  ************************************************************************************/
 
-#ifndef __ARCH_ARM_SRC_STM32F0L0_CHIP_STM32F09X_PINMAP_H
-#define __ARCH_ARM_SRC_STM32F0L0_CHIP_STM32F09X_PINMAP_H
+#ifndef __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32F09X_PINMAP_H
+#define __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32F09X_PINMAP_H
 
 /************************************************************************************
  * Included Files
@@ -427,4 +427,4 @@
 #define GPIO_USART8_RX_3         (GPIO_ALT | GPIO_AF0 | GPIO_PORTD | GPIO_PIN13)
 #define GPIO_USART8_CK_RST       (GPIO_ALT | GPIO_AF2 | GPIO_PORTD | GPIO_PIN14)
 
-#endif /* __ARCH_ARM_SRC_STM32F0L0_CHIP_STM32F09X_PINMAP_H */
+#endif /* __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32F09X_PINMAP_H */
diff --git a/arch/arm/src/stm32f0l0/hardware/stm32f0_exti.h b/arch/arm/src/stm32f0l0/hardware/stm32f0_exti.h
index cee311b6dcc..15977104630 100644
--- a/arch/arm/src/stm32f0l0/hardware/stm32f0_exti.h
+++ b/arch/arm/src/stm32f0l0/hardware/stm32f0_exti.h
@@ -34,8 +34,8 @@
  *
  ************************************************************************************/
 
-#ifndef __ARCH_ARM_SRC_STM32F0L0_CHIP_STM32F0_EXTI_H
-#define __ARCH_ARM_SRC_STM32F0L0_CHIP_STM32F0_EXTI_H
+#ifndef __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32F0_EXTI_H
+#define __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32F0_EXTI_H
 
 /************************************************************************************
  * Included Files
@@ -128,4 +128,4 @@
 #define EXTI_PR_SHIFT            (0)                /* Bits 0-X: Pending bit for all lines */
 #define EXTI_PR_MASK             STM32_EXTI_MASK
 
-#endif /* __ARCH_ARM_SRC_STM32F0L0_CHIP_STM32F0_EXTI_H */
+#endif /* __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32F0_EXTI_H */
diff --git a/arch/arm/src/stm32f0l0/hardware/stm32f0_flash.h b/arch/arm/src/stm32f0l0/hardware/stm32f0_flash.h
index d46e2c6117a..38bed16eb3a 100644
--- a/arch/arm/src/stm32f0l0/hardware/stm32f0_flash.h
+++ b/arch/arm/src/stm32f0l0/hardware/stm32f0_flash.h
@@ -33,8 +33,8 @@
  *
  ************************************************************************************/
 
-#ifndef __ARCH_ARM_SRC_STM32F0L0_CHIP_STM32F0_FLASH_H
-#define __ARCH_ARM_SRC_STM32F0L0_CHIP_STM32F0_FLASH_H
+#ifndef __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32F0_FLASH_H
+#define __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32F0_FLASH_H
 
 /************************************************************************************
  * Included Files
@@ -105,4 +105,4 @@
 
 #define FLASH_OBR_                            /* To be provided */
 
-#endif /* __ARCH_ARM_SRC_STM32F0L0_CHIP_STM32F0_FLASH_H */
+#endif /* __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32F0_FLASH_H */
diff --git a/arch/arm/src/stm32f0l0/hardware/stm32f0_rcc.h b/arch/arm/src/stm32f0l0/hardware/stm32f0_rcc.h
index dca713026e0..ea9dce5bc4e 100644
--- a/arch/arm/src/stm32f0l0/hardware/stm32f0_rcc.h
+++ b/arch/arm/src/stm32f0l0/hardware/stm32f0_rcc.h
@@ -34,8 +34,8 @@
  *
  ************************************************************************************/
 
-#ifndef __ARCH_ARM_SRC_STM32F0L0_CHIP_STM32F0_RCC_H
-#define __ARCH_ARM_SRC_STM32F0L0_CHIP_STM32F0_RCC_H
+#ifndef __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32F0_RCC_H
+#define __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32F0_RCC_H
 
 /************************************************************************************
  * Pre-processor Definitions
@@ -393,4 +393,4 @@
 #define RCC_CR2_HSI48CAL_SHIFT      (24)      /* Bits 24-31: HSI48 factory clock calibration */
 #define RCC_CR2_HSI48CAL_MASK       (0xff << RCC_CR2_HSI48CAL_SHIFT)
 
-#endif /* __ARCH_ARM_SRC_STM32F0L0_CHIP_STM32F0_RCC_H */
+#endif /* __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32F0_RCC_H */
diff --git a/arch/arm/src/stm32f0l0/hardware/stm32f0_syscfg.h b/arch/arm/src/stm32f0l0/hardware/stm32f0_syscfg.h
index 4954abd928e..a554d053ecc 100644
--- a/arch/arm/src/stm32f0l0/hardware/stm32f0_syscfg.h
+++ b/arch/arm/src/stm32f0l0/hardware/stm32f0_syscfg.h
@@ -34,8 +34,8 @@
  *
  ****************************************************************************************************/
 
-#ifndef __ARCH_ARM_SRC_STM32F0L0_CHIP_STM32F0_SYSCFG_H
-#define __ARCH_ARM_SRC_STM32F0L0_CHIP_STM32F0_SYSCFG_H
+#ifndef __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32F0_SYSCFG_H
+#define __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32F0_SYSCFG_H
 
 /****************************************************************************************************
  * Included Files
@@ -388,4 +388,4 @@
 #define SYSCFG_ITLINE30_CEC            (1 << 0)  /* Bit 0: CEC interrupt request pending, combined with EXTI line 27 */
 #define SYSCFG_ITLINE30_CAN            (1 << 1)  /* Bit 1: CAN interrupt request pending */
 
-#endif /* __ARCH_ARM_SRC_STM32F0L0_CHIP_STM32F0_SYSCFG_H */
+#endif /* __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32F0_SYSCFG_H */
diff --git a/arch/arm/src/stm32f0l0/hardware/stm32g0_exti.h b/arch/arm/src/stm32f0l0/hardware/stm32g0_exti.h
index ed111604056..ad7ac9e64cd 100644
--- a/arch/arm/src/stm32f0l0/hardware/stm32g0_exti.h
+++ b/arch/arm/src/stm32f0l0/hardware/stm32g0_exti.h
@@ -33,8 +33,8 @@
  *
  ************************************************************************************/
 
-#ifndef __ARCH_ARM_SRC_STM32F0L0_CHIP_STM32G0_EXTI_H
-#define __ARCH_ARM_SRC_STM32F0L0_CHIP_STM32G0_EXTI_H
+#ifndef __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32G0_EXTI_H
+#define __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32G0_EXTI_H
 
 /************************************************************************************
  * Included Files
@@ -100,4 +100,4 @@
 
 /* TODO */
 
-#endif /* __ARCH_ARM_SRC_STM32F0L0_CHIP_STM32G0_EXTI_H */
+#endif /* __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32G0_EXTI_H */
diff --git a/arch/arm/src/stm32f0l0/hardware/stm32g0_flash.h b/arch/arm/src/stm32f0l0/hardware/stm32g0_flash.h
index b0366d60b74..328bb48267a 100644
--- a/arch/arm/src/stm32f0l0/hardware/stm32g0_flash.h
+++ b/arch/arm/src/stm32f0l0/hardware/stm32g0_flash.h
@@ -1,5 +1,5 @@
 /************************************************************************************
- * arch/arm/src/stm32/hardware/stm32g0_flash.h
+ * arch/arm/src/stm32f0l0/hardware/stm32g0_flash.h
  *
  *   Copyright (C) 2018 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
diff --git a/arch/arm/src/stm32f0l0/hardware/stm32g0_pwr.h b/arch/arm/src/stm32f0l0/hardware/stm32g0_pwr.h
index 31a3e501770..c172bc2d3f4 100644
--- a/arch/arm/src/stm32f0l0/hardware/stm32g0_pwr.h
+++ b/arch/arm/src/stm32f0l0/hardware/stm32g0_pwr.h
@@ -1,5 +1,5 @@
 /************************************************************************************
- * arch/arm/src/stm32/chip/stm32g0_pwr.h
+ * arch/arm/src/stm32f0l0/hardware/stm32g0_pwr.h
  *
  *   Copyright (C) 2018 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
diff --git a/arch/arm/src/stm32f0l0/hardware/stm32l0_exti.h b/arch/arm/src/stm32f0l0/hardware/stm32l0_exti.h
index 9921d07330a..8b2e3130bd2 100644
--- a/arch/arm/src/stm32f0l0/hardware/stm32l0_exti.h
+++ b/arch/arm/src/stm32f0l0/hardware/stm32l0_exti.h
@@ -33,8 +33,8 @@
  *
  ************************************************************************************/
 
-#ifndef __ARCH_ARM_SRC_STM32F0L0_CHIP_STM32L0_EXTI_H
-#define __ARCH_ARM_SRC_STM32F0L0_CHIP_STM32L0_EXTI_H
+#ifndef __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32L0_EXTI_H
+#define __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32L0_EXTI_H
 
 /************************************************************************************
  * Included Files
@@ -126,4 +126,4 @@
 #define EXTI_PR_SHIFT            (0)                /* Bits 0-X: Pending bit for all lines */
 #define EXTI_PR_MASK             STM32_EXTI_MASK
 
-#endif /* __ARCH_ARM_SRC_STM32F0L0_CHIP_STM32L0_EXTI_H */
+#endif /* __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32L0_EXTI_H */
diff --git a/arch/arm/src/stm32f0l0/hardware/stm32l0_flash.h b/arch/arm/src/stm32f0l0/hardware/stm32l0_flash.h
index bbff059cb08..d987124ede6 100644
--- a/arch/arm/src/stm32f0l0/hardware/stm32l0_flash.h
+++ b/arch/arm/src/stm32f0l0/hardware/stm32l0_flash.h
@@ -1,5 +1,5 @@
 /************************************************************************************
- * arch/arm/src/stm32/hardware/stm32l0_flash.h
+ * arch/arm/src/stm32f0l0/hardware/stm32l0_flash.h
  *
  *   Copyright (C) 2018 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
diff --git a/arch/arm/src/stm32f0l0/hardware/stm32l0_pwr.h b/arch/arm/src/stm32f0l0/hardware/stm32l0_pwr.h
index ece00a1ecfd..672aebafeef 100644
--- a/arch/arm/src/stm32f0l0/hardware/stm32l0_pwr.h
+++ b/arch/arm/src/stm32f0l0/hardware/stm32l0_pwr.h
@@ -1,5 +1,5 @@
 /************************************************************************************
- * arch/arm/src/stm32/chip/stm32l0_pwr.h
+ * arch/arm/src/stm32f0l0/hardware/stm32l0_pwr.h
  *
  *   Copyright (C) 2018 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>