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pci: add rom addr and rom size to resource

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Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
This commit is contained in:
lipengfei28
2024-06-04 20:02:03 +08:00
committed by Xiang Xiao
parent 3250625a15
commit dba7700813
2 changed files with 26 additions and 7 deletions
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drivers/pci/pci.c
+24 -7
View File
@@ -429,12 +429,18 @@ static uint32_t pci_size(uint32_t base, uint32_t maxbase, uint32_t mask)
* Input Parameters: * Input Parameters:
* dev - The PCI device be found * dev - The PCI device be found
* max_bar - Max bar number(6 or 2) * max_bar - Max bar number(6 or 2)
* rom_addr - The pci device rom addr
* *
****************************************************************************/ ****************************************************************************/
static void pci_setup_device(FAR struct pci_device_s *dev, int max_bar) static void pci_setup_device(FAR struct pci_device_s *dev, int max_bar,
uint8_t rom_addr)
{ {
int bar; int bar;
uint32_t orig;
uint32_t mask;
uint32_t size;
uintptr_t start;
#ifdef CONFIG_PCI_ASSIGN_ALL_BUSES #ifdef CONFIG_PCI_ASSIGN_ALL_BUSES
uint8_t cmd; uint8_t cmd;
@@ -449,10 +455,6 @@ static void pci_setup_device(FAR struct pci_device_s *dev, int max_bar)
int base_address_1 = PCI_BASE_ADDRESS_1 + bar * 4; int base_address_1 = PCI_BASE_ADDRESS_1 + bar * 4;
FAR struct pci_resource_s *res; FAR struct pci_resource_s *res;
unsigned int flags; unsigned int flags;
uintptr_t start;
uint32_t orig;
uint32_t mask;
uint32_t size;
pci_read_config_dword(dev, base_address_0, &orig); pci_read_config_dword(dev, base_address_0, &orig);
pci_write_config_dword(dev, base_address_0, 0xfffffffe); pci_write_config_dword(dev, base_address_0, 0xfffffffe);
@@ -546,6 +548,21 @@ static void pci_setup_device(FAR struct pci_device_s *dev, int max_bar)
} }
} }
pci_read_config_dword(dev, rom_addr, &orig);
pci_write_config_dword(dev, rom_addr,
~PCI_ROM_ADDRESS_ENABLE);
pci_read_config_dword(dev, rom_addr, &mask);
pci_write_config_dword(dev, rom_addr, orig);
start = PCI_ROM_ADDR(orig);
size = PCI_ROM_SIZE(mask);
if (start != 0 && size != 0)
{
dev->resource[PCI_ROM_RESOURCE].flags |=
PCI_RESOURCE_MEM | PCI_RESOURCE_PREFETCH;
dev->resource[PCI_ROM_RESOURCE].start = start;
dev->resource[PCI_ROM_RESOURCE].end = start + size - 1;
}
#ifdef CONFIG_PCI_ASSIGN_ALL_BUSES #ifdef CONFIG_PCI_ASSIGN_ALL_BUSES
pci_write_config_byte(dev, PCI_COMMAND, cmd); pci_write_config_byte(dev, PCI_COMMAND, cmd);
#endif #endif
@@ -763,7 +780,7 @@ static void pci_scan_bus(FAR struct pci_bus_s *bus)
goto bad; goto bad;
} }
pci_setup_device(dev, 6); pci_setup_device(dev, 6, PCI_ROM_ADDRESS);
pci_read_config_word(dev, PCI_SUBSYSTEM_ID, pci_read_config_word(dev, PCI_SUBSYSTEM_ID,
&dev->subsystem_device); &dev->subsystem_device);
@@ -792,7 +809,7 @@ static void pci_scan_bus(FAR struct pci_bus_s *bus)
pci_scan_bus(child_bus); pci_scan_bus(child_bus);
pci_postsetup_bridge(dev); pci_postsetup_bridge(dev);
pci_setup_device(dev, 2); pci_setup_device(dev, 2, PCI_ROM_ADDRESS1);
break; break;
default: default:
include/nuttx/pci/pci_regs.h
+2
View File
@@ -106,6 +106,8 @@
#define PCI_ROM_ADDRESS 0x30 /* Bits 31..11 are address, 10..1 reserved */ #define PCI_ROM_ADDRESS 0x30 /* Bits 31..11 are address, 10..1 reserved */
#define PCI_ROM_ADDRESS_ENABLE 0x01 #define PCI_ROM_ADDRESS_ENABLE 0x01
#define PCI_ROM_ADDRESS_MASK (~0x7fful) #define PCI_ROM_ADDRESS_MASK (~0x7fful)
#define PCI_ROM_ADDR(x) ((x) & PCI_ROM_ADDRESS_MASK)
#define PCI_ROM_SIZE(x) (PCI_ROM_ADDR(x) & -PCI_ROM_ADDR(x))
#define PCI_CAPABILITY_LIST 0x34 /* Offset of first capability list entry */ #define PCI_CAPABILITY_LIST 0x34 /* Offset of first capability list entry */