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audio: nxstyle fixes for core and drivers

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nxstyle fixes for the audio core and drivers

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
This commit is contained in:
Alin Jerpelea
2020-04-21 09:45:24 +02:00
committed by patacongo
parent 76c47f6b21
commit d9d720b296
24 changed files with 660 additions and 434 deletions
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drivers/audio/cs43l22_debug.c
+39 -39
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@@ -82,47 +82,47 @@ struct cs43l22_regdump_s
#ifdef CONFIG_CS43L22_REGDUMP
static const struct cs43l22_regdump_s g_cs43l22_debug[] =
{
{"CHIP_ID_REV", CS43L22_ID_REV },
{"POWER_CTRL1", CS43L22_POWER_CTRL1 },
{"POWER_CTRL2", CS43L22_POWER_CTRL2 },
{"CLOCK_CTRL", CS43L22_CLOCK_CTRL },
{"INTERFACE_CTRL1", CS43L22_INTERFACE_CTRL1 },
{"INTERFACE_CTRL2", CS43L22_INTERFACE_CTRL2 },
{"PASS_SEL_A", CS43L22_PASS_SEL_A },
{"PASS_SEL_B", CS43L22_PASS_SEL_B },
{"ANLG_ZC_SR_SEL", CS43L22_ANLG_ZC_SR_SEL },
{"PASS_GANG_CTRL", CS43L22_PASS_GANG_CTRL },
{"PLAYBACK_CTRL1", CS43L22_PLAYBACK_CTRL1 },
{"MISCLLNS_CTRL", CS43L22_MISCLLNS_CTRL },
{"PLAYBACK_CTRL2", CS43L22_PLAYBACK_CTRL2 },
{"PASS_VOL_A", CS43L22_PASS_VOL_A },
{"PASS_VOL_B", CS43L22_PASS_VOL_B },
{"PCM_VOL_A", CS43L22_PCM_VOL_A },
{"PCM_VOL_B", CS43L22_PCM_VOL_B },
{"BP_FREQ_ON_T", CS43L22_BP_FREQ_ON_TIME },
{"BP_VOL_OFF_T", CS43L22_BP_VOL_OFF_TIME },
{"BP_TONE_CFG", CS43L22_BP_TONE_CFG },
{"TONE_CTRL", CS43L22_TONE_CTRL },
{"MS_VOL_CTRL_A", CS43L22_MS_VOL_CTRL_A },
{"MS_VOL_CTRL_B", CS43L22_MS_VOL_CTRL_B },
{"HP_VOL_CTRL_A", CS43L22_HP_VOL_CTRL_A },
{"HP_VOL_CTRL_B", CS43L22_HP_VOL_CTRL_B },
{"SPK_VOL_CTRL_A", CS43L22_SPK_VOL_CTRL_A },
{"SPK_VOL_CTRL_B", CS43L22_SPK_VOL_CTRL_B },
{"PCM_CH_SWAP", CS43L22_PCM_CH_SWAP },
{"LIM_CTRL1", CS43L22_LIM_CTRL1 },
{"LIM_CTRL2", CS43L22_LIM_CTRL2 },
{"LIM_ATTACK_RATE", CS43L22_LIM_ATTACK_RATE },
{"STATUS", CS43L22_STATUS },
{"BAT_COMP", CS43L22_BAT_COMP },
{"VP_BAT_LEVEL", CS43L22_VP_BAT_LEVEL },
{"SPK_STATUS", CS43L22_SPK_STATUS },
{"TEMP_MON_CTRL", CS43L22_TEMP_MON_CTRL },
{"THERMAL_FOLDBACK",CS43L22_THERMAL_FOLDBACK},
{"CHRG_PUMP_FREQ", CS43L22_CHRG_PUMP_FREQ }
{"CHIP_ID_REV", CS43L22_ID_REV },
{"POWER_CTRL1", CS43L22_POWER_CTRL1 },
{"POWER_CTRL2", CS43L22_POWER_CTRL2 },
{"CLOCK_CTRL", CS43L22_CLOCK_CTRL },
{"INTERFACE_CTRL1", CS43L22_INTERFACE_CTRL1 },
{"INTERFACE_CTRL2", CS43L22_INTERFACE_CTRL2 },
{"PASS_SEL_A", CS43L22_PASS_SEL_A },
{"PASS_SEL_B", CS43L22_PASS_SEL_B },
{"ANLG_ZC_SR_SEL", CS43L22_ANLG_ZC_SR_SEL },
{"PASS_GANG_CTRL", CS43L22_PASS_GANG_CTRL },
{"PLAYBACK_CTRL1", CS43L22_PLAYBACK_CTRL1 },
{"MISCLLNS_CTRL", CS43L22_MISCLLNS_CTRL },
{"PLAYBACK_CTRL2", CS43L22_PLAYBACK_CTRL2 },
{"PASS_VOL_A", CS43L22_PASS_VOL_A },
{"PASS_VOL_B", CS43L22_PASS_VOL_B },
{"PCM_VOL_A", CS43L22_PCM_VOL_A },
{"PCM_VOL_B", CS43L22_PCM_VOL_B },
{"BP_FREQ_ON_T", CS43L22_BP_FREQ_ON_TIME },
{"BP_VOL_OFF_T", CS43L22_BP_VOL_OFF_TIME },
{"BP_TONE_CFG", CS43L22_BP_TONE_CFG },
{"TONE_CTRL", CS43L22_TONE_CTRL },
{"MS_VOL_CTRL_A", CS43L22_MS_VOL_CTRL_A },
{"MS_VOL_CTRL_B", CS43L22_MS_VOL_CTRL_B },
{"HP_VOL_CTRL_A", CS43L22_HP_VOL_CTRL_A },
{"HP_VOL_CTRL_B", CS43L22_HP_VOL_CTRL_B },
{"SPK_VOL_CTRL_A", CS43L22_SPK_VOL_CTRL_A },
{"SPK_VOL_CTRL_B", CS43L22_SPK_VOL_CTRL_B },
{"PCM_CH_SWAP", CS43L22_PCM_CH_SWAP },
{"LIM_CTRL1", CS43L22_LIM_CTRL1 },
{"LIM_CTRL2", CS43L22_LIM_CTRL2 },
{"LIM_ATTACK_RATE", CS43L22_LIM_ATTACK_RATE },
{"STATUS", CS43L22_STATUS },
{"BAT_COMP", CS43L22_BAT_COMP },
{"VP_BAT_LEVEL", CS43L22_VP_BAT_LEVEL },
{"SPK_STATUS", CS43L22_SPK_STATUS },
{"TEMP_MON_CTRL", CS43L22_TEMP_MON_CTRL },
{"THERMAL_FOLDBACK", CS43L22_THERMAL_FOLDBACK},
{"CHRG_PUMP_FREQ", CS43L22_CHRG_PUMP_FREQ },
};
# define CS43L22_NREGISTERS (sizeof(g_cs43l22_debug)/sizeof(struct cs43l22_regdump_s))
# define CS43L22_NREGISTERS (sizeof(g_cs43l22_debug) / sizeof(struct cs43l22_regdump_s))
#endif /* CONFIG_CS43L22_REGDUMP */
/****************************************************************************