mirror of
https://github.com/apache/nuttx.git
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debug: Reduce CONFIG_CPP_HAVE_VARARGS usage
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
This commit is contained in:
Xiang Xiao
patacongo
+121
-727
File diff suppressed because it is too large
Load Diff
+2
-10
@@ -72,11 +72,7 @@
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*/
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#if !defined(CONFIG_BUILD_FLAT) && defined(__KERNEL__)
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# ifdef CONFIG_CPP_HAVE_VARARGS
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# define _NX_OPEN(p,f,...) nx_open(p,f,##__VA_ARGS__)
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# else
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# define _NX_OPEN nx_open
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# endif
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# define _NX_OPEN nx_open
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# define _NX_CLOSE(f) nx_close(f)
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# define _NX_READ(f,b,s) nx_read(f,b,s)
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# define _NX_WRITE(f,b,s) nx_write(f,b,s)
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@@ -87,11 +83,7 @@
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# define _NX_SETERRNO(r) set_errno(-(r))
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# define _NX_GETERRVAL(r) (r)
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#else
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# ifdef CONFIG_CPP_HAVE_VARARGS
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# define _NX_OPEN(p,f,...) open(p,f,##__VA_ARGS__)
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# else
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# define _NX_OPEN open
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# endif
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# define _NX_OPEN open
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# define _NX_CLOSE(f) close(f)
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# define _NX_READ(f,b,s) read(f,b,s)
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# define _NX_WRITE(f,b,s) write(f,b,s)
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+6
-15
@@ -51,6 +51,7 @@
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* Configuration ************************************************************/
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#ifndef CONFIG_ARCH_ADDRENV
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@@ -71,22 +72,12 @@
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/* Debug */
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#ifdef CONFIG_CPP_HAVE_VARARGS
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# ifdef CONFIG_DEBUG_SHM
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# define shmerr(format, ...) _err(format, ##__VA_ARGS__)
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# define shminfo(format, ...) _info(format, ##__VA_ARGS__)
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# else
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# define shmerr(format, ...) merr(format, ##__VA_ARGS__)
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# define shminfo(format, ...) minfo(format, ##__VA_ARGS__)
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# endif
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#ifdef CONFIG_DEBUG_SHM
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# define shmerr _err
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# define shminfo _info
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#else
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# ifdef CONFIG_DEBUG_SHM
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# define shmerr _err
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# define shminfo _info
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# else
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# define shmerr (void)
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# define shminfo (void)
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# endif
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# define shmerr merr
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# define shminfo minfo
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#endif
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/****************************************************************************
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@@ -51,7 +51,7 @@
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#define BQ2429X_CURRCHG_MIN 512
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#define BQ2429X_CURRCHG_MAX 3008
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/* BQ2429X Register Definitions ********************************************/
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/* BQ2429X Register Definitions *********************************************/
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#define BQ2429X_REG00 0x00
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#define BQ2429X_REG01 0x01
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#define BQ2429X_REG02 0x02
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@@ -66,12 +66,13 @@
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/* REG00 Input Source Control Register */
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/* For enabling Device Shutdown for shipping - EN_HIZ=1 until QON pressed*/
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/* For enabling Device Shutdown for shipping - EN_HIZ=1 until QON pressed */
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#define BQ2429XR1_EN_HIZ (1 << 7) /* 0 Disable (default) 1 Enable HighZ on battery, powerdown */
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/* Dynamic Power Management - Indicated in StatusReg DPM_STAT REG08[3]
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VINDPM - Input Voltage threshold (a drop below 5V) that triggers DPM
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INLIM - Input current threshold that triggers DPM */
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* VINDPM - Input Voltage threshold (a drop below 5V) that triggers DPM
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* INLIM - Input current threshold that triggers DPM
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*/
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#define BQ2429XR0_VINDPM_SHIFT 3 /* VIN DPM Offset 5V? Range*/
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#define BQ2429XR0_VINDPM_MASK (0xf << BQ2429XR0_VINDPM_SHIFT)
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@@ -81,14 +82,14 @@
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# define BQ2429XR0_VINDPM0_640mV (8 << BQ2429XR0_VINDPM_SHIFT)
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#define BQ2429XR0_INLIM_SHIFT 0 /* Input Current Limit - lower of I2C & ILIM */
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#define BQ2429XR0_INLIM_MASK (0x7 << BQ2429XR0_INLIM_SHIFT)
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# define BQ2429XR0_INLIM_0100mA (0x0 << BQ2429XR0_INLIM_SHIFT)
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# define BQ2429XR0_INLIM_0150mA (0x1 << BQ2429XR0_INLIM_SHIFT)
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# define BQ2429XR0_INLIM_0500mA (0x2 << BQ2429XR0_INLIM_SHIFT)
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# define BQ2429XR0_INLIM_0900mA (0x3 << BQ2429XR0_INLIM_SHIFT)
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# define BQ2429XR0_INLIM_1000mA (0x4 << BQ2429XR0_INLIM_SHIFT)
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# define BQ2429XR0_INLIM_1500mA (0x5 << BQ2429XR0_INLIM_SHIFT)
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# define BQ2429XR0_INLIM_2000mA (0x6 << BQ2429XR0_INLIM_SHIFT)
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# define BQ2429XR0_INLIM_3000mA (0x7 << BQ2429XR0_INLIM_SHIFT)
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# define BQ2429XR0_INLIM_0100MA (0x0 << BQ2429XR0_INLIM_SHIFT)
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# define BQ2429XR0_INLIM_0150MA (0x1 << BQ2429XR0_INLIM_SHIFT)
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# define BQ2429XR0_INLIM_0500MA (0x2 << BQ2429XR0_INLIM_SHIFT)
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# define BQ2429XR0_INLIM_0900MA (0x3 << BQ2429XR0_INLIM_SHIFT)
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# define BQ2429XR0_INLIM_1000MA (0x4 << BQ2429XR0_INLIM_SHIFT)
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# define BQ2429XR0_INLIM_1500MA (0x5 << BQ2429XR0_INLIM_SHIFT)
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# define BQ2429XR0_INLIM_2000MA (0x6 << BQ2429XR0_INLIM_SHIFT)
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# define BQ2429XR0_INLIM_3000MA (0x7 << BQ2429XR0_INLIM_SHIFT)
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/* REG01 Power-On Configuration Register */
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@@ -96,7 +97,7 @@
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#define BQ2429XR1_DOG_RESET (1 << 6) /* Write 1 for watchdog timer reset */
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#define BQ2429XR1_OTG_CONFIG (1 << 5) /* =0 Disable (default) =1 Enable See description */
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#define BQ2429XR1_CHG_CONFIG (1 << 4) /* =0 Disable =1 Enable (default) See description */
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#define BQ2429XR1_SYS_MINV_SHIFT 1 /* Min Sys Voltage Limit. Offset 3.0V Range 3-3.7V */
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#define BQ2429XR1_SYS_MINV_SHIFT 1 /* Min Sys Voltage Limit. Offset 3.0V Range 3-3.7V */
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#define BQ2429XR1_SYS_MINV_MASK (7 << BQ2429XR1_SYS_MINV_SHIFT)
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#define BQ2429XR1_SYS_MINV0_0_1V (1 << BQ2429XR1_SYS_MINV_SHIFT)
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#define BQ2429XR1_SYS_MINV0_0_2V (2 << BQ2429XR1_SYS_MINV_SHIFT)
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@@ -116,29 +117,29 @@
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#define BQ2429XR3_IPRECHG_SHIFT 4 /* Precharge I Limit. Offset 128mA Range 128-2048 mA */
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#define BQ2429XR3_IPRECHG_MASK (0xf << BQ2429XR3_IPRECHG_SHIFT)
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#define BQ2429XR3_IPRECHG_0128mA (0x00 << BQ2429XR3_IPRECHG_SHIFT)
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#define BQ2429XR3_IPRECHG_0128mA (0x01 << BQ2429XR3_IPRECHG_SHIFT)
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#define BQ2429XR3_IPRECHG_0256mA (0x02 << BQ2429XR3_IPRECHG_SHIFT)
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#define BQ2429XR3_IPRECHG_0384mA (0x03 << BQ2429XR3_IPRECHG_SHIFT)
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#define BQ2429XR3_IPRECHG_0512mA (0x04 << BQ2429XR3_IPRECHG_SHIFT)
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#define BQ2429XR3_IPRECHG_0768mA (0x05 << BQ2429XR3_IPRECHG_SHIFT)
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#define BQ2429XR3_IPRECHG_0896mA (0x06 << BQ2429XR3_IPRECHG_SHIFT)
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#define BQ2429XR3_IPRECHG_1024mA (0x07 << BQ2429XR3_IPRECHG_SHIFT)
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#define BQ2429XR3_IPRECHG_1152mA (0x10 << BQ2429XR3_IPRECHG_SHIFT)
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#define BQ2429XR3_IPRECHG_1280mA (0x11 << BQ2429XR3_IPRECHG_SHIFT)
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#define BQ2429XR3_IPRECHG_1408mA (0x12 << BQ2429XR3_IPRECHG_SHIFT)
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#define BQ2429XR3_IPRECHG_1536mA (0x13 << BQ2429XR3_IPRECHG_SHIFT)
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#define BQ2429XR3_IPRECHG_1664mA (0x14 << BQ2429XR3_IPRECHG_SHIFT)
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#define BQ2429XR3_IPRECHG_1792mA (0x15 << BQ2429XR3_IPRECHG_SHIFT)
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#define BQ2429XR3_IPRECHG_1920mA (0x16 << BQ2429XR3_IPRECHG_SHIFT)
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#define BQ2429XR3_IPRECHG_2048mA (0x17 << BQ2429XR3_IPRECHG_SHIFT)
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#define BQ2429XR3_IPRECHG_0128MA (0x00 << BQ2429XR3_IPRECHG_SHIFT)
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#define BQ2429XR3_IPRECHG_0128MA (0x01 << BQ2429XR3_IPRECHG_SHIFT)
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#define BQ2429XR3_IPRECHG_0256MA (0x02 << BQ2429XR3_IPRECHG_SHIFT)
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#define BQ2429XR3_IPRECHG_0384MA (0x03 << BQ2429XR3_IPRECHG_SHIFT)
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#define BQ2429XR3_IPRECHG_0512MA (0x04 << BQ2429XR3_IPRECHG_SHIFT)
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#define BQ2429XR3_IPRECHG_0768MA (0x05 << BQ2429XR3_IPRECHG_SHIFT)
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#define BQ2429XR3_IPRECHG_0896MA (0x06 << BQ2429XR3_IPRECHG_SHIFT)
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#define BQ2429XR3_IPRECHG_1024MA (0x07 << BQ2429XR3_IPRECHG_SHIFT)
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#define BQ2429XR3_IPRECHG_1152MA (0x10 << BQ2429XR3_IPRECHG_SHIFT)
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#define BQ2429XR3_IPRECHG_1280MA (0x11 << BQ2429XR3_IPRECHG_SHIFT)
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#define BQ2429XR3_IPRECHG_1408MA (0x12 << BQ2429XR3_IPRECHG_SHIFT)
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#define BQ2429XR3_IPRECHG_1536MA (0x13 << BQ2429XR3_IPRECHG_SHIFT)
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#define BQ2429XR3_IPRECHG_1664MA (0x14 << BQ2429XR3_IPRECHG_SHIFT)
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#define BQ2429XR3_IPRECHG_1792MA (0x15 << BQ2429XR3_IPRECHG_SHIFT)
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#define BQ2429XR3_IPRECHG_1920MA (0x16 << BQ2429XR3_IPRECHG_SHIFT)
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#define BQ2429XR3_IPRECHG_2048MA (0x17 << BQ2429XR3_IPRECHG_SHIFT)
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#define BQ2429XR3_ITERM_SHIFT 0 /* Offset 128mA Range 128-2048 mA (128-1024 mA in BQ24296M )*/
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#define BQ2429XR3_ITERM_MASK (0xf << BQ2429XR3_ITERM_SHIFT)
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#define BQ2429XR3_ITERM0_128mA (1 << BQ2429XR3_ITERM_SHIFT)
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#define BQ2429XR3_ITERM0_256mA (2 << BQ2429XR3_ITERM_SHIFT)
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#define BQ2429XR3_ITERM0_512mA (4 << BQ2429XR3_ITERM_SHIFT)
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#define BQ2429XR3_ITERM0_1024mA (8 << BQ2429XR3_ITERM_SHIFT) /* Reserved in BQ24296M */
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#define BQ2429XR3_ITERM0_128MA (1 << BQ2429XR3_ITERM_SHIFT)
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#define BQ2429XR3_ITERM0_256MA (2 << BQ2429XR3_ITERM_SHIFT)
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#define BQ2429XR3_ITERM0_512MA (4 << BQ2429XR3_ITERM_SHIFT)
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#define BQ2429XR3_ITERM0_1024MA (8 << BQ2429XR3_ITERM_SHIFT) /* Reserved in BQ24296M */
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/* REG04 Charge Voltage Control Register */
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#define BQ2429XR4_VREG_SHIFT 2 /* Offset 3.504V Range 3.504-4.400V Default 4.208V */
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@@ -154,12 +155,12 @@
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#define BQ2429XR5_WATCHDOG_SHIFT 4 /* Watchdog Timer Settings */
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#define BQ2429XR5_WATCHDOG_MASK (3 << BQ2429XR5_WATCHDOG_SHIFT)
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# define BQ2429XR5_WATCHDOG_DIS (0 << BQ2429XR5_WATCHDOG_SHIFT)
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# define BQ2429XR5_WATCHDOG_040Sec (1 << BQ2429XR5_WATCHDOG_SHIFT)
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# define BQ2429XR5_WATCHDOG_080Sec (2 << BQ2429XR5_WATCHDOG_SHIFT)
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# define BQ2429XR5_WATCHDOG_160Sec (3 << BQ2429XR5_WATCHDOG_SHIFT)
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# define BQ2429XR5_WATCHDOG_040SEC (1 << BQ2429XR5_WATCHDOG_SHIFT)
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# define BQ2429XR5_WATCHDOG_080SEC (2 << BQ2429XR5_WATCHDOG_SHIFT)
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# define BQ2429XR5_WATCHDOG_160SEC (3 << BQ2429XR5_WATCHDOG_SHIFT)
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#define BQ2429XR5_EN_TIMER (1 << 3) /* 0=Disable 1=Enable(default) */
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/* Fast Charge Timer Settings */
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/* Fast Charge Timer Settings */
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#define BQ2429XR5_CHG_TIMER_SHIFT 1
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#define BQ2429XR5_CHG_TIMER_MASK (3 << BQ2429XR5_CHG_TIMER_SHIFT)
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# define BQ2429XR5_CHG_TIMER_05hrs (0 << BQ2429XR5_CHG_TIMER_SHIFT)
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@@ -223,7 +224,7 @@
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#define BQ2429XR9_WATCHDOG_FAULT (1 << 7) /* 1=Watchdog Timer expired */
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#define BQ2429XR9_OTG_FAULT (1 << 6) /* 1=Bus overloaded in OTG, or VBUS OVP or battery low */
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#define BQ2429XR9_CHRG_FAULT_SHIFT 4 /* Charging Status */
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#define BQ2429XR9_CHRG_FAULT_SHIFT 4 /* Charging Status */
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#define BQ2429XR9_CHRG_FAULT_MASK (3 << BQ2429XR9_CHRG_FAULT_SHIFT)
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# define BQ2429XR9_CHRG_FAULT_NORMAL (0 << BQ2429XR9_CHRG_FAULT_SHIFT)
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# define BQ2429XR9_CHRG_FAULT_INPUT (1 << BQ2429XR9_CHRG_FAULT_SHIFT)
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