Fix I2C/FSMC conflict for STM32; Fix STM32 clock setup

git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@3942 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo
2011-09-08 17:56:08 +00:00
parent 19e5bfd627
commit d96149a9d1
16 changed files with 387 additions and 150 deletions
+4
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@@ -2060,3 +2060,7 @@
Li Zhuoyi (Lzyy). Li Zhuoyi (Lzyy).
* arch/arm/src/lpc17xx/lpc17_i2c.c: I2C driver for the NXP LPC17xx family * arch/arm/src/lpc17xx/lpc17_i2c.c: I2C driver for the NXP LPC17xx family
submitted by Li Zhuoyi (Lzyy) submitted by Li Zhuoyi (Lzyy)
* arch/arm/src/stm32_i2c.c: Correct two issues with the STM32 I2C driver:
(1) Clocking needs to be based on PCLK1, not HCLK and fast speed settings
need some additional bits; and (2) Correct a hang that will occur on
I2C1 if FSMC is also enabled.
+2 -2
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@@ -82,7 +82,7 @@
/* Control register 1 */ /* Control register 1 */
#define I2C_CR1_PE (1 << 0) /* Bit 0: Peripheral Enable*/ #define I2C_CR1_PE (1 << 0) /* Bit 0: Peripheral Enable */
#define I2C_CR1_SMBUS (1 << 1) /* Bit 1: SMBus Mode */ #define I2C_CR1_SMBUS (1 << 1) /* Bit 1: SMBus Mode */
#define I2C_CR1_SMBTYPE (1 << 3) /* Bit 3: SMBus Type */ #define I2C_CR1_SMBTYPE (1 << 3) /* Bit 3: SMBus Type */
#define I2C_CR1_ENARP (1 << 4) /* Bit 4: ARP Enable */ #define I2C_CR1_ENARP (1 << 4) /* Bit 4: ARP Enable */
@@ -167,7 +167,7 @@
#define I2C_CCR_CCR_SHIFT (0) /* Bits 11-0: Clock Control Register in Fast/Standard mode (Master mode) */ #define I2C_CCR_CCR_SHIFT (0) /* Bits 11-0: Clock Control Register in Fast/Standard mode (Master mode) */
#define I2C_CCR_CCR_MASK (0x0fff << I2C_CCR_CCR_SHIFT) #define I2C_CCR_CCR_MASK (0x0fff << I2C_CCR_CCR_SHIFT)
#define I2C_CCR_DUTY (1 << 14) /* Bit 14: Fast Mode Duty Cycle */ #define I2C_CCR_DUTY (1 << 14) /* Bit 14: Fast Mode Duty Cycle */
#define I2C_CCR_FS (1 << 15) /* Bit 15: I2C Master Mode Selection */ #define I2C_CCR_FS (1 << 15) /* Bit 15: Fast Mode Selection */
/* TRISE Register */ /* TRISE Register */
+1 -1
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@@ -176,7 +176,7 @@
/* APB2 Peripheral reset register */ /* APB2 Peripheral reset register */
#define RCC_APB2RSTR_AFIORST (1 << 0) /* Bit 0: Alternate Function I/O reset */ #define RCC_APB2RSTR_AFIORST (1 << 0) /* Bit 0: Alternate Function I/O reset */
#define RCC_APB2RSTR_IOPARST (1 << 2) /* Bit 2: I/O port A reset */ #define RCC_APB2RSTR_IOPARST (1 << 2) /* Bit 2: I/O port A reset */
#define RCC_APB2RSTR_IOPBRST (1 << 3) /* Bit 3: IO port B reset */ #define RCC_APB2RSTR_IOPBRST (1 << 3) /* Bit 3: IO port B reset */
#define RCC_APB2RSTR_IOPCRST (1 << 4) /* Bit 4: IO port C reset */ #define RCC_APB2RSTR_IOPCRST (1 << 4) /* Bit 4: IO port C reset */
File diff suppressed because it is too large Load Diff
+6
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@@ -360,6 +360,12 @@ STM3210E-EVAL-specific Configuration Options
CONFIG_STM32_USART1 CONFIG_STM32_USART1
CONFIG_STM32_ADC3 CONFIG_STM32_ADC3
Timer and I2C devices may need to the following to force power to be applied
unconditionally at power up. (Otherwise, the device is powered when it is
initialized).
CONFIG_STM32_FORCEPOWER
Alternate pin mappings (should not be used with the STM3210E-EVAL board): Alternate pin mappings (should not be used with the STM3210E-EVAL board):
CONFIG_STM32_TIM1_FULL_REMAP CONFIG_STM32_TIM1_FULL_REMAP
+5
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@@ -127,6 +127,11 @@ CONFIG_STM32_TIM8=n
CONFIG_STM32_USART1=y CONFIG_STM32_USART1=y
CONFIG_STM32_ADC3=n CONFIG_STM32_ADC3=n
#
# Timer and I2C devices may need to the following to force power to be applied:
#
#CONFIG_STM32_FORCEPOWER=y
# #
# STM32F103Z specific serial device driver settings # STM32F103Z specific serial device driver settings
# #
+5
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@@ -141,6 +141,11 @@ CONFIG_STM32_TIM8=n
CONFIG_STM32_USART1=y CONFIG_STM32_USART1=y
CONFIG_STM32_ADC3=n CONFIG_STM32_ADC3=n
#
# Timer and I2C devices may need to the following to force power to be applied:
#
#CONFIG_STM32_FORCEPOWER=y
# #
# STM32F103Z specific serial device driver settings # STM32F103Z specific serial device driver settings
# #
+5
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@@ -137,6 +137,11 @@ CONFIG_STM32_TIM8=n
CONFIG_STM32_USART1=y CONFIG_STM32_USART1=y
CONFIG_STM32_ADC3=n CONFIG_STM32_ADC3=n
#
# Timer and I2C devices may need to the following to force power to be applied:
#
#CONFIG_STM32_FORCEPOWER=y
# #
# STM32F103Z specific serial device driver settings # STM32F103Z specific serial device driver settings
# #
+5
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@@ -137,6 +137,11 @@ CONFIG_STM32_TIM8=n
CONFIG_STM32_USART1=y CONFIG_STM32_USART1=y
CONFIG_STM32_ADC3=n CONFIG_STM32_ADC3=n
#
# Timer and I2C devices may need to the following to force power to be applied:
#
#CONFIG_STM32_FORCEPOWER=y
# #
# STM32F103Z specific serial device driver settings # STM32F103Z specific serial device driver settings
# #
+5
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@@ -137,6 +137,11 @@ CONFIG_STM32_TIM8=n
CONFIG_STM32_USART1=y CONFIG_STM32_USART1=y
CONFIG_STM32_ADC3=n CONFIG_STM32_ADC3=n
#
# Timer and I2C devices may need to the following to force power to be applied:
#
#CONFIG_STM32_FORCEPOWER=y
# #
# STM32F103Z specific serial device driver settings # STM32F103Z specific serial device driver settings
# #
+5
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@@ -137,6 +137,11 @@ CONFIG_STM32_TIM8=n
CONFIG_STM32_USART1=y CONFIG_STM32_USART1=y
CONFIG_STM32_ADC3=n CONFIG_STM32_ADC3=n
#
# Timer and I2C devices may need to the following to force power to be applied:
#
#CONFIG_STM32_FORCEPOWER=y
# #
# STM32F103Z specific serial device driver settings # STM32F103Z specific serial device driver settings
# #
+5
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@@ -137,6 +137,11 @@ CONFIG_STM32_TIM8=n
CONFIG_STM32_USART1=y CONFIG_STM32_USART1=y
CONFIG_STM32_ADC3=n CONFIG_STM32_ADC3=n
#
# Timer and I2C devices may need to the following to force power to be applied:
#
#CONFIG_STM32_FORCEPOWER=y
# #
# STM32F103Z specific serial device driver settings # STM32F103Z specific serial device driver settings
# #
+5
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@@ -139,6 +139,11 @@ CONFIG_STM32_TIM8=n
CONFIG_STM32_USART1=y CONFIG_STM32_USART1=y
CONFIG_STM32_ADC3=n CONFIG_STM32_ADC3=n
#
# Timer and I2C devices may need to the following to force power to be applied:
#
#CONFIG_STM32_FORCEPOWER=y
# #
# STM32F103Z specific serial device driver settings # STM32F103Z specific serial device driver settings
# #
+1 -1
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@@ -88,7 +88,7 @@
* *JP7 will switch to PD6 * *JP7 will switch to PD6
*/ */
/* GPIO configurations unique to SRAM */ /* GPIO configurations unique to the LCD */
static const uint16_t g_lcdconfig[] = static const uint16_t g_lcdconfig[] =
{ {
@@ -139,6 +139,11 @@ CONFIG_STM32_TIM8=n
CONFIG_STM32_USART1=y CONFIG_STM32_USART1=y
CONFIG_STM32_ADC3=n CONFIG_STM32_ADC3=n
#
# Timer and I2C devices may need to the following to force power to be applied:
#
#CONFIG_STM32_FORCEPOWER=y
# #
# STM32F103Z specific serial device driver settings # STM32F103Z specific serial device driver settings
# #
@@ -137,6 +137,11 @@ CONFIG_STM32_TIM8=n
CONFIG_STM32_USART1=y CONFIG_STM32_USART1=y
CONFIG_STM32_ADC3=n CONFIG_STM32_ADC3=n
#
# Timer and I2C devices may need to the following to force power to be applied:
#
#CONFIG_STM32_FORCEPOWER=y
# #
# STM32F103Z specific serial device driver settings # STM32F103Z specific serial device driver settings
# #