From d9607f71d2c3a692d6770662e2c2cb30a192df8c Mon Sep 17 00:00:00 2001 From: Jukka Laitinen Date: Fri, 11 Mar 2022 16:17:26 +0200 Subject: [PATCH] Revert "arch/risc-v: Correct FPU register save area in riscv_copystate" This reverts commit 86358bff3bc814efb564a4427b4bcd6c3c91dbf0. --- arch/risc-v/src/common/riscv_copystate.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/arch/risc-v/src/common/riscv_copystate.c b/arch/risc-v/src/common/riscv_copystate.c index d1076f5dfa1..004aa15dd76 100644 --- a/arch/risc-v/src/common/riscv_copystate.c +++ b/arch/risc-v/src/common/riscv_copystate.c @@ -55,6 +55,10 @@ void riscv_copystate(uintptr_t *dest, uintptr_t *src) { int i; +#ifdef CONFIG_ARCH_FPU + uintptr_t *regs = dest; +#endif + /* In the RISC-V model, the state is copied from the stack to the TCB, * but only a reference is passed to get the state from the TCB. So the * following check avoids copying the TCB save area onto itself: @@ -75,7 +79,7 @@ void riscv_copystate(uintptr_t *dest, uintptr_t *src) */ #ifdef CONFIG_ARCH_FPU - riscv_savefpu(dest); + riscv_savefpu(regs); #endif } }