diff --git a/arch/arm/src/stm32/stm32_sdio.c b/arch/arm/src/stm32/stm32_sdio.c
index 8be48a8b8ef..82c82bcd7c3 100644
--- a/arch/arm/src/stm32/stm32_sdio.c
+++ b/arch/arm/src/stm32/stm32_sdio.c
@@ -418,7 +418,7 @@ static void stm32_endtransfer(struct stm32_dev_s *priv, sdio_eventset_t wkupeven
 
 static int  stm32_interrupt(int irq, void *context, FAR void *arg);
 #ifdef CONFIG_MMCSD_SDIOWAIT_WRCOMPLETE
-static int  stm32_rdyinterrupt(int irq, void *context);
+static int  stm32_rdyinterrupt(int irq, void *context, FAR void *arg);
 #endif
 
 /* SDIO interface methods ***************************************************/
@@ -668,14 +668,14 @@ static void stm32_configwaitints(struct stm32_dev_s *priv, uint32_t waitmask,
 
       /* Arm the SDIO_D Ready and install Isr */
 
-      stm32_gpiosetevent(pinset, true, false, false, stm32_rdyinterrupt);
+      stm32_gpiosetevent(pinset, true, false, false, stm32_rdyinterrupt, priv);
     }
 
   /* Disarm SDIO_D ready */
 
   if ((wkupevent & SDIOWAIT_WRCOMPLETE) != 0)
     {
-      stm32_gpiosetevent(GPIO_SDIO_D0, false, false, false , NULL);
+      stm32_gpiosetevent(GPIO_SDIO_D0, false, false, false , NULL, NULL);
       stm32_configgpio(GPIO_SDIO_D0);
     }
 #endif
@@ -1315,9 +1315,9 @@ static void stm32_endtransfer(struct stm32_dev_s *priv, sdio_eventset_t wkupeven
  ****************************************************************************/
 
 #ifdef CONFIG_MMCSD_SDIOWAIT_WRCOMPLETE
-static int stm32_rdyinterrupt(int irq, void *context)
+static int stm32_rdyinterrupt(int irq, void *context, FAR void *arg)
 {
-  struct stm32_dev_s *priv = &g_sdiodev;
+  struct stm32_dev_s *priv = (struct stm32_dev_s *) arg;
   stm32_endwait(priv, SDIOWAIT_WRCOMPLETE);
   return OK;
 }
diff --git a/arch/arm/src/stm32/stm32_wwdg.c b/arch/arm/src/stm32/stm32_wwdg.c
index ddf9c688474..a299de8c991 100644
--- a/arch/arm/src/stm32/stm32_wwdg.c
+++ b/arch/arm/src/stm32/stm32_wwdg.c
@@ -305,7 +305,7 @@ static int stm32_interrupt(int irq, FAR void *context, FAR void *arg)
            * upon return.
            */
 
-          priv->handler(irq, context);
+          priv->handler(irq, context, arg);
         }
 
       /* The EWI interrupt is cleared by writing '0' to the EWIF bit in the
@@ -780,7 +780,7 @@ void stm32_wwdginitialize(FAR const char *devpath)
 
   (void)watchdog_register(devpath, (FAR struct watchdog_lowerhalf_s *)priv);
 
-  /* When the microcontroller enters debug mode (Cortex™-M4F core halted),
+  /* When the microcontroller enters debug mode (Cortex�-M4F core halted),
    * the WWDG counter either continues to work normally or stops, depending
    * on DBG_WWDG_STOP configuration bit in DBG module.
    */