diff --git a/configs/efm32-g8xx-stk/include/board.h b/configs/efm32-g8xx-stk/include/board.h
index a3d2f783849..850801a9d1d 100644
--- a/configs/efm32-g8xx-stk/include/board.h
+++ b/configs/efm32-g8xx-stk/include/board.h
@@ -44,6 +44,8 @@
 
 #include <stdbool.h>
 
+#include "chip/efm32_cmu.h"
+
 /****************************************************************************
  * Pre-Processor Definitions
  ****************************************************************************/
@@ -57,11 +59,102 @@
  * The device boots with 14 MHz HFRCO as the HFCLK source.
  */
 
+#define BOARD_HAVE_HFXO        1        /* Have High frequency crystal oscillator */
+#define BOARD_HAVE_LFXO        1        /* Have Loq frequency crystal oscillator */
+
 #define BOARD_HFRCO_FREQUENCY  14000000 /* 14MHz on reset */
 #define BOARD_HFXO_FREQUENCY   32000000 /* 32MHz crystal on board */
 #define BOARD_LFRCO_FREQUENCY  32768    /* Low frequency oscillator */
 #define BOARD_LFXO_FREQUENCY   32768    /* 32MHz crystal on board */
 
+/* HFCLK - High Frequency Clock
+ *
+ * HFCLK is the selected High Frequency Clock. This clock is used by the CMU
+ * and drives the two prescalers that generate HFCORECLK and HFPERCLK. The
+ * HFCLK can be driven by a high-frequency oscillator (HFRCO or HFXO) or one
+ * of the low-frequency oscillators (LFRCO or LFXO). By default the HFRCO is
+ * selected.
+ *
+ * HFCLK can optionally be divided down by setting HFCLKDIV in CMU_CTRL to a
+ * nonzero value.  _CMU_CTRL_HFCLKDIV_DEFAULT is zero.
+ */
+
+#define BOARD_HFCLKSEL            _CMU_CMD_HFCLKSEL_HFXO
+#define BOARD_HFCLKDIV            _CMU_CTRL_HFCLKDIV_DEFAULT
+#define BOARD_HFCLK_FREQUENCY     BOARD_HFXO_FREQUENCY
+
+/* HFCORECLK - High Frequency Core Clock
+ *
+ * HFCORECLK is a prescaled version of HFCLK. This clock drives the Core
+ * Modules, which consists of the CPU and modules that are tightly coupled
+ * to the CPU, e.g. MSC, DMA etc.  The frequency of HFCORECLK is set using
+ * the CMU_HFCORECLKDIV register.
+ */
+
+#define BOARD_HFCORECLKDIV        _CMU_HFCORECLKDIV_HFCORECLKDIV_DEFAULT
+#define BOARD_HFCORECLK_FREQUENCY BOARD_HFXO_FREQUENCY
+
+/* HFPERCLK - High Frequency Peripheral Clock
+ *
+ * Like HFCORECLK, HFPERCLK can also be a prescaled version of HFCLK. This
+ * clock drives the High-Frequency Peripherals. The frequency of HFPERCLK is
+ * set using the CMU_HFPERCLKDIV register.
+ */
+
+#define BOARD_HFPERCLKDIV        _CMU_HFPERCLKDIV_HFPERCLKDIV_DEFAULT
+#define BOARD_HFPERCLK_FREQUENCY BOARD_HFXO_FREQUENCY
+
+/* LFACLK - Low Frequency A Clock
+ *
+ * LFACLK is the selected clock for the Low Energy A Peripherals. There are
+ * four selectable sources for LFACLK: LFRCO, LFXO, HFCORECLK/2 and ULFRCO.
+ * From reset, the LFACLK source is set to LFRCO. However, note that the
+ * LFRCO is disabled from reset. The selection is configured using the LFA
+ * field in CMU_LFCLKSEL. The HFCORECLK/2 setting allows the Low Energy A
+ * Peripherals to be used as high-frequency peripherals.
+ */
+
+#define BOARD_LFACLKSEL           _CMU_LFCLKSEL_LFA_LFXO
+#define BOARD_LFACLK_FREQUENCY    BOARD_LFXO_FREQUENCY
+
+/* LFBCLK - Low Frequency B Clock
+ *
+ * LFBCLK is the selected clock for the Low Energy B Peripherals. There are
+ * four selectable sources for LFBCLK: LFRCO, LFXO, HFCORECLK/2 and ULFRCO.
+ * From reset, the LFBCLK source is set to LFRCO. However, note that the
+ * LFRCO is disabled from reset. The selection is configured using the LFB
+ * field in CMU_LFCLKSEL. The HFCORECLK/2 setting allows the Low Energy B
+ * Peripherals to be used as high-frequency peripherals.
+ */
+
+#define BOARD_LFBCLKSEL           _CMU_LFCLKSEL_LFB_LFXO
+#define BOARD_LFBCLK_FREQUENCY    BOARD_LFXO_FREQUENCY
+
+/* PCNTnCLK - Pulse Counter n Clock
+ *
+ * Each available pulse counter is driven by its own clock, PCNTnCLK where
+ * n is the pulse counter instance number. Each pulse counter can be
+ * configured to use an external pin (PCNTn_S0) or LFACLK as PCNTnCLK.
+ */
+
+/* WDOGCLK - Watchdog Timer Clock
+ *
+ * The Watchdog Timer (WDOG) can be configured to use one of three different
+ * clock sources: LFRCO, LFXO or ULFRCO. ULFRCO (Ultra Low Frequency RC
+ * Oscillator) is a separate 1 kHz RC oscillator that also runs in EM3.
+ */
+
+/* AUXCLK - Auxiliary Clock
+ *
+ * AUXCLK is a 1-28 MHz clock driven by a separate RC oscillator, AUXHFRCO.
+ * This clock is used for flash programming and Serial Wire Output (SWO).
+ * During flash programming this clock will be active. If the AUXHFRCO has
+ * not been enabled explicitly by software, the MSC will automatically
+ * start and stop it. The AUXHFRCO is enabled by writing a 1 to AUXHFRCOEN
+ * in CMU_OSCENCMD. This explicit enabling is required when SWO is used.
+ */
+
+/* LEDs *********************************************************************/
 /* The EFM32 Gecko Starter Kit supports 4 yellow LEDs.  One side is grounded
  * so these LEDs are illuminated by outputting a high value.
  *