From d5fceadacd04bf653fff54e5f145c1d62a638410 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Tue, 25 Oct 2016 12:34:23 -0600 Subject: [PATCH] Xtensa: Fix some compilation issues --- arch/xtensa/src/common/xtensa_cpuint.S | 8 +++----- arch/xtensa/src/common/xtensa_dumpstate.c | 12 ++++++++++++ arch/xtensa/src/common/xtensa_inthandlers.S | 2 +- arch/xtensa/src/common/xtensa_nmihandler.S | 2 +- arch/xtensa/src/esp32/Make.defs | 20 ++++++++++---------- arch/xtensa/src/esp32/esp32_clockconfig.c | 12 ++++++++---- arch/xtensa/src/esp32/esp32_cpuint.c | 17 +++++++++-------- arch/xtensa/src/esp32/esp32_intdecode.c | 3 ++- arch/xtensa/src/esp32/esp32_timerisr.c | 8 -------- 9 files changed, 46 insertions(+), 38 deletions(-) diff --git a/arch/xtensa/src/common/xtensa_cpuint.S b/arch/xtensa/src/common/xtensa_cpuint.S index 8d5b9dd33f9..6ea46d71d41 100644 --- a/arch/xtensa/src/common/xtensa_cpuint.S +++ b/arch/xtensa/src/common/xtensa_cpuint.S @@ -37,10 +37,8 @@ * Included Files ****************************************************************************/ -#include -#include - -#include "xtensa_context.h" +#include +#include #if XCHAL_HAVE_INTERRUPTS @@ -104,7 +102,7 @@ xtensa_enable_cpuint: ****************************************************************************/ .text - .globa xtensa_disable_cpuint + .global xtensa_disable_cpuint .type xtensa_disable_cpuint, @function .align 4 diff --git a/arch/xtensa/src/common/xtensa_dumpstate.c b/arch/xtensa/src/common/xtensa_dumpstate.c index 74de6d74a55..f99f3d905cd 100644 --- a/arch/xtensa/src/common/xtensa_dumpstate.c +++ b/arch/xtensa/src/common/xtensa_dumpstate.c @@ -150,12 +150,24 @@ void xtensa_dumpstate(void) uint32_t istacksize; #endif +#ifdef CONFIG_SMP + /* Show the CPU number */ + + _alert("CPU%d:\n", up_cpu_index()); +#endif + /* Get the limits on the user stack memory */ if (rtcb->pid == 0) { +#warning REVISIT: Need top of IDLE stack +#if 0 ustackbase = g_idle_topstack - 4; ustacksize = CONFIG_IDLETHREAD_STACKSIZE; +#else + ustackbase = sp + 128; + ustacksize = 128; +#endif } else { diff --git a/arch/xtensa/src/common/xtensa_inthandlers.S b/arch/xtensa/src/common/xtensa_inthandlers.S index af4e068728d..b716c9f1f23 100644 --- a/arch/xtensa/src/common/xtensa_inthandlers.S +++ b/arch/xtensa/src/common/xtensa_inthandlers.S @@ -62,9 +62,9 @@ #include #include #include -#include #include "xtensa_macros.h" +#include "chip_macros.h" #include "xtensa_timer.h" /**************************************************************************** diff --git a/arch/xtensa/src/common/xtensa_nmihandler.S b/arch/xtensa/src/common/xtensa_nmihandler.S index 0720b1fe71f..7f10b2ae6a5 100644 --- a/arch/xtensa/src/common/xtensa_nmihandler.S +++ b/arch/xtensa/src/common/xtensa_nmihandler.S @@ -61,8 +61,8 @@ #include #include -#include +#include "chip_macros.h" #include "xtensa_macros.h" /**************************************************************************** diff --git a/arch/xtensa/src/esp32/Make.defs b/arch/xtensa/src/esp32/Make.defs index d904abdc6ca..5952d793776 100644 --- a/arch/xtensa/src/esp32/Make.defs +++ b/arch/xtensa/src/esp32/Make.defs @@ -40,16 +40,15 @@ HEAD_CSRC = esp32_start.c # Common XTENSA files (arch/xtensa/src/common) -CMN_ASRCS = xtensa_context.S xtensa_vectors.S xtensa_inthandlers.S -CMN_ASRCS += xtensa_nmihandler.S +CMN_ASRCS = xtensa_context.S xtensa_cpuint.S xtensa_vectors.S +CMN_ASRCS += xtensa_inthandlers.S xtensa_nmihandler.S CMN_CSRCS = xtensa_assert.c xtensa_blocktask.c xtensa_copystate.c -CMN_CSRCS += xtens_cpuint.c xtensa_createstack.c xtensa_exit.c -CMN_CSRCS += xtensa_idle.c xtensa_initialize.c xtensa_initialstate.c -CMN_CSRCS += xtensa_interruptcontext.c xtensa_irqdispatch.c -CMN_CSRCS += xtensa_lowputs.c xtensa_mdelay.c xtensa_modifyreg8.c -CMN_CSRCS += xtensa_modifyreg16.c xtensa_modifyreg32.c xtensa_puts.c -CMN_CSRCS += xtensa_releasepending.c xtensa_releasestack.c +CMN_CSRCS += xtensa_createstack.c xtensa_exit.c xtensa_idle.c +CMN_CSRCS += xtensa_initialize.c xtensa_initialstate.c xtensa_interruptcontext.c +CMN_CSRCS += xtensa_irqdispatch.c xtensa_lowputs.c xtensa_mdelay.c +CMN_CSRCS += xtensa_modifyreg8.c xtensa_modifyreg16.c xtensa_modifyreg32.c +CMN_CSRCS += xtensa_puts.c xtensa_releasepending.c xtensa_releasestack.c CMN_CSRCS += xtensa_reprioritizertr.c xtensa_schedsigaction.c CMN_CSRCS += xtensa_sigdeliver.c xtensa_stackframe.c xtensa_udelay.c CMN_CSRCS += xtensa_unblocktask.c xtensa_usestack.c @@ -78,8 +77,9 @@ endif # Required ESP32 files (arch/xtensa/src/lx6) CHIP_ASRCS = -CHIP_CSRCS = esp32_allocateheap.c esp32_cpuint.c esp32_intdecode.c -CHIP_CSRCS += esp32_irq.c esp32_region.c esp32_start.c esp32_timerisr.c +CHIP_CSRCS = esp32_allocateheap.c esp32_clockconfig.c esp32_cpuint.c +CHIP_CSRCS += esp32_intdecode.c esp32_irq.c esp32_region.c esp32_start.c +CHIP_CSRCS += esp32_timerisr.c # Configuration-dependent ESP32 files diff --git a/arch/xtensa/src/esp32/esp32_clockconfig.c b/arch/xtensa/src/esp32/esp32_clockconfig.c index 2da4e0b4dec..7ccc12090e0 100644 --- a/arch/xtensa/src/esp32/esp32_clockconfig.c +++ b/arch/xtensa/src/esp32/esp32_clockconfig.c @@ -13,7 +13,7 @@ * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. * You may obtain a copy of the License at - + * * http://www.apache.org/licenses/LICENSE-2.0 * * Unless required by applicable law or agreed to in writing, software @@ -26,21 +26,24 @@ /**************************************************************************** * Included Files - **************************************************************************** + ****************************************************************************/ #include #include "xtensa.h" +#ifndef CONFIG_SUPPRESS_CLOCK_CONFIG #warning REVISIT ... function prototypes void phy_get_romfunc_addr(void); void rtc_init_lite(void); void rtc_set_cpu_freq(xtal_freq_t xtal_freq, enum xtal_freq_e cpu_freq); +#endif /**************************************************************************** * Private Types - **************************************************************************** + ****************************************************************************/ +#ifndef CONFIG_SUPPRESS_CLOCK_CONFIG enum xtal_freq_e { XTAL_40M = 40, @@ -55,10 +58,11 @@ enum xtal_freq_e CPU_160M = 2, CPU_240M = 3, }; +#endif /**************************************************************************** * Public Functions - **************************************************************************** + ****************************************************************************/ /**************************************************************************** * Name: esp32_clockconfig diff --git a/arch/xtensa/src/esp32/esp32_cpuint.c b/arch/xtensa/src/esp32/esp32_cpuint.c index 119e9917e24..42d56e95662 100644 --- a/arch/xtensa/src/esp32/esp32_cpuint.c +++ b/arch/xtensa/src/esp32/esp32_cpuint.c @@ -41,6 +41,7 @@ #include #include +#include #include #include @@ -67,18 +68,18 @@ #ifdef CONFIG_SMP -static uint32_t *g_intenable[CONFIG_SMP_NCPUS]; +static uint32_t g_intenable[CONFIG_SMP_NCPUS]; #else -static uint32_t *g_intenable[1]; +static uint32_t g_intenable[1]; #endif /* Bitsets for free, unallocated CPU interrupts */ -status uint32_t g_level_ints = ESP32_LEVEL_SET; -status uint32_t g_edge_ints = ESP32_EDGE_SET; +static uint32_t g_level_ints = ESP32_LEVEL_SET; +static uint32_t g_edge_ints = ESP32_EDGE_SET; /**************************************************************************** * Private Functions @@ -106,9 +107,9 @@ void up_disable_irq(int cpuint) #ifdef CONFIG_SMP cpu = up_cpu_index(); - (void)xtensa_disable_cpuint(&g_intenable[cpu], (1ul << cpuint)) + (void)xtensa_disable_cpuint(&g_intenable[cpu], (1ul << cpuint)); #else - (void)xtensa_disable_cpuint(&g_intenable[0], (1ul << cpuint)) + (void)xtensa_disable_cpuint(&g_intenable[0], (1ul << cpuint)); #endif } @@ -130,9 +131,9 @@ void up_enable_irq(int cpuint) #ifdef CONFIG_SMP cpu = up_cpu_index(); - (void)xtensa_enable_cpuint(&g_intenable[cpu], (1ul << cpuint)) + (void)xtensa_enable_cpuint(&g_intenable[cpu], (1ul << cpuint)); #else - (void)xtensa_enable_cpuint(&g_intenable[0], (1ul << cpuint)) + (void)xtensa_enable_cpuint(&g_intenable[0], (1ul << cpuint)); #endif } diff --git a/arch/xtensa/src/esp32/esp32_intdecode.c b/arch/xtensa/src/esp32/esp32_intdecode.c index e316274f4b8..d75cf08914c 100644 --- a/arch/xtensa/src/esp32/esp32_intdecode.c +++ b/arch/xtensa/src/esp32/esp32_intdecode.c @@ -91,6 +91,7 @@ uint32_t *xtensa_int_decode(uint32_t *regs) int regndx; int bit; int baseirq; + int nirqs; #ifdef CONFIG_SMP int cpu; @@ -122,7 +123,7 @@ uint32_t *xtensa_int_decode(uint32_t *regs) /* Set up the search */ baseirq = g_baseirq[regndx]; - nirqs = g_nirqs[regndx] + nirqs = g_nirqs[regndx]; /* Decode and dispatch each pending bit in the interrupt status * register. diff --git a/arch/xtensa/src/esp32/esp32_timerisr.c b/arch/xtensa/src/esp32/esp32_timerisr.c index f809fb45d92..639934d535e 100644 --- a/arch/xtensa/src/esp32/esp32_timerisr.c +++ b/arch/xtensa/src/esp32/esp32_timerisr.c @@ -51,14 +51,6 @@ #include "xtensa_timer.h" #include "xtensa.h" -/**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ - -#if XT_TIMER_INTEN != ESP32_CPUINT_TIMER0 -# error Mismatch in irq.h and xtensa_timer.h -#endif - /**************************************************************************** * Private data ****************************************************************************/