From d54b066e8fff1f583f2a0516e9c232d45342793f Mon Sep 17 00:00:00 2001 From: liuhaitao Date: Wed, 4 Aug 2021 10:38:08 +0800 Subject: [PATCH] Revert "Revert "armv8-m: Fix EXC_RETURN for non-secure usage"" This reverts commit 48beda08e2fca24c74d832f31efe0a90c4450984. Signed-off-by: liuhaitao Change-Id: I5094d94ee64182b346fbcf6d7695b6259e3b006a --- arch/arm/src/armv8-m/exc_return.h | 77 +++++++++++++++++++++---------- 1 file changed, 52 insertions(+), 25 deletions(-) diff --git a/arch/arm/src/armv8-m/exc_return.h b/arch/arm/src/armv8-m/exc_return.h index c71cfb4a75c..3cfac7f66e1 100644 --- a/arch/arm/src/armv8-m/exc_return.h +++ b/arch/arm/src/armv8-m/exc_return.h @@ -35,66 +35,93 @@ * exception mechanism relies on this value to detect when the processor has * completed an exception handler. * - * Bits [31:28] of an EXC_RETURN value are always 1. When the processor loads a - * value matching this pattern to the PC it detects that the operation is a not - * a normal branch operation and instead, that the exception is complete. - * Therefore, it starts the exception return sequence. + * Bits [31:28] of an EXC_RETURN value are always 1. When the processor + * loads a value matching this pattern to the PC it detects that the + * operation is a not a normal branch operation and instead, that the + * exception is complete. Therefore, it starts the exception return sequence. * - * Bits[4:0] of the EXC_RETURN value indicate the required return stack and eventual - * processor mode. The remaining bits of the EXC_RETURN value should be set to 1. + * Bits[6:0] of the EXC_RETURN value indicate the required return stack and + * eventual processor mode. + * The remaining bits of the EXC_RETURN value should be set to 1. */ /* EXC_RETURN_BASE: Bits that are always set in an EXC_RETURN value. */ -#define EXC_RETURN_BASE 0xffffffe1 +#define EXC_RETURN_BASE 0xffffff80 -/* EXC_RETURN_PROCESS_STACK: The exception saved (and will restore) the hardware - * context using the process stack pointer (if not set, the context was saved - * using the main stack pointer) +/* EXC_RETURN_EXC_SECURE: Exception Secure. The security domain the + * exception was taken to. If this bit is clear non-secure, else secure. + */ + +#define EXC_RETURN_EXC_SECURE (1 << 0) + +/* EXC_RETURN_PROCESS_STACK: The exception saved (and will restore) the + * hardware context using the process stack pointer (if not set, the context + * was saved using the main stack pointer) */ #define EXC_RETURN_PROCESS_STACK (1 << 2) -/* EXC_RETURN_THREAD_MODE: The exception will return to thread mode (if not set, - * return stays in handler mode) +/* EXC_RETURN_THREAD_MODE: The exception will return to thread mode (if not + * set, return stays in handler mode) */ #define EXC_RETURN_THREAD_MODE (1 << 3) /* EXC_RETURN_STD_CONTEXT: The state saved on the stack does not include the - * volatile FP registers and FPSCR. If this bit is clear, the state does include - * these registers. + * volatile FP registers and FPSCR. If this bit is clear, the state does + * include these registers. */ #define EXC_RETURN_STD_CONTEXT (1 << 4) -/* EXC_RETURN_HANDLER: Return to handler mode. Exception return gets state from - * the main stack. Execution uses MSP after return. +/* EXC_RETURN_DEF_STACKING: Default callee register stacking (DCRS). + * Indicates whether the default stacking rules apply, or whether the callee + * registers are already on the stack. The possible values of this bit are: + * 0 - Stacking of the callee saved registers skipped. 1 - Default rules for + * stacking the callee registers followed. */ -#define EXC_RETURN_HANDLER 0xfffffff1 +#define EXC_RETURN_DEF_STACKING (1 << 5) -/* EXC_RETURN_PRIVTHR: Return to privileged thread mode. Exception return gets - * state from the main stack. Execution uses MSP after return. +/* EXC_RETURN_SECURE_STACK: Secure or Non-secure stack. Indicates whether a + * Secure or Non-secure stack is used to restore stack frame on exception + * return. The possible values of this bit are: 0 - Non-secure stack used. + * 1 - Secure stack used. + */ + +#define EXC_RETURN_SECURE_STACK (1 << 6) + +/* EXC_RETURN_HANDLER: Return to handler mode. Exception return gets state + * from the main stack. Execution uses MSP after return. + */ + +#define EXC_RETURN_HANDLER (EXC_RETURN_BASE | EXC_RETURN_DEF_STACKING | \ + EXC_RETURN_STD_CONTEXT) + +/* EXC_RETURN_PRIVTHR: Return to privileged thread mode. Exception return + * gets state from the main stack. Execution uses MSP after return. */ #if !defined(CONFIG_ARMV8M_LAZYFPU) && defined(CONFIG_ARCH_FPU) -# define EXC_RETURN_PRIVTHR (EXC_RETURN_BASE | EXC_RETURN_THREAD_MODE) +# define EXC_RETURN_PRIVTHR (EXC_RETURN_BASE | EXC_RETURN_THREAD_MODE | \ + EXC_RETURN_DEF_STACKING) #else # define EXC_RETURN_PRIVTHR (EXC_RETURN_BASE | EXC_RETURN_STD_CONTEXT | \ - EXC_RETURN_THREAD_MODE) + EXC_RETURN_THREAD_MODE | EXC_RETURN_DEF_STACKING) #endif -/* EXC_RETURN_UNPRIVTHR: Return to unprivileged thread mode. Exception return gets - * state from the process stack. Execution uses PSP after return. +/* EXC_RETURN_UNPRIVTHR: Return to unprivileged thread mode. Exception return + * gets state from the process stack. Execution uses PSP after return. */ #if !defined(CONFIG_ARMV8M_LAZYFPU) && defined(CONFIG_ARCH_FPU) # define EXC_RETURN_UNPRIVTHR (EXC_RETURN_BASE | EXC_RETURN_THREAD_MODE | \ - EXC_RETURN_PROCESS_STACK) + EXC_RETURN_PROCESS_STACK | EXC_RETURN_DEF_STACKING) #else # define EXC_RETURN_UNPRIVTHR (EXC_RETURN_BASE | EXC_RETURN_STD_CONTEXT | \ - EXC_RETURN_THREAD_MODE | EXC_RETURN_PROCESS_STACK) + EXC_RETURN_THREAD_MODE | EXC_RETURN_PROCESS_STACK | \ + EXC_RETURN_DEF_STACKING) #endif /****************************************************************************