diff --git a/arch/xtensa/Kconfig b/arch/xtensa/Kconfig index 3c1fcacb827..124cb96a994 100644 --- a/arch/xtensa/Kconfig +++ b/arch/xtensa/Kconfig @@ -45,9 +45,9 @@ config XTENSA_USE_OVLY Enable code overlay support. This option is currently unsupported. config XTENSA_CP_INITSET - bool "Default co-processor enables" - default 1 - range 0 65535 + hex "Default co-processor enables" + default 0x0001 + range 0 0xffff ---help--- Co-processors may be enabled on a thread by calling xtensa_coproc_enable() and disabled by calling xtensa_coproc_disable(). Some co-processors diff --git a/arch/xtensa/include/irq.h b/arch/xtensa/include/irq.h index 015bb16fe41..1ee9721e383 100644 --- a/arch/xtensa/include/irq.h +++ b/arch/xtensa/include/irq.h @@ -48,8 +48,11 @@ #include #include + #include +#include #include + #include #include #include diff --git a/arch/xtensa/include/xtensa/xtensa_coproc.h b/arch/xtensa/include/xtensa/xtensa_coproc.h index c744393cbb9..54794447034 100644 --- a/arch/xtensa/include/xtensa/xtensa_coproc.h +++ b/arch/xtensa/include/xtensa/xtensa_coproc.h @@ -38,7 +38,7 @@ * Included Files ****************************************************************************/ -#include +#include /**************************************************************************** * Pre-processor Definitions @@ -139,7 +139,11 @@ struct xtensa_cpstate_s uint16_t cpenable; /* (2 bytes) Co-processors active for this thread */ uint16_t cpstored; /* (2 bytes) Co-processors saved for this thread */ uint32_t *cpasa; /* (4 bytes) Pointer to aligned save area */ -} +}; + +/**************************************************************************** + * Inline Functions + ****************************************************************************/ /* Return the current value of the CPENABLE register */ diff --git a/arch/xtensa/src/common/xtensa.h b/arch/xtensa/src/common/xtensa.h index 6827428c11c..fb1ba85dd6a 100644 --- a/arch/xtensa/src/common/xtensa.h +++ b/arch/xtensa/src/common/xtensa.h @@ -46,6 +46,7 @@ #endif #include +#include /**************************************************************************** * Pre-processor Definitions @@ -259,6 +260,7 @@ int xtensa_context_save(uint32_t *regs); void xtensa_context_restore(uint32_t *regs) noreturn_function; #if XCHAL_CP_NUM > 0 +struct tcb_s; void xtensa_coproc_savestate(struct tcb_s *tcb); void xtensa_coproc_restorestate(struct tcb_s *tcb); #endif diff --git a/arch/xtensa/src/common/xtensa_context.S b/arch/xtensa/src/common/xtensa_context.S index 50cfda14db3..6d32fc92b33 100644 --- a/arch/xtensa/src/common/xtensa_context.S +++ b/arch/xtensa/src/common/xtensa_context.S @@ -62,6 +62,7 @@ #include #include +#include #include #warning REVIST XTENSA_EXTRA_SA_SIZE is not yet provided diff --git a/arch/xtensa/src/common/xtensa_coproc.S b/arch/xtensa/src/common/xtensa_coproc.S index 3ae4dea3d60..2445eaecf32 100644 --- a/arch/xtensa/src/common/xtensa_coproc.S +++ b/arch/xtensa/src/common/xtensa_coproc.S @@ -39,10 +39,12 @@ #include -#include -#include +#include #include #include +#include +#include +#include #if XCHAL_CP_NUM > 0 @@ -120,7 +122,7 @@ _xtensa_coproc_savestate: movi a13, _xtensa_coproc_saoffsets /* Array of CP save offsets */ l32i a15, a15, XTENSA_CPASA /* a15 = base of aligned save area */ -#if XTENSA_CP0_SA_SIZE > 0 +#if XCHAL_CP0_SA_SIZE > 0 bbci.l a2, 0, 2f /* CP 0 not enabled */ l32i a14, a13, 0 /* a14 = _xtensa_coproc_saoffsets[0] */ add a3, a14, a15 /* a3 = save area for CP 0 */ @@ -128,7 +130,7 @@ _xtensa_coproc_savestate: 2: #endif -#if XTENSA_CP1_SA_SIZE > 0 +#if XCHAL_CP1_SA_SIZE > 0 bbci.l a2, 1, 2f /* CP 1 not enabled */ l32i a14, a13, 4 /* a14 = _xtensa_coproc_saoffsets[1] */ add a3, a14, a15 /* a3 = save area for CP 1 */ @@ -136,7 +138,7 @@ _xtensa_coproc_savestate: 2: #endif -#if XTENSA_CP2_SA_SIZE > 0 +#if XCHAL_CP2_SA_SIZE > 0 bbci.l a2, 2, 2f l32i a14, a13, 8 add a3, a14, a15 @@ -144,7 +146,7 @@ _xtensa_coproc_savestate: 2: #endif -#if XTENSA_CP3_SA_SIZE > 0 +#if XCHAL_CP3_SA_SIZE > 0 bbci.l a2, 3, 2f l32i a14, a13, 12 add a3, a14, a15 @@ -152,7 +154,7 @@ _xtensa_coproc_savestate: 2: #endif -#if XTENSA_CP4_SA_SIZE > 0 +#if XCHAL_CP4_SA_SIZE > 0 bbci.l a2, 4, 2f l32i a14, a13, 16 add a3, a14, a15 @@ -160,7 +162,7 @@ _xtensa_coproc_savestate: 2: #endif -#if XTENSA_CP5_SA_SIZE > 0 +#if XCHAL_CP5_SA_SIZE > 0 bbci.l a2, 5, 2f l32i a14, a13, 20 add a3, a14, a15 @@ -168,7 +170,7 @@ _xtensa_coproc_savestate: 2: #endif -#if XTENSA_CP6_SA_SIZE > 0 +#if XCHAL_CP6_SA_SIZE > 0 bbci.l a2, 6, 2f l32i a14, a13, 24 add a3, a14, a15 @@ -176,7 +178,7 @@ _xtensa_coproc_savestate: 2: #endif -#if XTENSA_CP7_SA_SIZE > 0 +#if XCHAL_CP7_SA_SIZE > 0 bbci.l a2, 7, 2f l32i a14, a13, 28 add a3, a14, a15 @@ -236,7 +238,7 @@ _xtensa_coproc_restorestate: movi a13, _xtensa_coproc_saoffsets /* Array of CP save offsets */ l32i a15, a15, XTENSA_CPASA /* a15 = base of aligned save area */ -#if XTENSA_CP0_SA_SIZE +#if XCHAL_CP0_SA_SIZE bbci.l a2, 0, 2f /* CP 0 not enabled */ l32i a14, a13, 0 /* a14 = _xtensa_coproc_saoffsets[0] */ add a3, a14, a15 /* a3 = save area for CP 0 */ @@ -244,7 +246,7 @@ _xtensa_coproc_restorestate: 2: #endif -#if XTENSA_CP1_SA_SIZE +#if XCHAL_CP1_SA_SIZE bbci.l a2, 1, 2f /* CP 1 not enabled */ l32i a14, a13, 4 /* a14 = _xtensa_coproc_saoffsets[1] */ add a3, a14, a15 /* a3 = save area for CP 1 */ @@ -252,7 +254,7 @@ _xtensa_coproc_restorestate: 2: #endif -#if XTENSA_CP2_SA_SIZE +#if XCHAL_CP2_SA_SIZE bbci.l a2, 2, 2f l32i a14, a13, 8 add a3, a14, a15 @@ -260,7 +262,7 @@ _xtensa_coproc_restorestate: 2: #endif -#if XTENSA_CP3_SA_SIZE +#if XCHAL_CP3_SA_SIZE bbci.l a2, 3, 2f l32i a14, a13, 12 add a3, a14, a15 @@ -268,7 +270,7 @@ _xtensa_coproc_restorestate: 2: #endif -#if XTENSA_CP4_SA_SIZE +#if XCHAL_CP4_SA_SIZE bbci.l a2, 4, 2f l32i a14, a13, 16 add a3, a14, a15 @@ -276,7 +278,7 @@ _xtensa_coproc_restorestate: 2: #endif -#if XTENSA_CP5_SA_SIZE +#if XCHAL_CP5_SA_SIZE bbci.l a2, 5, 2f l32i a14, a13, 20 add a3, a14, a15 @@ -284,7 +286,7 @@ _xtensa_coproc_restorestate: 2: #endif -#if XTENSA_CP6_SA_SIZE +#if XCHAL_CP6_SA_SIZE bbci.l a2, 6, 2f l32i a14, a13, 24 add a3, a14, a15 @@ -292,7 +294,7 @@ _xtensa_coproc_restorestate: 2: #endif -#if XTENSA_CP7_SA_SIZE +#if XCHAL_CP7_SA_SIZE bbci.l a2, 7, 2f l32i a14, a13, 28 add a3, a14, a15 diff --git a/arch/xtensa/src/common/xtensa_cpsave.c b/arch/xtensa/src/common/xtensa_cpsave.c index 7a128c6aa10..bd4a50ffdf9 100644 --- a/arch/xtensa/src/common/xtensa_cpsave.c +++ b/arch/xtensa/src/common/xtensa_cpsave.c @@ -40,6 +40,8 @@ #include #include +#include + #include #include @@ -81,16 +83,16 @@ void xtensa_coproc_savestate(struct tcb_s *tcb) { - uint32_t cpsave = (uint32_t)((uintptr_t)&tcp->xcp.cpsave); + uint32_t cpstate = (uint32_t)((uintptr_t)&tcb->xcp.cpstate); __asm__ __volatile__ ( "mov a2, %0\n" "call0 _xtensa_coproc_savestate\n" : - : "r" (cpsave) + : "r" (cpstate) : "a0", "a2", "a3", "a4", "a5", "a6", "a7", "a13", "a14", "a15" - ) + ); } /**************************************************************************** @@ -122,17 +124,16 @@ void xtensa_coproc_savestate(struct tcb_s *tcb) void xtensa_coproc_restorestate(struct tcb_s *tcb) { - uint32_t cpsave = (uint32_t)((uintptr_t)&tcp->xcp.cpsave); + uint32_t cpstate = (uint32_t)((uintptr_t)&tcb->xcp.cpstate); __asm__ __volatile__ ( "mov a2, %0\n" - "mov a3, %1\n" "call0 _xtensa_coproc_restorestate\n" : - : "r" (cpmask) "r" (cpsave) + : "r" (cpstate) : "a0", "a2", "a3", "a4", "a5", "a6", "a7", "a13", "a14", "a15" - ) + ); } /**************************************************************************** @@ -177,13 +178,13 @@ void xtensa_coproc_enable(struct xtensa_cpstate_s *cpstate, int cpset) cpenable = xtensa_get_cpenable(); cpenable |= cpset; - xtensa_put_cpenable(cpenable); + xtensa_set_cpenable(cpenable); cpstate->cpenable = cpenable; - cpsates->cpstored &= ~cpset; + cpstate->cpstored &= ~cpset; } - leave_critical_section(); + leave_critical_section(flags); } /**************************************************************************** @@ -228,13 +229,13 @@ void xtensa_coproc_disable(struct xtensa_cpstate_s *cpstate, int cpset) cpenable = xtensa_get_cpenable(); cpenable &= ~cpset; - xtensa_put_cpenable(cpenable); + xtensa_set_cpenable(cpenable); cpstate->cpenable = cpenable; - cpsates->cpstored &= ~cpset; + cpstate->cpstored &= ~cpset; } - leave_critical_section(); + leave_critical_section(flags); } diff --git a/arch/xtensa/src/common/xtensa_createstack.c b/arch/xtensa/src/common/xtensa_createstack.c index 000f0dd9906..c25d64cfa49 100644 --- a/arch/xtensa/src/common/xtensa_createstack.c +++ b/arch/xtensa/src/common/xtensa_createstack.c @@ -49,6 +49,7 @@ #include #include +#include #include #include "xtensa.h" @@ -115,9 +116,8 @@ int up_create_stack(FAR struct tcb_s *tcb, size_t stack_size, uint8_t ttype) { #if XCHAL_CP_NUM > 0 + struct xcptcontext *xcp; uintptr_t cpstart; - uintptr_t cpend; - size_t cpsize; #endif /* Is there already a stack allocated of a different size? Because of @@ -208,11 +208,13 @@ int up_create_stack(FAR struct tcb_s *tcb, size_t stack_size, uint8_t ttype) * memory rather than using the stack. */ - cpstart = (uintptr_t)_CP_ALIGNDOWN(top_of_stack - XCHAL_CP1_SA_ALIGN); + cpstart = (uintptr_t)_CP_ALIGNDOWN(XCHAL_CP0_SA_ALIGN, + top_of_stack - XCHAL_CP1_SA_ALIGN); top_of_stack = cpstart; /* Initialize the coprocessor save area (see xtensa_coproc.h) */ + xcp = &tcb->xcp; xcp->cpstate.cpenable = 0; /* No coprocessors active for this thread */ xcp->cpstate.cpstored = 0; /* No coprocessors saved for this thread */ xcp->cpstate.cpasa = (uint32_t *)cpstart; /* Start of aligned save area */ diff --git a/arch/xtensa/src/common/xtensa_initialstate.c b/arch/xtensa/src/common/xtensa_initialstate.c index 8fc10a6d03c..d2b0744460d 100644 --- a/arch/xtensa/src/common/xtensa_initialstate.c +++ b/arch/xtensa/src/common/xtensa_initialstate.c @@ -48,6 +48,7 @@ #include #include #include +#include #include "xtensa.h" @@ -100,7 +101,7 @@ void up_initial_state(struct tcb_s *tcb) * starts (see xtensa_coproc.h) */ - xcp->cpstate.cpenable = CONFIG_XTENSA_CP_INITSET; + xcp->cpstate.cpenable = (CONFIG_XTENSA_CP_INITSET & XTENSA_CP_ALLSET); xcp->cpstate.cpstored = 0; /* No coprocessors haved statee saved for this thread */ #endif } diff --git a/arch/xtensa/src/common/xtensa_irqdispatch.c b/arch/xtensa/src/common/xtensa_irqdispatch.c index d509f83e423..67192e0634f 100644 --- a/arch/xtensa/src/common/xtensa_irqdispatch.c +++ b/arch/xtensa/src/common/xtensa_irqdispatch.c @@ -51,6 +51,7 @@ #include "xtensa.h" #include "group/group.h" +#include "sched/sched.h" /**************************************************************************** * Public Functions diff --git a/arch/xtensa/src/esp32/esp32_intdecode.c b/arch/xtensa/src/esp32/esp32_intdecode.c index d75cf08914c..675c5327e66 100644 --- a/arch/xtensa/src/esp32/esp32_intdecode.c +++ b/arch/xtensa/src/esp32/esp32_intdecode.c @@ -39,6 +39,7 @@ #include +#include #include #include "chip/esp32_dport.h" diff --git a/configs/esp32-core/nsh/defconfig b/configs/esp32-core/nsh/defconfig index 4d8658e0e3c..b1630532335 100644 --- a/configs/esp32-core/nsh/defconfig +++ b/configs/esp32-core/nsh/defconfig @@ -77,6 +77,7 @@ CONFIG_ARCH_CHIP_ESP32=y CONFIG_ARCH_FAMILY_LX6=y CONFIG_XTENSA_CALL0_ABI=y # CONFIG_XTENSA_USE_OVLY is not set +CONFIG_XTENSA_CP_INITSET=0x0001 CONFIG_ESP32_UART=y # CONFIG_ESP32_SPI2 is not set # CONFIG_XTENSA_TIMER1 is not set