diff --git a/Documentation/platforms/risc-v/esp32c3/boards/esp32c3-generic/index.rst b/Documentation/platforms/risc-v/esp32c3/boards/esp32c3-generic/index.rst index d5fa696ac53..8e288070aca 100644 --- a/Documentation/platforms/risc-v/esp32c3/boards/esp32c3-generic/index.rst +++ b/Documentation/platforms/risc-v/esp32c3/boards/esp32c3-generic/index.rst @@ -163,6 +163,24 @@ disables the NuttShell to get the best possible score. .. note:: As the NSH is disabled, the application will start as soon as the system is turned on. +crypto +------ + +This configuration enables support for the cryptographic hardware and +the ``/dev/crypto`` device file. Currently, we are supporting SHA-1, +SHA-224 and SHA-256 algorithms using hardware. +To test hardware acceleration, you can use `hmac` example and following output +should look like this:: + + nsh> hmac + ... + hmac sha1 success + hmac sha1 success + hmac sha1 success + hmac sha256 success + hmac sha256 success + hmac sha256 success + efuse ----- diff --git a/Documentation/platforms/risc-v/esp32c3/index.rst b/Documentation/platforms/risc-v/esp32c3/index.rst index 054e78ae94a..208996149a7 100644 --- a/Documentation/platforms/risc-v/esp32c3/index.rst +++ b/Documentation/platforms/risc-v/esp32c3/index.rst @@ -365,7 +365,7 @@ RMT Yes RNG Yes RSA No RTC Yes -SHA No +SHA Yes SPI Yes SPIFLASH Yes SPIRAM No diff --git a/Documentation/platforms/risc-v/esp32c6/boards/esp32c6-devkitc/index.rst b/Documentation/platforms/risc-v/esp32c6/boards/esp32c6-devkitc/index.rst index 98479fa4fe1..9fea2b33707 100644 --- a/Documentation/platforms/risc-v/esp32c6/boards/esp32c6-devkitc/index.rst +++ b/Documentation/platforms/risc-v/esp32c6/boards/esp32c6-devkitc/index.rst @@ -146,6 +146,24 @@ disables the NuttShell to get the best possible score. .. note:: As the NSH is disabled, the application will start as soon as the system is turned on. +crypto +------ + +This configuration enables support for the cryptographic hardware and +the ``/dev/crypto`` device file. Currently, we are supporting SHA-1, +SHA-224 and SHA-256 algorithms using hardware. +To test hardware acceleration, you can use `hmac` example and following output +should look like this:: + + nsh> hmac + ... + hmac sha1 success + hmac sha1 success + hmac sha1 success + hmac sha256 success + hmac sha256 success + hmac sha256 success + efuse ----- diff --git a/Documentation/platforms/risc-v/esp32c6/index.rst b/Documentation/platforms/risc-v/esp32c6/index.rst index f130f907332..2403f8ef0a6 100644 --- a/Documentation/platforms/risc-v/esp32c6/index.rst +++ b/Documentation/platforms/risc-v/esp32c6/index.rst @@ -356,7 +356,7 @@ RNG Yes RSA No RTC Yes SDIO No -SHA No +SHA Yes SPI Yes SPIFLASH Yes SPIRAM No diff --git a/Documentation/platforms/risc-v/esp32h2/boards/esp32h2-devkit/index.rst b/Documentation/platforms/risc-v/esp32h2/boards/esp32h2-devkit/index.rst index 12910ad40bf..59fa74bc53d 100644 --- a/Documentation/platforms/risc-v/esp32h2/boards/esp32h2-devkit/index.rst +++ b/Documentation/platforms/risc-v/esp32h2/boards/esp32h2-devkit/index.rst @@ -129,6 +129,24 @@ disables the NuttShell to get the best possible score. .. note:: As the NSH is disabled, the application will start as soon as the system is turned on. +crypto +------ + +This configuration enables support for the cryptographic hardware and +the ``/dev/crypto`` device file. Currently, we are supporting SHA-1, +SHA-224 and SHA-256 algorithms using hardware. +To test hardware acceleration, you can use `hmac` example and following output +should look like this:: + + nsh> hmac + ... + hmac sha1 success + hmac sha1 success + hmac sha1 success + hmac sha256 success + hmac sha256 success + hmac sha256 success + efuse ----- diff --git a/Documentation/platforms/risc-v/esp32h2/index.rst b/Documentation/platforms/risc-v/esp32h2/index.rst index e44a0f7b28f..91695f6d651 100644 --- a/Documentation/platforms/risc-v/esp32h2/index.rst +++ b/Documentation/platforms/risc-v/esp32h2/index.rst @@ -357,7 +357,7 @@ RMT Yes RNG Yes RSA No RTC Yes -SHA No +SHA Yes SPI Yes SPIFLASH Yes SPIRAM No