diff --git a/arch/arm/src/max326xx/chip/max32660_flc.h b/arch/arm/src/max326xx/chip/max32660_flc.h index 4bacf8e3d85..c4a6e822a39 100644 --- a/arch/arm/src/max326xx/chip/max32660_flc.h +++ b/arch/arm/src/max326xx/chip/max32660_flc.h @@ -1,5 +1,5 @@ /************************************************************************************ - * arch/arm/src/max326xx/chip/max326_flc.h + * arch/arm/src/max326xx/chip/max32660_flc.h * * Copyright (C) 2018 Gregory Nutt. All rights reserved. * Author: Gregory Nutt @@ -33,8 +33,8 @@ * ************************************************************************************/ -#ifndef __ARCH_ARM_SRC_MAX326XX_CHIP_MAX326_FLC_H -#define __ARCH_ARM_SRC_MAX326XX_CHIP_MAX326_FLC_H +#ifndef __ARCH_ARM_SRC_MAX326XX_CHIP_MAX32660_FLC_H +#define __ARCH_ARM_SRC_MAX326XX_CHIP_MAX32660_FLC_H /************************************************************************************ * Included Files @@ -111,4 +111,4 @@ /* Flash Controller Data Register 2 (32-bit FLASH data) */ /* Flash Controller Data Register 3 (32-bit FLASH data) */ -#endif /* __ARCH_ARM_SRC_MAX326XX_CHIP_MAX326_FLC_H */ +#endif /* __ARCH_ARM_SRC_MAX326XX_CHIP_MAX32660_FLC_H */ diff --git a/arch/arm/src/max326xx/chip/max32660_gpio.h b/arch/arm/src/max326xx/chip/max32660_gpio.h index d84dbfb7e5e..8fd6b945d04 100644 --- a/arch/arm/src/max326xx/chip/max32660_gpio.h +++ b/arch/arm/src/max326xx/chip/max32660_gpio.h @@ -1,5 +1,5 @@ /************************************************************************************ - * arch/arm/src/max326xx/chip/max326_gpio.h + * arch/arm/src/max326xx/chip/max32660_gpio.h * * Copyright (C) 2018 Gregory Nutt. All rights reserved. * Author: Gregory Nutt @@ -33,8 +33,8 @@ * ************************************************************************************/ -#ifndef __ARCH_ARM_SRC_MAX326XX_CHIP_MAX326_GPIO_H -#define __ARCH_ARM_SRC_MAX326XX_CHIP_MAX326_GPIO_H +#ifndef __ARCH_ARM_SRC_MAX326XX_CHIP_MAX32660_GPIO_H +#define __ARCH_ARM_SRC_MAX326XX_CHIP_MAX32660_GPIO_H /************************************************************************************ * Included Files @@ -181,4 +181,4 @@ * Resistor Select: * n=0-1, 4-7, 10-13: Pullup select */ -#endif /* __ARCH_ARM_SRC_MAX326XX_CHIP_MAX326_GPIO_H */ +#endif /* __ARCH_ARM_SRC_MAX326XX_CHIP_MAX32660_GPIO_H */ diff --git a/arch/arm/src/max326xx/chip/max32660_i2c.h b/arch/arm/src/max326xx/chip/max32660_i2c.h index 2da782b7700..7daa9f046ab 100644 --- a/arch/arm/src/max326xx/chip/max32660_i2c.h +++ b/arch/arm/src/max326xx/chip/max32660_i2c.h @@ -1,5 +1,5 @@ /************************************************************************************ - * arch/arm/src/max326xx/chip/max326_i2c.h + * arch/arm/src/max326xx/chip/max32660_i2c.h * * Copyright (C) 2018 Gregory Nutt. All rights reserved. * Author: Gregory Nutt @@ -33,8 +33,8 @@ * ************************************************************************************/ -#ifndef __ARCH_ARM_SRC_MAX326XX_CHIP_MAX326_I2C_H -#define __ARCH_ARM_SRC_MAX326XX_CHIP_MAX326_I2C_H +#ifndef __ARCH_ARM_SRC_MAX326XX_CHIP_MAX32660_I2C_H +#define __ARCH_ARM_SRC_MAX326XX_CHIP_MAX32660_I2C_H /************************************************************************************ * Included Files @@ -298,4 +298,4 @@ #define I2C_DMA_TXEN (1 << 0) /* Bit 0: TX DMA Channel Enable */ #define I2C_DMA_RXEN (1 << 1) /* Bit 1: RX DMA Channel Enable */ -#endif /* __ARCH_ARM_SRC_MAX326XX_CHIP_MAX326_I2C_H */ +#endif /* __ARCH_ARM_SRC_MAX326XX_CHIP_MAX32660_I2C_H */ diff --git a/arch/arm/src/max326xx/chip/max32660_pinmux.h b/arch/arm/src/max326xx/chip/max32660_pinmux.h new file mode 100644 index 00000000000..bbf4e42930c --- /dev/null +++ b/arch/arm/src/max326xx/chip/max32660_pinmux.h @@ -0,0 +1,134 @@ +/************************************************************************************ + * arch/arm/src/max326xx/chip/max32660_pinmux.h + * + * Copyright (C) 2018 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __ARCH_ARM_SRC_MAX326XX_CHIP_MAX32660_PINMUX_H +#define __ARCH_ARM_SRC_MAX326XX_CHIP_MAX32660_PINMUX_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Alternate Pin Functions. + * + * Alternative pin selections are provided with a numeric suffix like _1, _2, etc. + * Drivers, however, will use the pin selection without the numeric suffix. + * Additional definitions are required in the board.h file. For example, if + * UART1 RX connects vis P0.7 on some board, then the following definition should + * appear in the board.h header file for that board: + * + * #define GPIO_UART1_RX GPIO_UART1_RX_2 + * + * The driver will then automatically configure P0.7 as the UART1 RX pin. + */ + +/* WARNING!!! WARNING!!! WARNING!!! WARNING!!! WARNING!!! WARNING!!! WARNING!!! + * Additional effort is required to select specific GPIO options such as frequency, + * open-drain/push-pull, and pull-up/down! Just the basics are defined for most + * pins in this file. + */ + +/* 32KHz Clock Output */ + +#define GPIO_32KCAL (GPIO_ALT3 | GPIO_PORT0 | GPIO_PIN2) + +/* I2C */ + +#define GPIO_I2C0_SCL (GPIO_ALT1 | GPIO_PORT0 | GPIO_PIN8) +#define GPIO_I2C0_SDA (GPIO_ALT1 | GPIO_PORT0 | GPIO_PIN9) + +#define GPIO_I2C1_SCL (GPIO_ALT1 | GPIO_PORT0 | GPIO_PIN2) +#define GPIO_I2C1_SDA (GPIO_ALT1 | GPIO_PORT0 | GPIO_PIN3) + +/* SPIMMS/I2S */ + +#define GPIO_I2S_BCLK_1 (GPIO_ALT2 | GPIO_PORT0 | GPIO_PIN2) +#define GPIO_I2S_BCLK_2 (GPIO_ALT1 | GPIO_PORT0 | GPIO_PIN12) /* 20-TQFN only */ +#define GPIO_I2S_LRCLK_1 (GPIO_ALT2 | GPIO_PORT0 | GPIO_PIN3) +#define GPIO_I2S_LRCLK_2 (GPIO_ALT1 | GPIO_PORT0 | GPIO_PIN13) /* 20-TQFN only */ +#define GPIO_I2S_SDI_1 (GPIO_ALT1 | GPIO_PORT0 | GPIO_PIN0) +#define GPIO_I2S_SDI_2 (GPIO_ALT1 | GPIO_PORT0 | GPIO_PIN10) /* 20-TQFN only */ +#define GPIO_I2S_SDO_1 (GPIO_ALT2 | GPIO_PORT0 | GPIO_PIN1) +#define GPIO_I2S_SDO_2 (GPIO_ALT1 | GPIO_PORT0 | GPIO_PIN11) /* 20-TQFN only */ + +/* SPI */ + +#define GPIO_SPI0_MISO (GPIO_ALT1 | GPIO_PORT0 | GPIO_PIN4) +#define GPIO_SPI0_MOSI (GPIO_ALT1 | GPIO_PORT0 | GPIO_PIN5) +#define GPIO_SPI0_SCK (GPIO_ALT1 | GPIO_PORT0 | GPIO_PIN6) +#define GPIO_SPI0_SS0 (GPIO_ALT1 | GPIO_PORT0 | GPIO_PIN7) + +#define GPIO_SPI1_MISO_1 (GPIO_ALT2 | GPIO_PORT0 | GPIO_PIN0) +#define GPIO_SPI1_MISO_2 (GPIO_ALT1 | GPIO_PORT0 | GPIO_PIN10) /* 20-TQFN only */ +#define GPIO_SPI1_MOSI_1 (GPIO_ALT2 | GPIO_PORT0 | GPIO_PIN1) +#define GPIO_SPI1_MOSI_2 (GPIO_ALT1 | GPIO_PORT0 | GPIO_PIN11) /* 20-TQFN only */ +#define GPIO_SPI1_SCK_1 (GPIO_ALT2 | GPIO_PORT0 | GPIO_PIN2) +#define GPIO_SPI1_SCK_2 (GPIO_ALT1 | GPIO_PORT0 | GPIO_PIN12) /* 20-TQFN only */ +#define GPIO_SPI1_SS0_1 (GPIO_ALT2 | GPIO_PORT0 | GPIO_PIN3) +#define GPIO_SPI1_SS0_2 (GPIO_ALT1 | GPIO_PORT0 | GPIO_PIN13) /* 20-TQFN only */ + +/* JTAG/SWD */ + +#define GPIO_SWDCLK_1 (GPIO_ALT1 | GPIO_PORT0 | GPIO_PIN1) +#define GPIO_SWDCLK_2 (GPIO_ALT2 | GPIO_PORT0 | GPIO_PIN9) +#define GPIO_SWDIO_1 (GPIO_ALT1 | GPIO_PORT0 | GPIO_PIN0) +#define GPIO_SWDIO_2 (GPIO_ALT2 | GPIO_PORT0 | GPIO_PIN8) + +/* Timer */ + +#define GPIO_TMR0 (GPIO_ALT3 | GPIO_PORT0 | GPIO_PIN3) + +/* UARTs */ + +#define GPIO_UART0_CTS (GPIO_ALT2 | GPIO_PORT0 | GPIO_PIN6) +#define GPIO_UART0_RTS (GPIO_ALT2 | GPIO_PORT0 | GPIO_PIN7) +#define GPIO_UART0_RX (GPIO_ALT2 | GPIO_PORT0 | GPIO_PIN5) +#define GPIO_UART0_TX (GPIO_ALT2 | GPIO_PORT0 | GPIO_PIN4) + +#define GPIO_UART1_CTS (GPIO_ALT2 | GPIO_PORT0 | GPIO_PIN12) /* 20-TQFN only */ +#define GPIO_UART1_RTS (GPIO_ALT2 | GPIO_PORT0 | GPIO_PIN13) /* 20-TQFN only */ +#define GPIO_UART1_RX_1 (GPIO_ALT3 | GPIO_PORT0 | GPIO_PIN1) +#define GPIO_UART1_RX_2 (GPIO_ALT3 | GPIO_PORT0 | GPIO_PIN7) +#define GPIO_UART1_RX_3 (GPIO_ALT2 | GPIO_PORT0 | GPIO_PIN11) /* 20-TQFN only */ +#define GPIO_UART1_TX_1 (GPIO_ALT3 | GPIO_PORT0 | GPIO_PIN0) +#define GPIO_UART1_TX_2 (GPIO_ALT3 | GPIO_PORT0 | GPIO_PIN6) +#define GPIO_UART1_TX_3 (GPIO_ALT2 | GPIO_PORT0 | GPIO_PIN10) /* 20-TQFN only */ + +#endif /* __ARCH_ARM_SRC_MAX326XX_CHIP_MAX32660_PINMUX_H */ diff --git a/arch/arm/src/max326xx/chip/max32660_rtc.h b/arch/arm/src/max326xx/chip/max32660_rtc.h index c4643066293..90e866ee7a8 100644 --- a/arch/arm/src/max326xx/chip/max32660_rtc.h +++ b/arch/arm/src/max326xx/chip/max32660_rtc.h @@ -1,5 +1,5 @@ /************************************************************************************ - * arch/arm/src/max326xx/chip/max326_rtc.h + * arch/arm/src/max326xx/chip/max32660_rtc.h * * Copyright (C) 2018 Gregory Nutt. All rights reserved. * Author: Gregory Nutt @@ -33,8 +33,8 @@ * ************************************************************************************/ -#ifndef __ARCH_ARM_SRC_MAX326XX_CHIP_MAX326_RTC_H -#define __ARCH_ARM_SRC_MAX326XX_CHIP_MAX326_RTC_H +#ifndef __ARCH_ARM_SRC_MAX326XX_CHIP_MAX32660_RTC_H +#define __ARCH_ARM_SRC_MAX326XX_CHIP_MAX32660_RTC_H /************************************************************************************ * Included Files @@ -124,4 +124,4 @@ #define RTC_OSCCTRL_BYPASS (1 << 4) /* Bit 4: RTC Crystal Bypass */ #define RTC_OSCCTRL_32KOUT (1 << 5) /* Bit 5: RTC Square Wave Output */ -#endif /* __ARCH_ARM_SRC_MAX326XX_CHIP_MAX326_RTC_H */ +#endif /* __ARCH_ARM_SRC_MAX326XX_CHIP_MAX32660_RTC_H */ diff --git a/arch/arm/src/max326xx/chip/max32660_spi.h b/arch/arm/src/max326xx/chip/max32660_spi.h index d5b8caed85c..2127d29b682 100644 --- a/arch/arm/src/max326xx/chip/max32660_spi.h +++ b/arch/arm/src/max326xx/chip/max32660_spi.h @@ -1,5 +1,5 @@ /************************************************************************************ - * arch/arm/src/max326xx/chip/max326_spi.h + * arch/arm/src/max326xx/chip/max32660_spi.h * * Copyright (C) 2018 Gregory Nutt. All rights reserved. * Author: Gregory Nutt @@ -33,8 +33,8 @@ * ************************************************************************************/ -#ifndef __ARCH_ARM_SRC_MAX326XX_CHIP_MAX326_SPI_H -#define __ARCH_ARM_SRC_MAX326XX_CHIP_MAX326_SPI_H +#ifndef __ARCH_ARM_SRC_MAX326XX_CHIP_MAX32660_SPI_H +#define __ARCH_ARM_SRC_MAX326XX_CHIP_MAX32660_SPI_H /************************************************************************************ * Included Files @@ -195,4 +195,4 @@ #define SPI_STAT_BUSY (1 << 0) /* Bit 0: SPI Active Status */ -#endif /* __ARCH_ARM_SRC_MAX326XX_CHIP_MAX326_SPI_H */ +#endif /* __ARCH_ARM_SRC_MAX326XX_CHIP_MAX32660_SPI_H */ diff --git a/arch/arm/src/max326xx/chip/max32660_spimss.h b/arch/arm/src/max326xx/chip/max32660_spimss.h index 3cbf92983f8..4b6d2f63a62 100644 --- a/arch/arm/src/max326xx/chip/max32660_spimss.h +++ b/arch/arm/src/max326xx/chip/max32660_spimss.h @@ -1,5 +1,5 @@ /************************************************************************************ - * arch/arm/src/max326xx/chip/max326_spimss.h + * arch/arm/src/max326xx/chip/max32660_spimss.h * * Copyright (C) 2018 Gregory Nutt. All rights reserved. * Author: Gregory Nutt @@ -33,8 +33,8 @@ * ************************************************************************************/ -#ifndef __ARCH_ARM_SRC_MAX326XX_CHIP_MAX326_SPIMSS_H -#define __ARCH_ARM_SRC_MAX326XX_CHIP_MAX326_SPIMSS_H +#ifndef __ARCH_ARM_SRC_MAX326XX_CHIP_MAX32660_SPIMSS_H +#define __ARCH_ARM_SRC_MAX326XX_CHIP_MAX32660_SPIMSS_H /************************************************************************************ * Included Files @@ -138,4 +138,4 @@ #define SPIMSS_I2SCTRL_I2SMONO (1 << 3) /* Bit 3: I2S Monophonic Audio Mode */ #define SPIMSS_I2SCTRL_I2SLJ (1 << 4) /* Bit 4: I2S Left Justify */ -#endif /* __ARCH_ARM_SRC_MAX326XX_CHIP_MAX326_SPIMSS_H */ +#endif /* __ARCH_ARM_SRC_MAX326XX_CHIP_MAX32660_SPIMSS_H */ diff --git a/arch/arm/src/max326xx/chip/max32660_tmr.h b/arch/arm/src/max326xx/chip/max32660_tmr.h index 4cb326e09ab..4d99e6eb859 100644 --- a/arch/arm/src/max326xx/chip/max32660_tmr.h +++ b/arch/arm/src/max326xx/chip/max32660_tmr.h @@ -1,5 +1,5 @@ /************************************************************************************ - * arch/arm/src/max326xx/chip/max326_tmr.h + * arch/arm/src/max326xx/chip/max32660_tmr.h * * Copyright (C) 2018 Gregory Nutt. All rights reserved. * Author: Gregory Nutt @@ -33,8 +33,8 @@ * ************************************************************************************/ -#ifndef __ARCH_ARM_SRC_MAX326XX_CHIP_MAX326_TMR_H -#define __ARCH_ARM_SRC_MAX326XX_CHIP_MAX326_TMR_H +#ifndef __ARCH_ARM_SRC_MAX326XX_CHIP_MAX32660_TMR_H +#define __ARCH_ARM_SRC_MAX326XX_CHIP_MAX32660_TMR_H /************************************************************************************ * Included Files @@ -127,4 +127,4 @@ #define TMR_CN_NOLLPOL (1 << 11) /* Bit 11: PWM Output phase A' Polarity */ #define TMR_CN_PWMCKBD (1 << 12) /* Bit 12: PWM Output phase A' Disable */ -#endif /* __ARCH_ARM_SRC_MAX326XX_CHIP_MAX326_TMR_H */ +#endif /* __ARCH_ARM_SRC_MAX326XX_CHIP_MAX32660_TMR_H */ diff --git a/arch/arm/src/max326xx/chip/max32660_uart.h b/arch/arm/src/max326xx/chip/max32660_uart.h index 186db8373e7..4c499242459 100644 --- a/arch/arm/src/max326xx/chip/max32660_uart.h +++ b/arch/arm/src/max326xx/chip/max32660_uart.h @@ -1,5 +1,5 @@ /************************************************************************************ - * arch/arm/src/max326xx/chip/max326_uart.h + * arch/arm/src/max326xx/chip/max32660_uart.h * * Copyright (C) 2018 Gregory Nutt. All rights reserved. * Author: Gregory Nutt @@ -33,8 +33,8 @@ * ************************************************************************************/ -#ifndef __ARCH_ARM_SRC_MAX326XX_CHIP_MAX326_UART_H -#define __ARCH_ARM_SRC_MAX326XX_CHIP_MAX326_UART_H +#ifndef __ARCH_ARM_SRC_MAX326XX_CHIP_MAX32660_UART_H +#define __ARCH_ARM_SRC_MAX326XX_CHIP_MAX32660_UART_H /************************************************************************************ * Included Files @@ -193,4 +193,4 @@ #define UART_TXFIFO_MASK (0xff) /* Bits 0-7: TX FIFO Data Output Peek Register */ -#endif /* __ARCH_ARM_SRC_MAX326XX_CHIP_MAX326_UART_H */ +#endif /* __ARCH_ARM_SRC_MAX326XX_CHIP_MAX32660_UART_H */ diff --git a/arch/arm/src/max326xx/chip/max32660_wdt.h b/arch/arm/src/max326xx/chip/max32660_wdt.h index 494e8997cac..a705556323e 100644 --- a/arch/arm/src/max326xx/chip/max32660_wdt.h +++ b/arch/arm/src/max326xx/chip/max32660_wdt.h @@ -1,5 +1,5 @@ /************************************************************************************ - * arch/arm/src/max326xx/chip/max326_wdt.h + * arch/arm/src/max326xx/chip/max32660_wdt.h * * Copyright (C) 2018 Gregory Nutt. All rights reserved. * Author: Gregory Nutt @@ -33,8 +33,8 @@ * ************************************************************************************/ -#ifndef __ARCH_ARM_SRC_MAX326XX_CHIP_MAX326_WDT_H -#define __ARCH_ARM_SRC_MAX326XX_CHIP_MAX326_WDT_H +#ifndef __ARCH_ARM_SRC_MAX326XX_CHIP_MAX32660_WDT_H +#define __ARCH_ARM_SRC_MAX326XX_CHIP_MAX32660_WDT_H /************************************************************************************ * Included Files @@ -110,4 +110,4 @@ # define WDT0_RST_SEQ1 (0xa5 << WDT0_RST_SHIFT) # define WDT0_RST_SEQ2 (0x5a << WDT0_RST_SHIFT) -#endif /* __ARCH_ARM_SRC_MAX326XX_CHIP_MAX326_WDT_H */ +#endif /* __ARCH_ARM_SRC_MAX326XX_CHIP_MAX32660_WDT_H */ diff --git a/arch/arm/src/max326xx/chip/max326_pinmux.h b/arch/arm/src/max326xx/chip/max326_pinmux.h new file mode 100644 index 00000000000..2cddc503a4b --- /dev/null +++ b/arch/arm/src/max326xx/chip/max326_pinmux.h @@ -0,0 +1,53 @@ +/************************************************************************************ + * arch/arm/src/max326xx/chip/max326_pinmux.h + * + * Copyright (C) 2018 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __ARCH_ARM_SRC_MAX326XX_CHIP_MAX326_PINMUX_H +#define __ARCH_ARM_SRC_MAX326XX_CHIP_MAX326_PINMUX_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#if defined(CONFIG_ARCH_FAMILY_MAX32620) || defined(CONFIG_ARCH_FAMILY_MAX32630) +# include "chip/max32620_30_pinmux.h" +#if defined(CONFIG_ARCH_FAMILY_MAX32660) +# include "chip/max32660_pinmux.h" +#else +# error "Unsupported MAX326XX family" +#endif + +#endif /* __ARCH_ARM_SRC_MAX326XX_CHIP_MAX326_PINMUX_H */ diff --git a/arch/arm/src/max326xx/common/max326_start.c b/arch/arm/src/max326xx/common/max326_start.c index 9418952bb96..ad5e0d436bc 100644 --- a/arch/arm/src/max326xx/common/max326_start.c +++ b/arch/arm/src/max326xx/common/max326_start.c @@ -193,7 +193,7 @@ void __start(void) __asm__ __volatile__ ("\tcpsid i\n"); - /* Configure the clocking and the console uart so that we can get debug + /* Configure the clocking and the console UART so that we can get debug * output as soon as possible. NOTE: That this logic must not assume that * .bss or .data have been initialized. */