This commit adds basic architectural support for the OpenRISK mor1kx architecture. The initial commit was verified on a Qemu simulation but is otherwise untested.

Squashed commit of the following:

Author: Gregory Nutt <gnutt@nuttx.org>
    Update README.
    configs/or1k:  Should include header file file where exported functin is prototyped.
    arch/or1k/src:  Eliminate some warnings.
    arch/or1k:  Complete review
    Fix some recently introduced build issues
    configs/or1k/nsh:  Convert to proper, compressed defconfig file.
    Another README update.
    Update README
    configs/or1k:  Updates from initial review.
    Update README.

Author: Matt Thompson <matt@extent3d.com>

    or1k: Added configurable CPU frequency to Kconfig. Calculate tick timer match period based on configured frequency.
    OpenRISC: Enable instruction and data cache
    OpenRISC: Initial support.
This commit is contained in:
Matt Thompson
2018-04-26 11:22:28 -06:00
committed by Gregory Nutt
parent 75f6d0a32a
commit d212e15a43
73 changed files with 8728 additions and 0 deletions
+7
View File
@@ -94,6 +94,11 @@ config ARCH_Z80
---help---
ZiLOG 8-bit architectures (z80, ez80, z8).
config ARCH_OR1K
bool "OpenRISC"
---help---
OpenRISC architectures.
endchoice
config ARCH
@@ -110,6 +115,7 @@ config ARCH
default "xtensa" if ARCH_XTENSA
default "z16" if ARCH_Z16
default "z80" if ARCH_Z80
default "or1k" if ARCH_OR1K
source arch/arm/Kconfig
source arch/avr/Kconfig
@@ -123,6 +129,7 @@ source arch/x86/Kconfig
source arch/xtensa/Kconfig
source arch/z16/Kconfig
source arch/z80/Kconfig
source arch/or1k/Kconfig
config ARCH_TOOLCHAIN_IAR
bool