mirror of
https://github.com/apache/nuttx.git
synced 2026-06-01 07:45:16 +08:00
Misoc: Add timer driver
This commit is contained in:
Ramtin Amin
committed by
Gregory Nutt
Gregory Nutt
parent
bac7153609
commit
d1e84fb788
@@ -205,13 +205,13 @@ static char g_uart1txbuffer[CONFIG_UART1_TXBUFSIZE];
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static struct misoc_dev_s g_uart1priv =
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{
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.uartbase = CSR_UART_BASE,
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.irq = UART_INTERRUPT,
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.rxtx_addr = CSR_UART_RXTX_ADDR,
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.rxempty_addr = CSR_UART_RXEMPTY_ADDR,
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.txfull_addr = CSR_UART_TXFULL_ADDR,
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.ev_status_addr = CSR_UART_EV_STATUS_ADDR,
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.ev_pending_addr = CSR_UART_EV_PENDING_ADDR,
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.uartbase = CSR_UART_BASE,
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.irq = UART_INTERRUPT,
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.rxtx_addr = CSR_UART_RXTX_ADDR,
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.rxempty_addr = CSR_UART_RXEMPTY_ADDR,
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.txfull_addr = CSR_UART_TXFULL_ADDR,
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.ev_status_addr = CSR_UART_EV_STATUS_ADDR,
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.ev_pending_addr = CSR_UART_EV_PENDING_ADDR,
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.ev_enable_addr = CSR_UART_EV_ENABLE_ADDR,
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};
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@@ -312,16 +312,9 @@ static void misoc_shutdown(struct uart_dev_s *dev)
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static int misoc_attach(struct uart_dev_s *dev)
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{
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struct misoc_dev_s *priv = (struct misoc_dev_s *)dev->priv;
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uint32_t im;
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irq_attach(priv->irq, misoc_uart_interrupt);
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/* enable interrupt */
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/* TODO: move that somewhere proper ! */
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im = irq_getmask();
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im |= (1 << UART_INTERRUPT);
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irq_setmask(im);
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(void)irq_attach(priv->irq, misoc_uart_interrupt);
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up_enable_irq(priv->irq);
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return OK;
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}
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@@ -339,13 +332,8 @@ static int misoc_attach(struct uart_dev_s *dev)
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static void misoc_detach(struct uart_dev_s *dev)
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{
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struct misoc_dev_s *priv = (struct misoc_dev_s *)dev->priv;
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uint32_t im;
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/* TODO: move that somewhere proper */
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im = irq_getmask();
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im &= ~(1 << UART_INTERRUPT);
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irq_setmask(im);
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up_disable_irq(priv->irq);
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irq_detach(priv->irq);
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}
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@@ -0,0 +1,140 @@
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/****************************************************************************
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* arch/risc-v/src/nr5m100/nr5_timerisr.c
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*
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* Copyright (C) 2009 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Modified for MISOC:
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*
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* Copyright (C) 2016 Ramtin Amin. All rights reserved.
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* Author: Ramtin Amin <keytwo@gmail.com>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <stdint.h>
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#include <time.h>
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#include <debug.h>
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#include <nuttx/arch.h>
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#include <nuttx/irq.h>
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#include <arch/board/board.h>
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#include <arch/board/generated/csr.h>
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#include "chip.h"
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#include "misoc.h"
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* The desired timer interrupt frequency is provided by the definition
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* CLK_TCK (see include/time.h). CLK_TCK defines the desired number of
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* system clock ticks per second. That value is a user configurable setting
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* that defaults to 100 (100 ticks per second = 10 MS interval).
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*
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* The RCC feeds the Cortex System Timer (SysTick) with the AHB clock (HCLK)
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* divided by 8. The SysTick can work either with this clock or with the
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* Cortex clock (HCLK), configurable in the SysTick Control and Status
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* register.
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*/
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#define SYSTICK_RELOAD ((MISOC_CLK_FREQUENCY / CLOCKS_PER_SEC) - 1)
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/****************************************************************************
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* Function: up_timerisr
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*
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* Description:
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* The timer ISR will perform a variety of services for various portions
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* of the systems.
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*
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****************************************************************************/
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int up_timerisr(int irq, void *context)
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{
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/* Clear event pending */
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timer0_ev_pending_write(timer0_ev_pending_read());
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/* Process timer interrupt */
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sched_process_timer();
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return 0;
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}
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/****************************************************************************
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* Function: up_timer_initialize
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*
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* Description:
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* This function is called during start-up to initialize
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* the timer interrupt.
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*
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****************************************************************************/
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void misoc_timer_initialize(void)
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{
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uint32_t im;
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/* Clear event pending */
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timer0_ev_pending_write(timer0_ev_pending_read());
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/* Disable timer*/
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timer0_en_write(0);
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/* FIX ME, PUT PROPER VALUE */
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timer0_reload_write(80000);
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timer0_load_write(80000);
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/* Enable timer */
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timer0_en_write(1);
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/* Attach the timer interrupt vector */
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(void)irq_attach(TIMER0_INTERRUPT, up_timerisr);
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/* And enable the timer interrupt */
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up_enable_irq(TIMER0_INTERRUPT);
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/* Enable IRQ of the timer core */
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timer0_ev_enable_write(1);
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}
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@@ -39,7 +39,7 @@ HEAD_ASRC = lm32_vectors.S
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CMN_ASRCS =
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CMN_CSRCS = misoc_lowputs.c misoc_serial.c misoc_mdelay.c
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CMN_CSRCS += misoc_modifyreg8.c misoc_modifyreg16.c misoc_modifyreg32.c
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CMN_CSRCS += misoc_puts.c misoc_udelay.c
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CMN_CSRCS += misoc_puts.c misoc_udelay.c misoc_timerisr.c
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CHIP_ASRCS = lm32_syscall.S
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@@ -49,3 +49,4 @@ CHIP_CSRCS += lm32_doirq.c lm32_dumpstate.c lm32_exit.c lm32_idle.c
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CHIP_CSRCS += lm32_initialize.c lm32_initialstate.c lm32_interruptcontext.c
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CHIP_CSRCS += lm32_irq.c lm32_releasepending.c lm32_releasestack.c
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CHIP_CSRCS += lm32_stackframe.c lm32_swint.c lm32_unblocktask.c
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CHIP_CSRCS += lm32_reprioritizertr.c
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@@ -0,0 +1,203 @@
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/****************************************************************************
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* arch/misoc/src/lm32/lm32_reprioritizertr.c
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*
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* Copyright (C) 2016 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <stdint.h>
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#include <stdbool.h>
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#include <sched.h>
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#include <syscall.h>
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#include <debug.h>
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#include <nuttx/arch.h>
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#include <nuttx/sched.h>
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#include "sched/sched.h"
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#include "group/group.h"
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#include "lm32.h"
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/****************************************************************************
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* Name: up_reprioritize_rtr
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*
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* Description:
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* Called when the priority of a running or
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* ready-to-run task changes and the reprioritization will
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* cause a context switch. Two cases:
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*
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* 1) The priority of the currently running task drops and the next
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* task in the ready to run list has priority.
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* 2) An idle, ready to run task's priority has been raised above the
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* the priority of the current, running task and it now has the
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* priority.
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*
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* Inputs:
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* tcb: The TCB of the task that has been reprioritized
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* priority: The new task priority
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*
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****************************************************************************/
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void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority)
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{
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/* Verify that the caller is sane */
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if (tcb->task_state < FIRST_READY_TO_RUN_STATE ||
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tcb->task_state > LAST_READY_TO_RUN_STATE
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#if SCHED_PRIORITY_MIN > 0
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|| priority < SCHED_PRIORITY_MIN
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#endif
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#if SCHED_PRIORITY_MAX < UINT8_MAX
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|| priority > SCHED_PRIORITY_MAX
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#endif
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)
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{
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PANIC();
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}
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else
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{
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struct tcb_s *rtcb = this_task();
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bool switch_needed;
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sinfo("TCB=%p PRI=%d\n", tcb, priority);
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/* Remove the tcb task from the ready-to-run list.
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* sched_removereadytorun will return true if we just
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* remove the head of the ready to run list.
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*/
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switch_needed = sched_removereadytorun(tcb);
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/* Setup up the new task priority */
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tcb->sched_priority = (uint8_t)priority;
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/* Return the task to the specified blocked task list.
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* sched_addreadytorun will return true if the task was
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* added to the new list. We will need to perform a context
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* switch only if the EXCLUSIVE or of the two calls is non-zero
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* (i.e., one and only one the calls changes the head of the
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* ready-to-run list).
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*/
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switch_needed ^= sched_addreadytorun(tcb);
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/* Now, perform the context switch if one is needed */
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if (switch_needed)
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{
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/* If we are going to do a context switch, then now is the right
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* time to add any pending tasks back into the ready-to-run list.
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* task list now
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*/
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if (g_pendingtasks.head)
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{
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sched_mergepending();
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}
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/* Update scheduler parameters */
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sched_suspend_scheduler(rtcb);
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/* Are we in an interrupt handler? */
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if (g_current_regs)
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{
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/* Yes, then we have to do things differently.
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* Just copy the g_current_regs into the OLD rtcb.
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*/
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up_savestate(rtcb->xcp.regs);
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/* Restore the exception context of the rtcb at the (new) head
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* of the ready-to-run task list.
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*/
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rtcb = this_task();
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/* Update scheduler parameters */
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sched_resume_scheduler(rtcb);
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/* Then switch contexts. Any necessary address environment
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* changes will be made when the interrupt returns.
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*/
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up_restorestate(rtcb->xcp.regs);
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}
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/* No, then we will need to perform the user context switch */
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else
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{
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/* Switch context to the context of the task at the head of the
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* ready to run list.
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*/
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struct tcb_s *nexttcb = this_task();
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#ifdef CONFIG_ARCH_ADDRENV
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/* Make sure that the address environment for the previously
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* running task is closed down gracefully (data caches dump,
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* MMU flushed) and set up the address environment for the new
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* thread at the head of the ready-to-run list.
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*/
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(void)group_addrenv(nexttcb);
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#endif
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/* Update scheduler parameters */
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sched_resume_scheduler(nexttcb);
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/* Then switch contexts */
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up_switchcontext(rtcb->xcp.regs, nexttcb->xcp.regs);
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/* up_switchcontext forces a context switch to the task at the
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* head of the ready-to-run list. It does not 'return' in the
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* normal sense. When it does return, it is because the blocked
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* task is again ready to run and has execution priority.
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*/
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}
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}
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}
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}
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Block a user