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With these changes the SDMMC card for LPC4330 is now working properly BUT it needs more testing, especially with different cards etc. This code should be applicable to all members of the lpc43xx family.
In addition to the problems that were previously identified there were a few other bits and pieces outstanding;
* Timing was dependent on CPU speed rather than absolute time
* End of transfer handling was a bit mixed up
* It's possible for data to still be in the FIFO (i.e. not have reached
the card) when a next write is requested, so we need to wait for that to
complete
* Interrupt Status could be carried over from one transfer episode to the
next, corrupting progress
* Multi-descriptor DMA writing simply wasn't implemented, but there were no
indications ... it just failed silently
This commit is contained in:
committed by
Gregory Nutt
parent
c28cbdb22f
commit
d1c01e1135
@@ -1196,10 +1196,13 @@ static int mmcsd_transferready(FAR struct mmcsd_state_s *priv)
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}
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/* Check for the programming state. This is not an error. It means
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* that the card is still busy from the last (write) transfer.
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* that the card is still busy from the last (write) transfer. The
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* card can also still be receiving data, for example, if hardware
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* receive FIFOs are not yet empty.
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*/
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else if (!IS_STATE(r1, MMCSD_R1_STATE_PRG))
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else if (!IS_STATE(r1, MMCSD_R1_STATE_PRG) &&
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!IS_STATE(r1, MMCSD_R1_STATE_RCV))
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{
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/* Any other state would be an error in this context. There is
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* a possibility that the card is not selected. In this case,
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