diff --git a/arch/arm/src/sam34/Kconfig b/arch/arm/src/sam34/Kconfig
index 099004dbf16..7899d481958 100644
--- a/arch/arm/src/sam34/Kconfig
+++ b/arch/arm/src/sam34/Kconfig
@@ -592,6 +592,14 @@ config SAM34_UART1
 	select ARCH_HAVE_UART1
 	select ARCH_HAVE_SERIAL_TERMIOS
 
+if SAM34_UART1 && ARCH_CHIP_SAM4CM
+
+config SAM34_UART1_OPTICAL
+	bool "UART 1 is optical"
+	default n
+
+endif
+
 config SAM34_UDP
 	bool "USB Device Full Speed (UDP)"
 	default n
diff --git a/arch/arm/src/sam34/chip/sam_uart.h b/arch/arm/src/sam34/chip/sam_uart.h
index c3a54715457..a80a898704e 100644
--- a/arch/arm/src/sam34/chip/sam_uart.h
+++ b/arch/arm/src/sam34/chip/sam_uart.h
@@ -260,6 +260,12 @@
 
 /* UART Mode Register and USART Mode Register (UART MODE) */
 
+#ifdef CONFIG_ARCH_CHIP_SAM4CM
+#  define UART_MR_OPT_EN             (1 << 0)  /* Bit 0: UART Optical Interface Enable (UART only) */
+#  define UART_MR_OPT_RXINV          (1 << 1)  /* Bit 1: UART Receive Data Inverted (UART only) */
+#  define UART_MR_OPT_MDINV          (1 << 2)  /* Bit 2: UART Modulated Data Inverted (UART only) */
+#endif
+
 #define UART_MR_MODE_SHIFT           (0)       /* Bits 0-3: (USART only) */
 #define UART_MR_MODE_MASK            (15 << UART_MR_MODE_SHIFT)
 #  define UART_MR_MODE_NORMAL        (0  << UART_MR_MODE_SHIFT) /* Normal */
@@ -274,6 +280,7 @@
 #endif
 #  define UART_MR_MODE_SPIMSTR       (14 << UART_MR_MODE_SHIFT) /* SPI Master (SPI mode only) */
 #  define UART_MR_MODE_SPISLV        (15 << UART_MR_MODE_SHIFT) /* SPI Slave (SPI mode only) */
+
 #define UART_MR_USCLKS_SHIFT         (4)       /* Bits 4-5: Clock Selection (USART only) */
 #define UART_MR_USCLKS_MASK          (3 << UART_MR_USCLKS_SHIFT)
 #  define UART_MR_USCLKS_MCK         (0 << UART_MR_USCLKS_SHIFT) /* MCK */
@@ -306,6 +313,10 @@
 #  define UART_MR_CHMODE_ECHO        (1 << UART_MR_CHMODE_SHIFT) /* Automatic Echo */
 #  define UART_MR_CHMODE_LLPBK       (2 << UART_MR_CHMODE_SHIFT) /* Local Loopback */
 #  define UART_MR_CHMODE_RLPBK       (3 << UART_MR_CHMODE_SHIFT) /* Remote Loopback */
+#ifdef CONFIG_ARCH_CHIP_SAM4CM
+#  define UART_MR_OPT_CLKDIV_SHIFT   (16)      /* Bits 16-20: Optical Link Clock Divider (UART only) */
+#  define UART_MR_OPT_CLKDIV_MASK    (31 << UART_MR_OPT_CLKDIV_SHIFT)
+#endif
 #define UART_MR_MSBF                 (1 << 16) /* Bit 16: Most Significant Bit first (USART only) */
 #define UART_MR_CPOL                 (1 << 16) /* Bit 16: SPI Clock Polarity (USART SPI mode only) */
 #define UART_MR_MODE9                (1 << 17) /* Bit 17: 9-bit Character Length (USART only) */
@@ -320,6 +331,27 @@
 #define UART_MR_DSNACK               (1 << 21) /* Bit 21: Disable Successive NACK (USART only) */
 #define UART_MR_VARSYNC              (1 << 22) /* Bit 22: Variable Synchronization of Command/Data Sync Start Frame Delimiter (USART only) */
 #define UART_MR_INVDATA              (1 << 23) /* Bit 23: INverted Data (USART only) */
+
+#ifdef CONFIG_ARCH_CHIP_SAM4CM
+#  define UART_MR_OPT_OPT_DUTY_SHIFT   (24)      /* Bits 24-26: Optical Link Modulation Clock Duty Cycle (UART only) */
+#  define UART_MR_OPT_OPT_DUTY_MASK    (7 << UART_MR_OPT_OPT_DUTY_SHIFT)
+#    define UART_MR_OPT_OPT_DUTY_50    (0 << UART_MR_OPT_OPT_DUTY_SHIFT)
+#    define UART_MR_OPT_OPT_DUTY_43P75 (1 << UART_MR_OPT_OPT_DUTY_SHIFT)
+#    define UART_MR_OPT_OPT_DUTY_37P5  (2 << UART_MR_OPT_OPT_DUTY_SHIFT)
+#    define UART_MR_OPT_OPT_DUTY_31P25 (3 << UART_MR_OPT_OPT_DUTY_SHIFT)
+#    define UART_MR_OPT_OPT_DUTY_25    (4 << UART_MR_OPT_OPT_DUTY_SHIFT)
+#    define UART_MR_OPT_OPT_DUTY_18P75 (5 << UART_MR_OPT_OPT_DUTY_SHIFT)
+#    define UART_MR_OPT_OPT_DUTY_12P5  (6 << UART_MR_OPT_OPT_DUTY_SHIFT)
+#    define UART_MR_OPT_OPT_DUTY_6P25  (7 << UART_MR_OPT_OPT_DUTY_SHIFT)
+#  define UART_MR_OPT_CMPTH_SHIFT          (28)
+#  define UART_MR_OPT_CMPTH_MASK           (7 << UART_MR_OPT_CMPTH_SHIFT)
+#    define UART_MR_OPT_CMPTH_VDDIO_DIV2   (0 << UART_MR_OPT_CMPTH_SHIFT)
+#    define UART_MR_OPT_CMPTH_VDDIO_DIV2P5 (1 << UART_MR_OPT_CMPTH_SHIFT)
+#    define UART_MR_OPT_CMPTH_VDDIO_DIV3P3 (2 << UART_MR_OPT_CMPTH_SHIFT)
+#    define UART_MR_OPT_CMPTH_VDDIO_DIV5   (3 << UART_MR_OPT_CMPTH_SHIFT)
+#    define UART_MR_OPT_CMPTH_VDDIO_DIV10  (4 << UART_MR_OPT_CMPTH_SHIFT)
+#endif
+
 #define UART_MR_MAXITER_SHIFT        (24)      /* Bits 24-26: Max iterations (ISO7816 T=0 (USART only) */
 #define UART_MR_MAXITER_MASK         (7 << UART_MR_MAXITER_SHIFT)
 #  define UART_MR_MAXITER(n)         ((uint32_t)(n) << UART_MR_MAXITER_SHIFT)
diff --git a/arch/arm/src/sam34/sam_serial.c b/arch/arm/src/sam34/sam_serial.c
index 6f8b38c070a..c9811419d74 100644
--- a/arch/arm/src/sam34/sam_serial.c
+++ b/arch/arm/src/sam34/sam_serial.c
@@ -791,6 +791,15 @@ static int up_setup(struct uart_dev_s *dev)
       regval |= UART_MR_NBSTOP_1;
     }
 
+#ifdef CONFIG_SAM34_UART1_OPTICAL
+  if (priv == &g_uart1priv)
+    {
+      /* Enable optical mode. */
+
+      regval |= UART_MR_OPT_EN;
+    }
+#endif
+
   /* And save the new mode register value */
 
   up_serialout(priv, SAM_UART_MR_OFFSET, regval);