Merged in dagar/nuttx/pr-stm32_dma_per_spi (pull request #736)

stm32 enable separate DMA per SPI configuration

Approved-by: GregoryN <gnutt@nuttx.org>
This commit is contained in:
Daniel Agar
2018-10-18 16:36:14 +00:00
committed by GregoryN
parent 60d490f9b1
commit cfc5b59636
2 changed files with 127 additions and 20 deletions
+67 -1
View File
@@ -8465,7 +8465,73 @@ config STM32_SPI_DMA
---help--- ---help---
Use DMA to improve SPI transfer performance. Cannot be used with STM32_SPI_INTERRUPT. Use DMA to improve SPI transfer performance. Cannot be used with STM32_SPI_INTERRUPT.
endmenu if STM32_SPI1
config STM32_SPI1_DMA
bool "SPI1 DMA"
default n
depends on STM32_SPI_DMA
---help---
Use DMA to improve SPI1 transfer performance.
endif # STM32_SPI1
if STM32_SPI2
config STM32_SPI2_DMA
bool "SPI2 DMA"
default n
depends on STM32_SPI_DMA
---help---
Use DMA to improve SPI2 transfer performance.
endif # STM32_SPI2
if STM32_SPI3
config STM32_SPI3_DMA
bool "SPI3 DMA"
default n
depends on STM32_SPI_DMA
---help---
Use DMA to improve SPI3 transfer performance.
endif # STM32_SPI2
if STM32_SPI4
config STM32_SPI4_DMA
bool "SPI4 DMA"
default n
depends on STM32_SPI_DMA
---help---
Use DMA to improve SPI4 transfer performance.
endif # STM32_SPI4
if STM32_SPI5
config STM32_SPI5_DMA
bool "SPI5 DMA"
default n
depends on STM32_SPI_DMA
---help---
Use DMA to improve SPI5 transfer performance.
endif # STM32_SPI5
if STM32_SPI6
config STM32_SPI6_DMA
bool "SPI6 DMA"
default n
depends on STM32_SPI_DMA
---help---
Use DMA to improve SPI6 transfer performance.
endif # STM32_SPI6
endmenu # SPI Configuration
menu "I2S Configuration" menu "I2S Configuration"
depends on STM32_I2S3 depends on STM32_I2S3
+45 -4
View File
@@ -292,8 +292,13 @@ static struct stm32_spidev_s g_spi1dev =
.spiirq = STM32_IRQ_SPI1, .spiirq = STM32_IRQ_SPI1,
#endif #endif
#ifdef CONFIG_STM32_SPI_DMA #ifdef CONFIG_STM32_SPI_DMA
# ifdef CONFIG_STM32_SPI1_DMA
.rxch = DMACHAN_SPI1_RX, .rxch = DMACHAN_SPI1_RX,
.txch = DMACHAN_SPI1_TX, .txch = DMACHAN_SPI1_TX,
# else
.rxch = 0,
.txch = 0,
# endif
#endif #endif
}; };
#endif #endif
@@ -336,8 +341,13 @@ static struct stm32_spidev_s g_spi2dev =
.spiirq = STM32_IRQ_SPI2, .spiirq = STM32_IRQ_SPI2,
#endif #endif
#ifdef CONFIG_STM32_SPI_DMA #ifdef CONFIG_STM32_SPI_DMA
# ifdef CONFIG_STM32_SPI2_DMA
.rxch = DMACHAN_SPI2_RX, .rxch = DMACHAN_SPI2_RX,
.txch = DMACHAN_SPI2_TX, .txch = DMACHAN_SPI2_TX,
# else
.rxch = 0,
.txch = 0,
# endif
#endif #endif
}; };
#endif #endif
@@ -380,8 +390,13 @@ static struct stm32_spidev_s g_spi3dev =
.spiirq = STM32_IRQ_SPI3, .spiirq = STM32_IRQ_SPI3,
#endif #endif
#ifdef CONFIG_STM32_SPI_DMA #ifdef CONFIG_STM32_SPI_DMA
# ifdef CONFIG_STM32_SPI3_DMA
.rxch = DMACHAN_SPI3_RX, .rxch = DMACHAN_SPI3_RX,
.txch = DMACHAN_SPI3_TX, .txch = DMACHAN_SPI3_TX,
# else
.rxch = 0,
.txch = 0,
# endif
#endif #endif
}; };
#endif #endif
@@ -424,8 +439,13 @@ static struct stm32_spidev_s g_spi4dev =
.spiirq = STM32_IRQ_SPI4, .spiirq = STM32_IRQ_SPI4,
#endif #endif
#ifdef CONFIG_STM32_SPI_DMA #ifdef CONFIG_STM32_SPI_DMA
# ifdef CONFIG_STM32_SPI4_DMA
.rxch = DMACHAN_SPI4_RX, .rxch = DMACHAN_SPI4_RX,
.txch = DMACHAN_SPI4_TX, .txch = DMACHAN_SPI4_TX,
# else
.rxch = 0,
.txch = 0,
# endif
#endif #endif
}; };
#endif #endif
@@ -468,8 +488,13 @@ static struct stm32_spidev_s g_spi5dev =
.spiirq = STM32_IRQ_SPI5, .spiirq = STM32_IRQ_SPI5,
#endif #endif
#ifdef CONFIG_STM32_SPI_DMA #ifdef CONFIG_STM32_SPI_DMA
# ifdef CONFIG_STM32_SPI5_DMA
.rxch = DMACHAN_SPI5_RX, .rxch = DMACHAN_SPI5_RX,
.txch = DMACHAN_SPI5_TX, .txch = DMACHAN_SPI5_TX,
# else
.rxch = 0,
.txch = 0,
# endif
#endif #endif
}; };
#endif #endif
@@ -487,7 +512,7 @@ static const struct spi_ops_s g_sp6iops =
#endif #endif
.status = stm32_spi6status, .status = stm32_spi6status,
#ifdef CONFIG_SPI_CMDDATA #ifdef CONFIG_SPI_CMDDATA
.cmddata = stm32_spi3cmddata, .cmddata = stm32_spi6cmddata,
#endif #endif
.send = spi_send, .send = spi_send,
#ifdef CONFIG_SPI_EXCHANGE #ifdef CONFIG_SPI_EXCHANGE
@@ -512,8 +537,13 @@ static struct stm32_spidev_s g_spi6dev =
.spiirq = STM32_IRQ_SPI6, .spiirq = STM32_IRQ_SPI6,
#endif #endif
#ifdef CONFIG_STM32_SPI_DMA #ifdef CONFIG_STM32_SPI_DMA
# ifdef CONFIG_STM32_SPI6_DMA
.rxch = DMACHAN_SPI6_RX, .rxch = DMACHAN_SPI6_RX,
.txch = DMACHAN_SPI6_TX, .txch = DMACHAN_SPI6_TX,
# else
.rxch = 0,
.txch = 0,
# endif
#endif #endif
}; };
#endif #endif
@@ -1578,10 +1608,12 @@ static void spi_exchange(FAR struct spi_dev_s *dev, FAR const void *txbuffer,
FAR struct stm32_spidev_s *priv = (FAR struct stm32_spidev_s *)dev; FAR struct stm32_spidev_s *priv = (FAR struct stm32_spidev_s *)dev;
#ifdef CONFIG_STM32_DMACAPABLE #ifdef CONFIG_STM32_DMACAPABLE
if ((txbuffer && !stm32_dmacapable((uint32_t)txbuffer, nwords, priv->txccr)) || if ((priv->rxdma == NULL) || (priv->txdma == NULL) ||
(rxbuffer && !stm32_dmacapable((uint32_t)rxbuffer, nwords, priv->rxccr))) (txbuffer && !stm32_dmacapable((uint32_t)txbuffer, nwords, priv->txccr)) ||
(rxbuffer && !stm32_dmacapable((uint32_t)rxbuffer, nwords, priv->rxccr)) ||
up_interrupt_context())
{ {
/* Unsupported memory region, fall back to non-DMA method. */ /* Invalid DMA channels, unsupported memory region, or interrupt context, fall back to non-DMA method. */
spi_exchange_nodma(dev, txbuffer, rxbuffer, nwords); spi_exchange_nodma(dev, txbuffer, rxbuffer, nwords);
} }
@@ -1741,6 +1773,8 @@ static void spi_bus_initialize(FAR struct stm32_spidev_s *priv)
* priority inheritance enabled. * priority inheritance enabled.
*/ */
if (priv->rxch && priv->txch)
{
nxsem_init(&priv->rxsem, 0, 0); nxsem_init(&priv->rxsem, 0, 0);
nxsem_init(&priv->txsem, 0, 0); nxsem_init(&priv->txsem, 0, 0);
@@ -1760,6 +1794,13 @@ static void spi_bus_initialize(FAR struct stm32_spidev_s *priv)
DEBUGASSERT(priv->rxdma && priv->txdma); DEBUGASSERT(priv->rxdma && priv->txdma);
spi_modifycr2(priv, SPI_CR2_RXDMAEN | SPI_CR2_TXDMAEN, 0); spi_modifycr2(priv, SPI_CR2_RXDMAEN | SPI_CR2_TXDMAEN, 0);
}
else
{
priv->rxdma = NULL;
priv->txdma = NULL;
}
#endif #endif
/* Enable spi */ /* Enable spi */