From cf73c9e1d1246ea655e8202e8a30f5f432d33f12 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Thu, 27 Oct 2016 10:43:58 -0600 Subject: [PATCH] EPS32: Add GPIO ROM interface definitions --- arch/xtensa/src/esp32/Kconfig | 107 ++++++- arch/xtensa/src/esp32/Make.defs | 4 + arch/xtensa/src/esp32/rom/esp32_gpio.h | 424 +++++++++++++++++++++++++ configs/esp32-core/nsh/defconfig | 40 ++- 4 files changed, 565 insertions(+), 10 deletions(-) create mode 100644 arch/xtensa/src/esp32/rom/esp32_gpio.h diff --git a/arch/xtensa/src/esp32/Kconfig b/arch/xtensa/src/esp32/Kconfig index a3ad7fcaa95..6ef278294e2 100644 --- a/arch/xtensa/src/esp32/Kconfig +++ b/arch/xtensa/src/esp32/Kconfig @@ -7,6 +7,10 @@ if ARCH_CHIP_ESP32 menu "ESP32 Peripheral Selection" +config ESP32_UART + bool + default n + config ESP32_BT bool "Bluetooth" default n @@ -175,14 +179,23 @@ config ESP32_RWDT config ESP32_UART0 bool "UART 0" default n + select ESP32_UART + select UART0_SERIALDRIVER + select ARCH_HAVE_SERIAL_TERMIOS config ESP32_UART1 bool "UART 1" default n + select ESP32_UART + select UART1_SERIALDRIVER + select ARCH_HAVE_SERIAL_TERMIOS config ESP32_UART2 bool "UART 2" default n + select ESP32_UART + select UART2_SERIALDRIVER + select ARCH_HAVE_SERIAL_TERMIOS config ESP32_WIRELESS bool "Wireless" @@ -193,10 +206,7 @@ config ESP32_WIRELESS endmenu # ESP32 Peripheral Selection -config ESP32_GPIO_IRQ - bool "GPIO pin interrupts" - ---help--- - Enable support for interrupting GPIO pins +menu "Memory Configuration" config ESP32_BT_RESERVE_DRAM int "Reserved BT DRAM" @@ -210,4 +220,93 @@ config ESP32_ULP_COPROC_RESERVE_MEM int "Reserved ULP co-processor DRAM" default 0 +endmenu # Memory Configuration + +config ESP32_GPIO_IRQ + bool "GPIO pin interrupts" + ---help--- + Enable support for interrupting GPIO pins + +menu "UART configuration" + depends on ESP32_UART + +if ESP32_UART0 + +config ESP32_UART0_TXPIN + int "UART0 Tx Pin" + default 0 + range 0 39 + +config ESP32_UART0_TXPIN + int "UART0 Tx Pin" + default 0 + range 0 39 + +if SERIAL_IFLOWCONTROL || SERIAL_OFLOWCONTROL +config ESP32_UART0_RTSPIN + int "UART0 RTS Pin" + default 0 + range 0 39 + +config ESP32_UART0_CTSPIN + int "UART0 CTS Pin" + default 0 + range 0 39 + +endif # SERIAL_IFLOWCONTROL || SERIAL_OFLOWCONTROL +endif # ESP32_UART0 + +if ESP32_UART1 + +config ESP32_UART1_TXPIN + int "UART1 Tx Pin" + default 0 + range 0 39 + +config ESP32_UART1_TXPIN + int "UART1 Tx Pin" + default 0 + range 0 39 + +if SERIAL_IFLOWCONTROL || SERIAL_OFLOWCONTROL +config ESP32_UART1_RTSPIN + int "UART1 RTS Pin" + default 0 + range 0 39 + +config ESP32_UART1_CTSPIN + int "UART1 CTS Pin" + default 0 + range 0 39 + +endif # SERIAL_IFLOWCONTROL || SERIAL_OFLOWCONTROL +endif # ESP32_UART1 + +if ESP32_UART2 + +config ESP32_UART2_TXPIN + int "UART2 Tx Pin" + default 0 + range 0 39 + +config ESP32_UART2_TXPIN + int "UART2 Tx Pin" + default 0 + range 0 39 + +if SERIAL_IFLOWCONTROL || SERIAL_OFLOWCONTROL +config ESP32_UART2_RTSPIN + int "UART2 RTS Pin" + default 0 + range 0 39 + +config ESP32_UART2_CTSPIN + int "UART2 CTS Pin" + default 0 + range 0 39 + +endif # SERIAL_IFLOWCONTROL || SERIAL_OFLOWCONTROL +endif # ESP32_UART2 + +endmenu # UART configuration endif # ARCH_CHIP_ESP32 diff --git a/arch/xtensa/src/esp32/Make.defs b/arch/xtensa/src/esp32/Make.defs index cc3d6a59c15..64c855df37b 100644 --- a/arch/xtensa/src/esp32/Make.defs +++ b/arch/xtensa/src/esp32/Make.defs @@ -88,3 +88,7 @@ CHIP_ASRCS = esp32_cpuindex.S #CMN_CSRCS += esp32_cpustart.c esp32_cpupause.c esp32_cpuidlestack.c CMN_CSRCS += esp32_cpustart.c endif + +ifeq ($(CONFIG_ESP32_UART),y) +CMN_CSRCS += esp32_serial.c +endif diff --git a/arch/xtensa/src/esp32/rom/esp32_gpio.h b/arch/xtensa/src/esp32/rom/esp32_gpio.h new file mode 100644 index 00000000000..8e426e0cb79 --- /dev/null +++ b/arch/xtensa/src/esp32/rom/esp32_gpio.h @@ -0,0 +1,424 @@ +/**************************************************************************** + * arch/xtensa/src/esp32/esp32_gpio.c + * + * Developed for NuttX by: + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Derivies from sample code provided by Expressif Systems: + * + * Copyright 2010-2016 Espressif Systems (Shanghai) PTE LTD + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************/ + +#ifndef __XTENSA_SRC_ESP32_ROM_ESP32_GPIO_H +#define __XTENSA_SRC_ESP32_ROM_ESP32_GPIO_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include + +#include "chip/gpio_reg.h" + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +enum gpio_inttype_e +{ + GPIO_PIN_INTR_DISABLE = 0, + GPIO_PIN_INTR_POSEDGE = 1, + GPIO_PIN_INTR_NEGEDGE = 2, + GPIO_PIN_INTR_ANYEGDE = 3, + GPIO_PIN_INTR_LOLEVEL = 4, + GPIO_PIN_INTR_HILEVEL = 5 +}; + +typedef enum gpio_inttype_e GPIO_INT_TYPE; + +/* GPIO interrupt handler, registered through gpio_intr_handler_register */ + +typedef void (*gpio_intr_handler_fn_t)(uint32_t intr_mask, bool high, void *arg); + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +#ifdef __cplusplus +extern "C" +{ +#endif + +/**************************************************************************** + * Name: gpio_init + * + * Description: + * Initialize GPIO. This includes reading the GPIO Configuration DataSet + * to initialize "output enables" and pin configurations for each gpio pin. + * Please do not call this function in SDK. + * + * Input Parameters: + * None + * + * Returned Value: + * None + * + ****************************************************************************/ + +void gpio_init(void); + +/**************************************************************************** + * Name: gpio_output_set + * + * Description: + * Change GPIO(0-31) pin output by setting, clearing, or disabling pins, + * GPIO0<->BIT(0). There is no particular ordering guaranteed; so if the + * order of writes is significant, calling code should divide a single + * call into multiple calls. + * + * Input Parameters: + * set_mask - the gpios that need high level. + * clear_mask - the gpios that need low level. + * enable_mask - the gpios that need be changed. + * disable_mask - the gpios that need diable output. + * + * Returned Value: + * None + * + ****************************************************************************/ + +void gpio_output_set(uint32_t set_mask, uint32_t clear_mask, + uint32_t enable_mask, uint32_t disable_mask); + +/**************************************************************************** + * Name: gpio_output_set_high + * + * Description: + * Change GPIO(32-39) pin output by setting, clearing, or disabling pins, + * GPIO32<->BIT(0). There is no particular ordering guaranteed; so if the + * order of writes is significant, calling code should divide a single call + * into multiple calls. + * + * Input Parameters: + * set_mask - the gpios that need high level. + * clear_mask - the gpios that need low level. + * enable_mask - the gpios that need be changed. + * disable_mask - the gpios that need diable output. + * + * Returned Value: + * None + * + ****************************************************************************/ + +void gpio_output_set_high(uint32_t set_mask, uint32_t clear_mask, + uint32_t enable_mask, uint32_t disable_mask); + +/**************************************************************************** + * Name: gpio_input_get + * + * Description: + * Sample the value of GPIO input pins(0-31) and returns a bitmask. + * + * Input Parameters: + * None + * + * Returned Value: + * Bitmask for GPIO input pins, BIT(0) for GPIO0. + * + ****************************************************************************/ + +uint32_t gpio_input_get(void); + +/**************************************************************************** + * Name: gpio_input_get_high + * + * Description: + * Sample the value of GPIO input pins(32-39) and returns a bitmask. + * + * Input Parameters: + * None + * + * Returned Value: + * Bitmask for GPIO input pins, BIT(0) for GPIO32. + * + ****************************************************************************/ + +uint32_t gpio_input_get_high(void); + +/**************************************************************************** + * Name: gpio_intr_handler_register + * + * Description: + * Register an application-specific interrupt handler for GPIO pin + * interrupts. Once the interrupt handler is called, it will not be + * called again until after a call to gpio_intr_ack. + * + * Input Parameters: + * fn - gpio application-specific interrupt handler + * arg - gpio application-specific interrupt handler argument. + * + * Returned Value: + * None + * + ****************************************************************************/ + +void gpio_intr_handler_register(gpio_intr_handler_fn_t fn, void *arg); + +/**************************************************************************** + * Name: gpio_intr_pending + * + * Description: + * Get gpio interrupts which happens but not processed. + * + * Input Parameters: + * + * Returned Value: + * Bitmask for GPIO pending interrupts, BIT(0) for GPIO0. + * + ****************************************************************************/ + +uint32_t gpio_intr_pending(void); + +/**************************************************************************** + * Name: gpio_intr_pending_high + * + * Description: + * Get gpio interrupts which happens but not processed. + * + * Input Parameters: + * + * Returned Value: + * Bitmask for GPIO pending interrupts, BIT(0) for GPIO32. + * + ****************************************************************************/ + +uint32_t gpio_intr_pending_high(void); + +/**************************************************************************** + * Name: gpio_intr_ack + * + * Description: + * Ack gpio interrupts to process pending interrupts. + * + * Input Parameters: + * ack_mask: bitmask for GPIO ack interrupts, BIT(0) for GPIO0. + * + * Returned Value: + * None + * + ****************************************************************************/ + +void gpio_intr_ack(uint32_t ack_mask); + +/**************************************************************************** + * Name: gpio_intr_ack_high + * + * Description: + * Ack gpio interrupts to process pending interrupts. + * + * Input Parameters: + * ack_mask: bitmask for GPIO ack interrupts, BIT(0) for GPIO32. + * + * Returned Value: + * None + * + ****************************************************************************/ + +void gpio_intr_ack_high(uint32_t ack_mask); + +/**************************************************************************** + * Name: gpio_pin_wakeup_enable + * + * Description: + * Set GPIO to wakeup the ESP32. + * + * Input Parameters: + * i - gpio number. + * intr_state - only GPIO_PIN_INTR_LOLEVEL\GPIO_PIN_INTR_HILEVEL can be used + * + * Returned Value: + * None + * + ****************************************************************************/ + +void gpio_pin_wakeup_enable(uint32_t i, GPIO_INT_TYPE intr_state); + +/**************************************************************************** + * Name: gpio_pin_wakeup_disable + * + * Description: + * disable GPIOs to wakeup the ESP32. + * + * Input Parameters: + * None + * + * Returned Value: + * None + * + ****************************************************************************/ + +void gpio_pin_wakeup_disable(void); + +/**************************************************************************** + * Name: gpio_matrix_in + * + * Description: + * Set gpio input to a signal, one gpio can input to several signals. + * + * Input Parameters: + * gpio - gpio number, 0~0x27 + * gpio == 0x30, input 0 to signal + * gpio == 0x34, ??? + * gpio == 0x38, input 1 to signal + * + * signal_idx - signal index. + * inv - the signal is inv or not + * + * Returned Value: + * None + * + ****************************************************************************/ + +void gpio_matrix_in(uint32_t gpio, uint32_t signal_idx, bool inv); + +/**************************************************************************** + * Name: gpio_matrix_out + * + * Description: + * Set signal output to gpio, one signal can output to several gpios. + * + * Input Parameters: + * gpio - gpio number, 0~0x27 + * signal_idx - signal index. + * signal_idx == 0x100, cancel output put to the gpio + * out_inv - the signal output is inv or not + * oen_inv - the signal output enable is inv or not + * + * Returned Value: + * None + * + ****************************************************************************/ + +void gpio_matrix_out(uint32_t gpio, uint32_t signal_idx, bool out_inv, + bool oen_inv); + +/**************************************************************************** + * Name: + * + * Description: + * Select pad as a gpio function from IOMUX. + * + * Input Parameters: + * gpio_num - gpio number, 0~0x27 + * + * Returned Value: + * None + * + ****************************************************************************/ + +void gpio_pad_select_gpio(uint8_t gpio_num); + +/**************************************************************************** + * Name: gpio_pad_set_drv + * + * Description: + * Set pad driver capability. + * + * Input Parameters: + * gpio_num - gpio number, 0~0x27 + * drv - 0-3 + * + * Returned Value: + * None + * + ****************************************************************************/ + +void gpio_pad_set_drv(uint8_t gpio_num, uint8_t drv); + +/**************************************************************************** + * Name: gpio_pad_pullup + * + * Description: + * Pull up the pad from gpio number. + * + * Input Parameters: + * gpio_num - gpio number, 0~0x27 + * + * Returned Value: + * None + * + ****************************************************************************/ + +void gpio_pad_pullup(uint8_t gpio_num); + +/**************************************************************************** + * Name: gpio_pad_pulldown + * + * Description: + * Pull down the pad from gpio number. + * + * Input Parameters: + * gpio_num - gpio number, 0~0x27 + * + * Returned Value: + * None + * + ****************************************************************************/ + +void gpio_pad_pulldown(uint8_t gpio_num); + +/**************************************************************************** + * Name: gpio_pad_unhold + * + * Description: + * Unhold the pad from gpio number. + * + * Input Parameters: + * gpio_num - gpio number, 0~0x27 + * + * Returned Value: + * None + * + ****************************************************************************/ + +void gpio_pad_unhold(uint8_t gpio_num); + +/**************************************************************************** + * Name: gpio_pad_hold + * + * Description: + * Hold the pad from gpio number. + * + * Input Parameters: + * gpio_num - gpio number, 0~0x27 + * + * Returned Value: + * None + * + ****************************************************************************/ + +void gpio_pad_hold(uint8_t gpio_num); + +#ifdef __cplusplus +} +#endif + +#endif /* __XTENSA_SRC_ESP32_ROM_ESP32_GPIO_H */ diff --git a/configs/esp32-core/nsh/defconfig b/configs/esp32-core/nsh/defconfig index f2d2b47017d..8d40ba790f4 100644 --- a/configs/esp32-core/nsh/defconfig +++ b/configs/esp32-core/nsh/defconfig @@ -72,10 +72,12 @@ CONFIG_ARCH_XTENSA=y # CONFIG_ARCH_Z80 is not set CONFIG_ARCH="xtensa" CONFIG_ARCH_CHIP="esp32" +# CONFIG_SERIAL_TERMIOS is not set CONFIG_ARCH_CHIP_ESP32=y CONFIG_ARCH_FAMILY_LX6=y CONFIG_XTENSA_CALL0_ABI=y # CONFIG_XTENSA_USE_OVLY is not set +CONFIG_ESP32_UART=y # CONFIG_ESP32_SPI2 is not set # CONFIG_XTENSA_TIMER1 is not set # CONFIG_XTENSA_TIMER2 is not set @@ -85,11 +87,21 @@ CONFIG_ESP32_UART0=y CONFIG_ESP32_BT_RESERVE_DRAM=0 CONFIG_ESP32_TRACEMEM_RESERVE_DRAM=0 CONFIG_ESP32_ULP_COPROC_RESERVE_MEM=0 +# CONFIG_ESP32_GPIO_IRQ is not set +CONFIG_ESP32_UART0_TXPIN=0 # # ESP32 Peripheral Selection # +# +# Memory Configuration +# + +# +# UART configuration +# + # # Architecture Options # @@ -341,10 +353,10 @@ CONFIG_SPI_EXCHANGE=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_SERIAL_REMOVABLE is not set -# CONFIG_SERIAL_CONSOLE is not set +CONFIG_SERIAL_CONSOLE=y # CONFIG_16550_UART is not set # CONFIG_UART_SERIALDRIVER is not set -# CONFIG_UART0_SERIALDRIVER is not set +CONFIG_UART0_SERIALDRIVER=y # CONFIG_UART1_SERIALDRIVER is not set # CONFIG_UART2_SERIALDRIVER is not set # CONFIG_UART3_SERIALDRIVER is not set @@ -365,12 +377,28 @@ CONFIG_SERIAL=y # CONFIG_USART7_SERIALDRIVER is not set # CONFIG_USART8_SERIALDRIVER is not set # CONFIG_OTHER_UART_SERIALDRIVER is not set -# CONFIG_MCU_SERIAL is not set +CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set # CONFIG_SERIAL_OFLOWCONTROL is not set # CONFIG_SERIAL_DMA is not set -# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_UART0_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART0 Configuration +# +CONFIG_UART0_RXBUFSIZE=256 +CONFIG_UART0_TXBUFSIZE=256 +CONFIG_UART0_BAUD=115200 +CONFIG_UART0_BITS=8 +CONFIG_UART0_PARITY=0 +CONFIG_UART0_2STOP=0 +# CONFIG_UART0_IFLOWCONTROL is not set +# CONFIG_UART0_OFLOWCONTROL is not set +# CONFIG_UART0_DMA is not set # CONFIG_PSEUDOTERM is not set # CONFIG_USBDEV is not set # CONFIG_USBHOST is not set @@ -385,7 +413,7 @@ CONFIG_STANDARD_SERIAL=y # CONFIG_RAMLOG is not set # CONFIG_SYSLOG_INTBUFFER is not set # CONFIG_SYSLOG_TIMESTAMP is not set -# CONFIG_SYSLOG_SERIAL_CONSOLE is not set +CONFIG_SYSLOG_SERIAL_CONSOLE=y # CONFIG_SYSLOG_CHAR is not set CONFIG_SYSLOG_CONSOLE=y # CONFIG_SYSLOG_NONE is not set @@ -566,10 +594,10 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024 CONFIG_EXAMPLES_NSH=y CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y # CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set # CONFIG_EXAMPLES_NXFFS is not set # CONFIG_EXAMPLES_NXHELLO is not set # CONFIG_EXAMPLES_NXIMAGE is not set -# CONFIG_EXAMPLES_NX is not set # CONFIG_EXAMPLES_NXLINES is not set # CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXTEXT is not set