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Squashed commit of the following:
arch/arm/src/tiva/cc13xx/cc13xx_prcm.c: Fix reverse bit modification: Set the bit to enabled clocking, clear the bit to dissable clocking.
arch/arm/src/tiva/cc13xx/cc13xx_enablepwr.c: Use correct index for determining if this the SERIAL or PERIPH power domain.
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@@ -20,15 +20,12 @@ Status
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of this board support is simply to assist in the CC13xx architecture
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development. Serious board development will occur later. Board
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support is missing LED and button support.
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2019-02-10: Figured out how to connect J-Link and began debug. First
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failure is in tiva_configgpio() while trying to configure the console
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UART pins. The failure is a hardfault apparently generated by:
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2019-02-10: Figured out how to connect J-Link and began debug.
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2019-02-12: Now hard-faults in tiva_lowsetup() here:
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109 regval = getreg32(TIVA_GPIO_DOE);
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352 ctl = getreg32(TIVA_CONSOLE_BASE + TIVA_UART_CTL_OFFSET);
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The GPIO base address and DOE register offset seem to be okay. Must
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be some issue with powering up the GPIO? The TI code calls Power_init()
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which has not yet be brought into NuttX. Could this be the issue?
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Most likely UART0 clocking is not being enabled correctly.
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Serial Console
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==============
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