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Fix various typos

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This commit is contained in:
Nathan Hartman
2019-09-03 17:00:22 -06:00
committed by Gregory Nutt
parent 38ada48454
commit ce8fb54d07
8 changed files with 15 additions and 15 deletions
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boards/arm/lpc43xx/bambino-200e/README.txt
+1 -1
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@@ -99,7 +99,7 @@ ports.
2. Lazy Floating Point Register Save.
An alternative mplementation only saves and restores FPU registers only
An alternative implementation only saves and restores FPU registers only
on context switches. This means: (1) floating point registers are not
stored on each context switch and, hence, possibly better interrupt
performance. But, (2) since floating point registers are not saved,
boards/arm/stm32/mikroe-stm32f4/README.txt
+1 -1
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@@ -141,7 +141,7 @@ There are two version of the FPU support built into the STM32 port.
2. Lazy Floating Point Register Save.
An alternative mplementation only saves and restores FPU registers only
An alternative implementation only saves and restores FPU registers only
on context switches. This means: (1) floating point registers are not
stored on each context switch and, hence, possibly better interrupt
performance. But, (2) since floating point registers are not saved,
boards/arm/stm32/stm3220g-eval/README.txt
+1 -1
View File
@@ -677,7 +677,7 @@ Where <subdir> is one of the following:
The WWDG watchdog is driven off the (fast) 42MHz PCLK1 and, as result,
has a maximum timeout value of 49 milliseconds. For WWDG watchdog, you
should also add the fillowing to the configuration file:
should also add the following to the configuration file:
CONFIG_EXAMPLES_WATCHDOG_PINGDELAY=20
CONFIG_EXAMPLES_WATCHDOG_TIMEOUT=49
boards/arm/stm32/stm3240g-eval/README.txt
+2 -2
View File
@@ -166,7 +166,7 @@ There are two version of the FPU support built into the STM32 port.
2. Lazy Floating Point Register Save.
An alternative mplementation only saves and restores FPU registers only
An alternative implementation only saves and restores FPU registers only
on context switches. This means: (1) floating point registers are not
stored on each context switch and, hence, possibly better interrupt
performance. But, (2) since floating point registers are not saved,
@@ -985,7 +985,7 @@ Where <subdir> is one of the following:
The WWDG watchdog is driven off the (fast) 42MHz PCLK1 and, as result,
has a maximum timeout value of 49 milliseconds. For WWDG watchdog, you
should also add the fillowing to the configuration file:
should also add the following to the configuration file:
CONFIG_EXAMPLES_WATCHDOG_PINGDELAY=20
CONFIG_EXAMPLES_WATCHDOG_TIMEOUT=49
boards/arm/stm32/stm32f3discovery/README.txt
+3 -3
View File
@@ -100,7 +100,7 @@ There are two version of the FPU support built into the STM32 port.
2. Lazy Floating Point Register Save.
An alternative mplementation only saves and restores FPU registers only
An alternative implementation only saves and restores FPU registers only
on context switches. This means: (1) floating point registers are not
stored on each context switch and, hence, possibly better interrupt
performance. But, (2) since floating point registers are not saved,
@@ -478,8 +478,8 @@ Where <subdir> is one of the following:
CONFIG_STM32_IWDG=y : Enables the IWDG timer facility (but not both)
The WWDG watchdog is driven off the (fast) 42MHz PCLK1 and, as result,
has a maximum timeout value of 49 milliseconds. for WWDG watchdog, you
should also add the fillowing to the configuration file:
has a maximum timeout value of 49 milliseconds. For WWDG watchdog, you
should also add the following to the configuration file:
CONFIG_EXAMPLES_WATCHDOG_PINGDELAY=20
CONFIG_EXAMPLES_WATCHDOG_TIMEOUT=49
boards/arm/stm32/stm32f429i-disco/README.txt
+2 -2
View File
@@ -268,7 +268,7 @@ There are two version of the FPU support built into the STM32 port.
2. Lazy Floating Point Register Save.
An alternative mplementation only saves and restores FPU registers only
An alternative implementation only saves and restores FPU registers only
on context switches. This means: (1) floating point registers are not
stored on each context switch and, hence, possibly better interrupt
performance. But, (2) since floating point registers are not saved,
@@ -776,7 +776,7 @@ Where <subdir> is one of the following:
The WWDG watchdog is driven off the (fast) 42MHz PCLK1 and, as result,
has a maximum timeout value of 49 milliseconds. for WWDG watchdog, you
should also add the fillowing to the configuration file:
should also add the following to the configuration file:
CONFIG_EXAMPLES_WATCHDOG_PINGDELAY=20
CONFIG_EXAMPLES_WATCHDOG_TIMEOUT=49
boards/arm/stm32/stm32f4discovery/README.txt
+3 -3
View File
@@ -321,7 +321,7 @@ There are two version of the FPU support built into the STM32 port.
2. Lazy Floating Point Register Save.
An alternative mplementation only saves and restores FPU registers only
An alternative implementation only saves and restores FPU registers only
on context switches. This means: (1) floating point registers are not
stored on each context switch and, hence, possibly better interrupt
performance. But, (2) since floating point registers are not saved,
@@ -1783,8 +1783,8 @@ Configuration Sub-directories
CONFIG_STM32_IWDG=y : Enables the IWDG timer facility (but not both)
The WWDG watchdog is driven off the (fast) 42MHz PCLK1 and, as result,
has a maximum timeout value of 49 milliseconds. for WWDG watchdog, you
should also add the fillowing to the configuration file:
has a maximum timeout value of 49 milliseconds. For WWDG watchdog, you
should also add the following to the configuration file:
CONFIG_EXAMPLES_WATCHDOG_PINGDELAY=20
CONFIG_EXAMPLES_WATCHDOG_TIMEOUT=49