Run codespell -w with the latest dictonary again

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
This commit is contained in:
Xiang Xiao
2020-02-23 16:50:23 +08:00
committed by Abdelatif Guettouche
parent 55a7dfc9a7
commit cde88cabcc
1532 changed files with 3117 additions and 3117 deletions
+2 -2
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@@ -57,14 +57,14 @@ config MISOC_UART
bool
config MISOC_UART_RX_BUF_SIZE
int "UART RX Bufer size"
int "UART RX Buffer size"
default 64
depends on MISOC_UART
---help---
Size of RX buffers for MISOC UARTs
config MISOC_UART_TX_BUF_SIZE
int "UART TX Bufer size"
int "UART TX Buffer size"
default 64
depends on MISOC_UART
---help---
+1 -1
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@@ -139,7 +139,7 @@ struct misoc_net_driver_s
static uint8_t g_pktbuf[MAX_NETDEV_PKTSIZE + CONFIG_NET_GUARDSIZE];
/* Driver state structur */
/* Driver state structure */
static struct misoc_net_driver_s g_misoc_net[CONFIG_MISOC_NET_NINTERFACES];
+1 -1
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@@ -344,7 +344,7 @@ static void misoc_detach(struct uart_dev_s *dev)
* interrupt received on the 'irq' It should call uart_transmitchars or
* uart_receivechar to perform the appropriate data transfers. The
* interrupt handling logic must be able to map the 'irq' number into the
* approprite uart_dev_s structure in order to call these functions.
* appropriate uart_dev_s structure in order to call these functions.
*
****************************************************************************/
+1 -1
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@@ -41,7 +41,7 @@
#include <arch/irq.h>
/****************************************************************************
* Pre-processor Defintions
* Pre-processor Definitions
****************************************************************************/
#define MINERVA_STACK_BASE _ebss