diff --git a/arch/arm/src/stm32f0/stm32f0_clockconfig.c b/arch/arm/src/stm32f0/stm32f0_clockconfig.c index 4a9407e706e..9d54e6133b7 100644 --- a/arch/arm/src/stm32f0/stm32f0_clockconfig.c +++ b/arch/arm/src/stm32f0/stm32f0_clockconfig.c @@ -69,16 +69,16 @@ void stm32f0_clockconfig(void) { - int regval; + uint32_t regval; - /* Verify if PLL is already setup, if so define to use HSI mode */ + /* Verify if PLL is already setup. If so configure to use HSI mode */ if ((getreg32(STM32F0_RCC_CFGR) & RCC_CFGR_SWS_MASK) == RCC_CFGR_SWS_PLL) { /* Select HSI mode */ regval = getreg32(STM32F0_RCC_CFGR); - regval &= (uint32_t) (~RCC_CFGR_SW_MASK); + regval &= ~RCC_CFGR_SW_MASK; putreg32(regval, STM32F0_RCC_CFGR); while ((getreg32(STM32F0_RCC_CFGR) & RCC_CFGR_SWS_MASK) != RCC_CFGR_SWS_HSI); @@ -87,7 +87,7 @@ void stm32f0_clockconfig(void) /* Disable the PLL */ regval = getreg32(STM32F0_RCC_CR); - regval &= (uint32_t)(~RCC_CR_PLLON); + regval &= ~RCC_CR_PLLON; putreg32(regval, STM32F0_RCC_CR); while ((getreg32(STM32F0_RCC_CR) & RCC_CR_PLLRDY) != 0); @@ -108,7 +108,7 @@ void stm32f0_clockconfig(void) /* Configure to use the PLL */ regval = getreg32(STM32F0_RCC_CFGR); - regval |= (uint32_t)(RCC_CFGR_SW_PLL); + regval |= RCC_CFGR_SW_PLL; putreg32(regval, STM32F0_RCC_CFGR); while ((getreg32(STM32F0_RCC_CFGR) & RCC_CFGR_SW_MASK) != RCC_CFGR_SW_PLL); } diff --git a/arch/arm/src/stm32f0/stm32f0_start.c b/arch/arm/src/stm32f0/stm32f0_start.c index a02fb464c70..6482dd47aa4 100644 --- a/arch/arm/src/stm32f0/stm32f0_start.c +++ b/arch/arm/src/stm32f0/stm32f0_start.c @@ -52,10 +52,7 @@ #include "stm32f0_clockconfig.h" #include "stm32f0_lowputc.h" - -#ifdef CONFIG_ARCH_FPU -# include "nvic.h" -#endif +#include "stm32f0_start.h" /**************************************************************************** * Pre-processor Definitions diff --git a/arch/arm/src/stm32f0/stm32f0_start.h b/arch/arm/src/stm32f0/stm32f0_start.h new file mode 100644 index 00000000000..dc1779a5d15 --- /dev/null +++ b/arch/arm/src/stm32f0/stm32f0_start.h @@ -0,0 +1,76 @@ +/************************************************************************************ + * arch/arm/src/stm32f0/stm32f0_start.h + * + * Copyright (C) 2017 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __ARCH_ARM_SRC_STM32F0_STM32F0_START_H +#define __ARCH_ARM_SRC_STM32F0_STM32F0_START_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ +#ifdef __cplusplus +extern "C" +{ +#endif + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32f0_boardinitialize + * + * Description: + * All STM32 architectures must provide the following entry point. This entry + * point is called early in the intitialization -- after all memory has been + * configured and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void stm32f0_boardinitialize(void); + +#ifdef __cplusplus +} +#endif +#endif /* __ASSEMBLY__ */ + +#endif /* __ARCH_ARM_SRC_STM32F0_STM32F0_START_H */ diff --git a/configs/stm32f0discovery/nsh/setenv.sh b/configs/stm32f0discovery/nsh/setenv.sh index f131c7cefb0..b8584be9c35 100644 --- a/configs/stm32f0discovery/nsh/setenv.sh +++ b/configs/stm32f0discovery/nsh/setenv.sh @@ -48,15 +48,20 @@ if [ -z "${PATH_ORIG}" ]; then export PATH_ORIG="${PATH}" fi -# This is the Cygwin path to the location where I installed the RIDE -# toolchain under windows. You will also have to edit this if you install -# the RIDE toolchain in any other location -#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Raisonance/Ride/arm-gcc/bin" - # This is the Cygwin path to the location where I installed the CodeSourcery # toolchain under windows. You will also have to edit this if you install # the CodeSourcery toolchain in any other location -export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +# export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# This is the location where I installed the ARM "GNU Tools for ARM Embedded Processors" +# You can this free toolchain here https://launchpad.net/gcc-arm-embedded +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/GNU Tools ARM Embedded/4.9 2015q2/bin" + +# This is the path to the location where I installed the devkitARM toolchain +# You can get this free toolchain from http://devkitpro.org/ or http://sourceforge.net/projects/devkitpro/ +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/devkitARM/bin" # These are the Cygwin paths to the locations where I installed the Atollic # toolchain under windows. You will also have to edit this if you install @@ -68,7 +73,7 @@ export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ # This is the Cygwin path to the location where I build the buildroot # toolchain. -#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" +# export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" # Add the path to the toolchain to the PATH varialble export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}"