Add clock initialization logic for the Nucleus2g boad

git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@2741 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo
2010-06-12 18:47:02 +00:00
parent d1246d9af7
commit cbfefda2f3
3 changed files with 74 additions and 0 deletions
+4
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@@ -286,6 +286,9 @@ Nucleus 2G Configuration Options
the delay actually is 100 seconds.
Individual subsystems can be enabled:
CONFIG_LPC17_MAINOSC=y
CONFIG_LPC17_PLL0=y
CONFIG_LPC17_PLL1=n
CONFIG_LPC17_ETHERNET=n
CONFIG_LPC17_USBHOST=n
CONFIG_LPC17_USBOTG=n
@@ -315,6 +318,7 @@ Nucleus 2G Configuration Options
CONFIG_LPC17_ADC=n
CONFIG_LPC17_DAC=n
CONFIG_LPC17_GPDMA=n
CONFIG_LP17_FLASH=n
LPC17xx specific device driver settings