diff --git a/arch/xtensa/src/esp32/Make.defs b/arch/xtensa/src/esp32/Make.defs
index 2c9c32c5d7f..e01a0615c77 100644
--- a/arch/xtensa/src/esp32/Make.defs
+++ b/arch/xtensa/src/esp32/Make.defs
@@ -53,7 +53,7 @@ CMN_CSRCS += xtensa_puts.c xtensa_releasepending.c xtensa_releasestack.c
 CMN_CSRCS += xtensa_reprioritizertr.c xtensa_schedsigaction.c
 CMN_CSRCS += xtensa_sigdeliver.c xtensa_stackframe.c xtensa_udelay.c
 CMN_CSRCS += xtensa_unblocktask.c xtensa_usestack.c
-CMN_CSRCS += esp32_systemreset.c
+CMN_CSRCS += esp32_systemreset.c esp32_resetcause.c
 
 # Configuration-dependent common XTENSA files
 
diff --git a/arch/xtensa/src/esp32/esp32_resetcause.c b/arch/xtensa/src/esp32/esp32_resetcause.c
new file mode 100644
index 00000000000..5f0c52e591c
--- /dev/null
+++ b/arch/xtensa/src/esp32/esp32_resetcause.c
@@ -0,0 +1,71 @@
+/****************************************************************************
+ * arch/xtensa/src/esp32/esp32_resetcause.c
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <stdint.h>
+
+#include <nuttx/arch.h>
+#include <nuttx/board.h>
+
+#include "xtensa.h"
+#include "hardware/esp32_rtccntl.h"
+
+#include "esp32_resetcause.h"
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: esp32_resetcause
+ *
+ * Description:
+ *   Get the cause of the last reset of the given CPU
+ *
+ ****************************************************************************/
+
+enum esp32_resetcause_e esp32_resetcause(int cpu)
+{
+  uint32_t regmask;
+  uint32_t regshift;
+  uint32_t regval;
+
+  regval = getreg32(RTC_CNTL_RESET_STATE_REG);
+
+#ifdef CONFIG_SMP
+  if (cpu != 0)
+    {
+      regmask = RTC_CNTL_RESET_CAUSE_APPCPU_M;
+      regshift = RTC_CNTL_RESET_CAUSE_APPCPU_S;
+    }
+  else
+#endif
+    {
+      regmask = RTC_CNTL_RESET_CAUSE_PROCPU_M;
+      regshift = RTC_CNTL_RESET_CAUSE_PROCPU_S;
+    }
+
+  return (regval & regmask) >> regshift;
+}
diff --git a/arch/xtensa/src/esp32/esp32_resetcause.h b/arch/xtensa/src/esp32/esp32_resetcause.h
new file mode 100644
index 00000000000..a0dd094fb6f
--- /dev/null
+++ b/arch/xtensa/src/esp32/esp32_resetcause.h
@@ -0,0 +1,54 @@
+/****************************************************************************
+ * arch/xtensa/src/esp32/esp32_resetcause.c
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Types
+ ****************************************************************************/
+
+enum esp32_resetcause_e
+{
+  ESP32_RESETCAUSE_SYS_CHIPPOR = 0x01,
+  ESP32_RESETCAUSE_SYS_RWDTSR  = 0x10,
+  ESP32_RESETCAUSE_SYS_BOR     = 0x0f,
+  ESP32_RESETCAUSE_CORE_SOFT   = 0x03,
+  ESP32_RESETCAUSE_CORE_DPSP   = 0x05,
+  ESP32_RESETCAUSE_CORE_MWDT0  = 0x07,
+  ESP32_RESETCAUSE_CORE_MWDT1  = 0x08,
+  ESP32_RESETCAUSE_CORE_RWDT   = 0x09,
+  ESP32_RESETCAUSE_CPU_MWDT0   = 0x0b,
+  ESP32_RESETCAUSE_CPU_SOFT    = 0x0c,
+  ESP32_RESETCAUSE_CPU_RWDT    = 0x0d,
+  ESP32_RESETCAUSE_CPU_PROCPU  = 0x0e
+};
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: esp32_resetcause
+ *
+ * Description:
+ *   Get the cause of the last reset of the given CPU
+ *
+ ****************************************************************************/
+
+enum esp32_resetcause_e esp32_resetcause(int cpu);
+
diff --git a/boards/xtensa/esp32/esp32-core/src/esp32_reset.c b/boards/xtensa/esp32/esp32-core/src/esp32_reset.c
index cd11e2213bf..926f3129657 100644
--- a/boards/xtensa/esp32/esp32-core/src/esp32_reset.c
+++ b/boards/xtensa/esp32/esp32-core/src/esp32_reset.c
@@ -30,7 +30,7 @@
 #ifdef CONFIG_BOARDCTL_RESET
 
 /****************************************************************************
- * Public functions
+ * Public Functions
  ****************************************************************************/
 
 /****************************************************************************