From c7fba383f64fae9d456d78a656125dc53e539753 Mon Sep 17 00:00:00 2001 From: patacongo Date: Tue, 9 Nov 2010 02:53:42 +0000 Subject: [PATCH] Fixes write to flash git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@3090 42af7a65-404d-4744-a932-0658087f49c3 --- configs/olimex-lpc1766stk/tools/olimex.cfg | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/configs/olimex-lpc1766stk/tools/olimex.cfg b/configs/olimex-lpc1766stk/tools/olimex.cfg index 977c7600882..c8b5f7028b0 100755 --- a/configs/olimex-lpc1766stk/tools/olimex.cfg +++ b/configs/olimex-lpc1766stk/tools/olimex.cfg @@ -42,8 +42,11 @@ if { [info exists CPUTAPID ] } { adapter_nsrst_delay 200 jtag_ntrst_delay 200 -#jtag newtap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID -swj_newdap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID +# LPC2000 & LPC1700 -> SRST causes TRST +reset_config trst_and_srst srst_pulls_trst + +#swj_newdap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID +jtag newtap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID set _TARGETNAME $_CHIPNAME.cpu target create $_TARGETNAME cortex_m3 -chain-position $_TARGETNAME @@ -62,7 +65,7 @@ flash bank $_FLASHNAME lpc2000 0x0 0x40000 0 0 $_TARGETNAME \ # Run with *real slow* clock by default since the # boot rom could have been playing with the PLL, so # we have no idea what clock the target is running at. -jtag_khz 10 +jtag_khz 100 $_TARGETNAME configure -event reset-init { # Do not remap 0x0000-0x0020 to anything but the flash (i.e. select