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xtensa/esp32: Make UART TX DMA depends on EXPERIMENTAL and adds caveats regarding its use

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This commit is contained in:
Sara Souza
2021-07-01 12:15:08 -03:00
committed by Xiang Xiao
parent 2abeba041d
commit c7bf5c7a1d
1 changed files with 27 additions and 0 deletions
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arch/xtensa/src/esp32/Kconfig
+27
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@@ -586,6 +586,15 @@ config ESP32_UART0_TXDMA
bool "Enable UART0 TX DMA" bool "Enable UART0 TX DMA"
select ARCH_DMA select ARCH_DMA
select UART0_TXDMA select UART0_TXDMA
depends on EXPERIMENTAL
---help---
Due to a hardware bug on the DMA used by the UART
only TX DMA can be used. RX DMA is not available.
And when TX DMA is working, RX can't work properly, even
without using DMA.
So, it's not possible to have full duplex when TX DMA is enabled
and for not losing RX data it's recommended to implement the use
of flow control while a TX DMA transfer is ongoing.
endif # ESP32_UART0 endif # ESP32_UART0
@@ -617,6 +626,15 @@ config ESP32_UART1_TXDMA
bool "Enable UART1 TX DMA" bool "Enable UART1 TX DMA"
select ARCH_DMA select ARCH_DMA
select UART1_TXDMA select UART1_TXDMA
depends on EXPERIMENTAL
---help---
Due to a hardware bug on the DMA used by the UART
only TX DMA can be used. RX DMA is not available.
And when TX DMA is working, RX can't work properly, even
without using DMA.
So, it's not possible to have full duplex when TX DMA is enabled
and for not losing rx data it's recommended to implement the use
of flow control while a TX DMA transfer is ongoing.
endif # ESP32_UART1 endif # ESP32_UART1
@@ -648,6 +666,15 @@ config ESP32_UART2_TXDMA
bool "Enable UART2 TX DMA" bool "Enable UART2 TX DMA"
select ARCH_DMA select ARCH_DMA
select UART2_TXDMA select UART2_TXDMA
depends on EXPERIMENTAL
---help---
Due to a hardware bug on the DMA used by the UART
only TX DMA can be used. RX DMA is not available.
And when TX DMA is working, RX can't work properly simultaneously, even
without using DMA.
So, it's not possible to have full duplex when TX DMA is enabled
and for not losing rx data it's recommended to implement the use
of flow control while a TX DMA transfer is ongoing.
endif # ESP32_UART2 endif # ESP32_UART2