From c7979ad49c35b2a1c1612238f2970022564071e0 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Sun, 22 May 2016 15:17:03 -0600 Subject: [PATCH] Update README and ChangeLog --- ChangeLog | 9 +++++++++ configs/sabre-6quad/README.txt | 2 ++ 2 files changed, 11 insertions(+) diff --git a/ChangeLog b/ChangeLog index 93a63325703..1e6adea239a 100755 --- a/ChangeLog +++ b/ChangeLog @@ -11750,6 +11750,15 @@ the watchdog driver by calling the appropriate, MCU-specific driver configuration function from your board initialization logic (2016-05-18). + * arch/srm/src/stm32l4: Add CAN support for STM32L4. From Sebastien + Lorquet (2016-05-19). + * arch/arm/src/samv7: Adds a JTAG config and ERASE config to Kconfig to + set the CCFG_SYSIO SYSIO Pins. From Davide Sidrane (2016-05-19). + * arch/sim/src: Enhance networking support for the simulation under Linux. + Includes updated support for Linux TUN/TAP, and the addition of support + for Linux bridge devices. From Steve (2016-05-20). + * configs/stm32f411e-disco: Add basic configuration for stm32f411e-disco + board with STM32F411VE chip. From Konstantin Berezenko (2016-05-20). * i.MX6 Sabre-6Quad: Basic SMP NSH configuration is now working. But this is probably only because the SMP NSH case does not stress the logic. There are know outstanding SMP issues as noted in the diff --git a/configs/sabre-6quad/README.txt b/configs/sabre-6quad/README.txt index 5f691b38725..58d507c5df7 100644 --- a/configs/sabre-6quad/README.txt +++ b/configs/sabre-6quad/README.txt @@ -512,6 +512,8 @@ Open Issues: Waiting on a cached copy of the spinlock may result in a hang or a failure to wait. +5. Do spinlocks need to go into a special "strongly ordered" memory region? + Configurations ==============