From c6a528ef11d3ef7863ef627e1709a3d21486c484 Mon Sep 17 00:00:00 2001 From: wangmingrong1 Date: Fri, 9 May 2025 12:45:53 +0800 Subject: [PATCH] spinlock: fix stxr instruction status register requirement error: unpredictable STXR instruction, status is also a source 99 | "stxr %w0, %1, [%2] \n" | ^ :5:10: note: instantiated into assembly here 5 | stxr w10, x10, [x9] Using w0 to pass the result can cause the "status register is also a source" problem, resulting in unpredictable behavior. Signed-off-by: wangmingrong1 --- arch/arm64/include/spinlock.h | 13 +++++++------ 1 file changed, 7 insertions(+), 6 deletions(-) diff --git a/arch/arm64/include/spinlock.h b/arch/arm64/include/spinlock.h index bba732e7fe8..3531e2a1057 100644 --- a/arch/arm64/include/spinlock.h +++ b/arch/arm64/include/spinlock.h @@ -91,18 +91,19 @@ typedef uint64_t spinlock_t; static inline_function spinlock_t up_testset(volatile spinlock_t *lock) { spinlock_t ret = SP_LOCKED; + spinlock_t tmp = 0; __asm__ __volatile__ ( "1: \n" - "ldaxr %0, [%2] \n" - "cmp %0, %1 \n" + "ldaxr %0, [%3] \n" + "cmp %0, %2 \n" "beq 2f \n" - "stxr %w0, %1, [%2] \n" - "cbnz %w0, 1b \n" + "stxr %w1, %2, [%3] \n" + "cbnz %w1, 1b \n" "2: \n" - : "+r" (ret) - : "r" (SP_LOCKED), "r" (lock) + : "=r" (ret) + : "r" (tmp), "r" (SP_LOCKED), "r" (lock) : "memory" );