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Updated to hymini-stm32v configuration from Laurent Latil
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@@ -4715,3 +4715,5 @@
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(Laurent Latil, 2013-5-14).
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(Laurent Latil, 2013-5-14).
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* arch/arm/src/stm32/chip/stm32f10xx_dma.h: Fix some bad DMA register
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* arch/arm/src/stm32/chip/stm32f10xx_dma.h: Fix some bad DMA register
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definitions. From Laurent Latil (2013-5-15).
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definitions. From Laurent Latil (2013-5-15).
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* configs/hymini-stm32v: Enable SDIO in nsh2 configuration; remove
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warning from src/up_ssd1289.c. From Laurent Latil (2013-5-15).
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@@ -843,7 +843,7 @@ CONFIG_NSH_CONSOLE=y
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#
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#
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# CONFIG_NSH_USBDEV_TRACE is not set
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# CONFIG_NSH_USBDEV_TRACE is not set
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# CONFIG_NSH_CONDEV is not set
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# CONFIG_NSH_CONDEV is not set
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# CONFIG_NSH_ARCHINIT is not set
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CONFIG_NSH_ARCHINIT=y
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#
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#
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# NxWidgets/NxWM
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# NxWidgets/NxWM
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@@ -292,7 +292,6 @@ static void init_lcd_backlight(void)
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{
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{
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uint16_t ccmr;
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uint16_t ccmr;
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uint16_t ccer;
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uint16_t ccer;
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uint16_t cr2;
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/* Configure PB5 as TIM3 CH2 output */
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/* Configure PB5 as TIM3 CH2 output */
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@@ -329,10 +328,6 @@ static void init_lcd_backlight(void)
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ccer &= ~ATIM_CCER_CC2E;
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ccer &= ~ATIM_CCER_CC2E;
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putreg16(ccer, STM32_TIM3_CCER);
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putreg16(ccer, STM32_TIM3_CCER);
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/* Get the TIM3 CR2 register value */
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cr2 = getreg16(STM32_TIM3_CR2);
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/* Select the Output Compare Mode Bits */
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/* Select the Output Compare Mode Bits */
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ccmr = getreg16(STM32_TIM3_CCMR1);
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ccmr = getreg16(STM32_TIM3_CCMR1);
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