diff --git a/arch/arm/src/tiva/chip/cc3200_memorymap.h b/arch/arm/src/tiva/chip/cc3200_memorymap.h index a48500f63d9..437dc646708 100644 --- a/arch/arm/src/tiva/chip/cc3200_memorymap.h +++ b/arch/arm/src/tiva/chip/cc3200_memorymap.h @@ -121,7 +121,7 @@ /* Crypto Base Addresses */ # define TIVA_TCP_DTHE_BASE (TIVA_CRYPTO_BASE + 0x0000) /* -0x0fff: TCP Checksum & DTHE regs */ -# define TIVA_CRC_BASE TIVA_TCP_DTHE_BASE +# define TIVA_CCM_BASE TIVA_TCP_DTHE_BASE # define TIVA_SHA_BASE (TIVA_CRYPTO_BASE + 0x5000) /* -0x5fff: MD5/SHA */ # define TIVA_AES_BASE (TIVA_CRYPTO_BASE + 0x7000) /* -0x7fff: AES */ # define TIVA_DES_BASE (TIVA_CRYPTO_BASE + 0x9000) /* -0x9fff: DES */ diff --git a/arch/arm/src/tiva/chip/tm4c129_syscontrol.h b/arch/arm/src/tiva/chip/tm4c129_syscontrol.h index d33bc262de3..5a4886ec6cc 100644 --- a/arch/arm/src/tiva/chip/tm4c129_syscontrol.h +++ b/arch/arm/src/tiva/chip/tm4c129_syscontrol.h @@ -469,7 +469,7 @@ /* CCM System Control Registers (CCM Control Offset) */ -#define TIVA_SYSCON_CCMCGREQ (TIVA_CRC_BASE+TIVA_SYSCON_CCMCGREQ_OFFSET) +#define TIVA_SYSCON_CCMCGREQ (TIVA_CCM_BASE+TIVA_SYSCON_CCMCGREQ_OFFSET) /* System Control Register Bit Definitions **************************************************/ /* System Control Registers (System Control Offset) */ diff --git a/arch/arm/src/tiva/chip/tm4c_memorymap.h b/arch/arm/src/tiva/chip/tm4c_memorymap.h index e1bb5a180c7..9d0945aaf62 100644 --- a/arch/arm/src/tiva/chip/tm4c_memorymap.h +++ b/arch/arm/src/tiva/chip/tm4c_memorymap.h @@ -450,7 +450,7 @@ /* Peripheral region 2 */ /* -0x2ffff: Reserved */ -# define TIVA_CRC_BASE (TIVA_PERIPH2_BASE + 0x30000) /* -0x30fff: CRC/Cryptographic Control */ +# define TIVA_CCM_BASE (TIVA_PERIPH2_BASE + 0x30000) /* -0x30fff: CRC/Cryptographic Control */ /* -0x33fff: Reserved */ # define TIVA_SHAMD5_BASE (TIVA_PERIPH2_BASE + 0x34000) /* -0x35fff: SHA/MD5 */ # define TIVA_AES_BASE (TIVA_PERIPH2_BASE + 0x36000) /* -0x37fff: AES */