PIC32MZ: Add support for a timer interrupt

This commit is contained in:
Gregory Nutt
2015-02-24 15:36:08 -06:00
parent 9ccc28b4d2
commit c461f7fe54
2 changed files with 8 additions and 1 deletions
+3 -1
View File
@@ -101,7 +101,9 @@
* - Timer 1 uses SOSC
*/
#undef BOARD_PBCLK3_ENABLE
#define BOARD_PBCLK3_ENABLE 1 /* Enable PBCLK3 */
#define BOARD_PB3DIV 4 /* Divider = 4 */
#define BOARD_PBCLK3 50000000 /* PBCLK3 frequency = 200MHz/4 = 50MHz */
/* PBCLK4
* Peripherals: Ports
+5
View File
@@ -103,6 +103,10 @@ CONFIG_PIC32MZ_T1=y
# CONFIG_PIC32MZ_T3 is not set
# CONFIG_PIC32MZ_T4 is not set
# CONFIG_PIC32MZ_T5 is not set
# CONFIG_PIC32MZ_T6 is not set
# CONFIG_PIC32MZ_T7 is not set
# CONFIG_PIC32MZ_T8 is not set
# CONFIG_PIC32MZ_T9 is not set
# CONFIG_PIC32MZ_IC1 is not set
# CONFIG_PIC32MZ_IC2 is not set
# CONFIG_PIC32MZ_IC3 is not set
@@ -142,6 +146,7 @@ CONFIG_PIC32MZ_UART1=y
# CONFIG_PIC32MZ_CAN2 is not set
# CONFIG_PIC32MZ_ETHERNET is not set
# CONFIG_PIC32MZ_CTMU is not set
# CONFIG_PIC32MZ_T1_SOSC is not set
#
# Device Configuration 0 (DEVCFG0)