diff --git a/arch/arm/src/stm32f7/chip/stm32_can.h b/arch/arm/src/stm32f7/chip/stm32_can.h
index 8de35e9f19c..97b298f2fe1 100644
--- a/arch/arm/src/stm32f7/chip/stm32_can.h
+++ b/arch/arm/src/stm32f7/chip/stm32_can.h
@@ -59,14 +59,7 @@
 #define CAN_RXMBOX1 0
 #define CAN_RXMBOX2 1
 
-/* Number of filters depends on silicon */
-
-#if defined(CONFIG_STM32_CONNECTIVITYLINE) || defined(CONFIG_STM32_STM32F20XX) || \
-    defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F4XXX)
 #  define CAN_NFILTERS 28
-#else
-#  define CAN_NFILTERS 14
-#endif
 
 /* Register Offsets *****************************************************************/
 
@@ -503,50 +496,28 @@
 /* CAN filter master register */
 
 #define CAN_FMR_FINIT             (1 << 0)  /* Bit 0: Filter Init Mode */
-#if defined(CONFIG_STM32_CONNECTIVITYLINE) || defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F4XXX)
 #  define CAN_FMR_CAN2SB_SHIFT    (8)       /* Bits 13-8: CAN2 start bank */
 #  define CAN_FMR_CAN2SB_MASK     (0x3f << CAN_FMR_CAN2SB_SHIFT)
-#endif
 
 /* CAN filter mode register */
 
-#if defined(CONFIG_STM32_CONNECTIVITYLINE) || defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F4XXX)
 #  define CAN_FM1R_FBM_SHIFT      (0)      /* Bits 13:0: Filter Mode */
 #  define CAN_FM1R_FBM_MASK       (0x3fff << CAN_FM1R_FBM_SHIFT)
-#else
-#  define CAN_FM1R_FBM_SHIFT      (0)      /* Bits 27:0: Filter Mode */
-#  define CAN_FM1R_FBM_MASK       (0x0fffffff << CAN_FM1R_FBM_SHIFT)
-#endif
 
 /* CAN filter scale register */
 
-#if defined(CONFIG_STM32_CONNECTIVITYLINE) || defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F4XXX)
 #  define CAN_FS1R_FSC_SHIFT      (0)      /* Bits 13:0: Filter Scale Configuration */
 #  define CAN_FS1R_FSC_MASK       (0x3fff << CAN_FS1R_FSC_SHIFT)
-#else
-#  define CAN_FS1R_FSC_SHIFT      (0)      /* Bits 27:0: Filter Scale Configuration */
-#  define CAN_FS1R_FSC_MASK       (0x0fffffff << CAN_FS1R_FSC_SHIFT)
-#endif
 
 /* CAN filter FIFO assignment register */
 
-#if defined(CONFIG_STM32_CONNECTIVITYLINE) || defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F4XXX)
 #  define CAN_FFA1R_FFA_SHIFT     (0)      /* Bits 13:0: Filter FIFO Assignment */
 #  define CAN_FFA1R_FFA_MASK      (0x3fff << CAN_FFA1R_FFA_SHIFT)
-#else
-#  define CAN_FFA1R_FFA_SHIFT     (0)      /* Bits 27:0: Filter FIFO Assignment */
-#  define CAN_FFA1R_FFA_MASK      (0x0fffffff << CAN_FFA1R_FFA_SHIFT)
-#endif
 
 /* CAN filter activation register */
 
-#if defined(CONFIG_STM32_CONNECTIVITYLINE) || defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F4XXX)
 #  define CAN_FA1R_FACT_SHIFT     (0)      /* Bits 13:0: Filter Active */
 #  define CAN_FA1R_FACT_MASK      (0x3fff << CAN_FA1R_FACT_SHIFT)
-#else
-#  define CAN_FA1R_FACT_SHIFT     (0)      /* Bits 27:0: Filter Active */
-#  define CAN_FA1R_FACT_MASK      (0x0fffffff << CAN_FA1R_FACT_SHIFT)
-#endif
 
 /************************************************************************************
  * Public Types
diff --git a/arch/arm/src/stm32f7/stm32_can.c b/arch/arm/src/stm32f7/stm32_can.c
index af3d768c011..3a8dfdf137e 100644
--- a/arch/arm/src/stm32f7/stm32_can.c
+++ b/arch/arm/src/stm32f7/stm32_can.c
@@ -1987,14 +1987,10 @@ static int stm32can_filterinit(FAR struct stm32_can_s *priv)
 
   /* Assign half the filters to CAN1, half to CAN2 */
 
-#if defined(CONFIG_STM32_CONNECTIVITYLINE) || \
-    defined(CONFIG_STM32_STM32F20XX) || \
-    defined(CONFIG_STM32_STM32F4XXX)
   regval  = stm32can_getfreg(priv, STM32_CAN_FMR_OFFSET);
   regval &= CAN_FMR_CAN2SB_MASK;
   regval |= (CAN_NFILTERS / 2) << CAN_FMR_CAN2SB_SHIFT;
   stm32can_putfreg(priv, STM32_CAN_FMR_OFFSET, regval);
-#endif
 
   /* Disable the filter */