diff --git a/configs/Kconfig b/configs/Kconfig index 43e876f8704..5fa3c184f26 100644 --- a/configs/Kconfig +++ b/configs/Kconfig @@ -790,15 +790,25 @@ config ARCH_BOARD_SAM4S_XPLAINED_PRO ---help--- The port of NuttX to the Atmel SAM4S-Xplained Pro development board. +config ARCH_BOARD_SAME70_XPLAINED + bool "Atmel SAME70 Xplained evaluation board" + depends on ARCH_CHIP_SAME70Q21 + select ARCH_HAVE_LEDS + select ARCH_HAVE_BUTTONS + select ARCH_HAVE_IRQBUTTONS + select ARCH_PHY_INTERRUPT if NETDEVICES + ---help--- + The port of NuttX to the Atmel SAME70 Xplained evaluation board. + config ARCH_BOARD_SAMV71_XULT - bool "Atmel SAMV71 Xplained Ultra evalutation board" + bool "Atmel SAMV71 Xplained Ultra evaluation board" depends on ARCH_CHIP_SAMV71Q21 select ARCH_HAVE_LEDS select ARCH_HAVE_BUTTONS select ARCH_HAVE_IRQBUTTONS select ARCH_PHY_INTERRUPT if NETDEVICES ---help--- - The port of NuttX to the Atmel SAMV71 Xplained Ultra evalutation board. + The port of NuttX to the Atmel SAMV71 Xplained Ultra evaluation board. config ARCH_BOARD_SHENZHOU bool "Shenzhou STM32F107 board" @@ -1309,6 +1319,7 @@ config ARCH_BOARD default "sam4l-xplained" if ARCH_BOARD_SAM4L_XPLAINED default "sam4s-xplained" if ARCH_BOARD_SAM4S_XPLAINED default "sam4s-xplained-pro" if ARCH_BOARD_SAM4S_XPLAINED_PRO + default "same70-xplained" if ARCH_BOARD_SAME70_XPLAINED default "samv71-xult" if ARCH_BOARD_SAMV71_XULT default "shenzhou" if ARCH_BOARD_SHENZHOU default "skp16c26" if ARCH_BOARD_SKP16C26 @@ -1634,6 +1645,9 @@ endif if ARCH_BOARD_SAM4S_XPLAINED_PRO source "configs/sam4s-xplained-pro/Kconfig" endif +if ARCH_BOARD_SAME70_XPLAINED +source "configs/same70-xplained/Kconfig" +endif if ARCH_BOARD_SAMV71_XULT source "configs/samv71-xult/Kconfig" endif diff --git a/configs/README.txt b/configs/README.txt index 4b418f2b480..a72939cd3a8 100644 --- a/configs/README.txt +++ b/configs/README.txt @@ -580,6 +580,9 @@ configs/sam4s-xplained configs/sam4s-xplained-pro The port of NuttX to the Atmel SAM4S-Xplained Pro development board. +configs/same70-xplained + The port of NuttX to the Atmel SAME70 Xplained evaluation board. + configs/samv71-xult The port of NuttX to the Atmel SAMV71 Xplained Ultra evaluation board. diff --git a/configs/same70-xplained/Kconfig b/configs/same70-xplained/Kconfig new file mode 100644 index 00000000000..95ffaaa0fff --- /dev/null +++ b/configs/same70-xplained/Kconfig @@ -0,0 +1,37 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_SAME70_XPLAINED + +config SAME70XPLAINED_HSMCI0_AUTOMOUNT + bool "HSMCI0 automounter" + default n + depends on FS_AUTOMOUNTER && SAMA5_HSMCI0 + +if SAME70XPLAINED_HSMCI0_AUTOMOUNT + +config SAME70XPLAINED_HSMCI0_AUTOMOUNT_FSTYPE + string "HSMCI0 file system type" + default "vfat" + +config SAME70XPLAINED_HSMCI0_AUTOMOUNT_BLKDEV + string "HSMCI0 block device" + default "/dev/mmcsd0" + +config SAME70XPLAINED_HSMCI0_AUTOMOUNT_MOUNTPOINT + string "HSMCI0 mount point" + default "/mnt/sdcard0" + +config SAME70XPLAINED_HSMCI0_AUTOMOUNT_DDELAY + int "HSMCI0 debounce delay (milliseconds)" + default 1000 + +config SAME70XPLAINED_HSMCI0_AUTOMOUNT_UDELAY + int "HSMCI0 unmount retry delay (milliseconds)" + default 2000 + +endif # SAME70XPLAINED_HSMCI0_AUTOMOUNT + +endif # ARCH_BOARD_SAME70_XPLAINED diff --git a/configs/same70-xplained/README.txt b/configs/same70-xplained/README.txt new file mode 100644 index 00000000000..0d8f87e8069 --- /dev/null +++ b/configs/same70-xplained/README.txt @@ -0,0 +1,1344 @@ +README +====== + +This README file discusses the port of NuttX to the Atmel SAM E70 Xplained +Evaluation Kit (SAME70-XPLD). This board features the ATSAMV70Q21 Cortex-M7 +microcontroller. + +Contents +======== + + - Status/Open Issues + - Serial Console + - SD card + - Automounter + - LEDs and Buttons + - AT24MAC402 Serial EEPROM + - Program FLASH Access + - Networking + - USBHS Device Controller Driver + - MCAN1 Loopback Test + - SPI Slave + - Debugging + - Configurations + +Status/Open Issues +================== + +To be provided + +Serial Console +============== + +The SAME70-XPLD has no on-board RS-232 drivers so it will be necessary to +use either the VCOM or an external RS-232 driver. Here are some options. + + - Arduino Serial Shield: One option is to use an Arduino-compatible + serial shield. This will use the RXD and TXD signals available at pins + 0 an 1, respectively, of the Arduino "Digital Low" connector. On the + SAME70-XPLD board, this corresponds to UART3: + + ------ ------ ------- ------- -------- + Pin on SAME70 Arduino Arduino SAME70 + J503 PIO Name Pin Function + ------ ------ ------- ------- -------- + 1 PD28 RX0 0 URXD3 + 2 PD30 TX0 1 UTXD3 + ------ ------ ------- ------- -------- + + In this configuration, an external RS232 driver can also be used + instead of the shield. Simply connext as follows: + + --------- ----------- + Arduino RS-232 + Pin Label Connection + --------- ----------- + D0 (RXD) RX + D1 (TXD) TX + GND GND + 5VO Vcc + --------- ----------- + + - Arduino Communications. Additional UART/USART connections are available + on the Arduino Communications connection J505: + + ------ ------ ------- ------- -------- + Pin on SAME70 Arduino Arduino SAME70 + J503 PIO Name Pin Function + ------ ------ ------- ------- -------- + 3 PD18 RX1 0 URXD4 + 4 PD19 TX1 0 UTXD4 + 5 PD15 RX2 0 RXD2 + 6 PD16 TX2 0 TXD2 + 7 PB0 RX3 0 RXD0 + 8 PB1 TX3 1 TXD0 + ------ ------ ------- ------- -------- + + - SAMV7-XULT EXTn connectors. USART pins are also available the EXTn + connectors. The following are labelled in the User Guide for USART + functionality: + + ---- -------- ------ -------- + EXT1 EXTI1 SAME70 SAME70 + Pin Name PIO Function + ---- -------- ------ -------- + 13 USART_RX PB00 RXD0 + 14 USART_TX PB01 TXD0 + + ---- -------- ------ -------- + EXT2 EXTI2 SAME70 SAME70 + Pin Name PIO Function + ---- -------- ------ -------- + 13 USART_RX PA21 RXD1 + 14 USART_TX PB04 TXD1 + + - VCOM. The Virtual Com Port gateway is available on USART1: + + ------ -------- + SAME70 SAME70 + PIO Function + ------ -------- + PB04 TXD1 + PA21 RXD1 + ------ -------- + +Any of these options can be selected as the serial console by: + + 1. Enabling the UART/USART peripheral in the + "System Type -> Peripheral Selection" menu, then + 2. Configuring the peripheral in the "Drivers -> Serial Configuration" + menu. + +SD Card +======= + +Card Slot +--------- +The SAM E70 Xplained has one standard SD card connector that is connected to +the High Speed Multimedia Card Interface (HSMCI) of the SAM +E70. SD card connector: + + ------ ----------------- --------------------- + SAME70 SAME70 Shared functionality + Pin Function + ------ ----------------- --------------------- + PA30 MCDA0 (DAT0) + PA31 MCDA1 (DAT1) + PA26 MCDA2 (DAT2) + PA27 MCDA3 (DAT3) Camera + PA25 MCCK (CLK) Shield + PA28 MCCDA (CMD) + PD18 Card Detect (C/D) Shield + ------ ----------------- --------------------- + +Configuration Settings +---------------------- +Enabling HSMCI support. The SAMV7-XULT provides a one, full-size SD memory +card slots. The full size SD card slot connects via HSMCI0. Support for +the SD slots can be enabled with the following settings: + + System Type->SAMV7 Peripheral Selection + CONFIG_SAMV7_HSMCI0=y : To enable HSMCI0 support + CONFIG_SAMV7_XDMAC=y : XDMAC is needed by HSMCI0/1 + + System Type + CONFIG_SAMV7_GPIO_IRQ=y : PIO interrupts needed + CONFIG_SAMV7_GPIOD_IRQ=y : Card detect pin is on PD18 + + Device Drivers -> MMC/SD Driver Support + CONFIG_MMCSD=y : Enable MMC/SD support + CONFIG_MMSCD_NSLOTS=1 : One slot per driver instance + CONFIG_MMCSD_MULTIBLOCK_DISABLE=y : (REVISIT) + CONFIG_MMCSD_HAVECARDDETECT=y : Supports card-detect PIOs + CONFIG_MMCSD_MMCSUPPORT=n : Interferes with some SD cards + CONFIG_MMCSD_SPI=n : No SPI-based MMC/SD support + CONFIG_MMCSD_SDIO=y : SDIO-based MMC/SD support + CONFIG_SDIO_DMA=y : Use SDIO DMA + CONFIG_SDIO_BLOCKSETUP=y : Needs to know block sizes + + RTOS Features -> Work Queue Support + CONFIG_SCHED_WORKQUEUE=y : Driver needs work queue support + + Application Configuration -> NSH Library + CONFIG_NSH_ARCHINIT=y : NSH board-initialization, OR + CONFIG_BOARD_INITIALIZE=y + +Using the SD card +----------------- + +1) After booting, the HSCMI device will appear as /dev/mmcsd0. + +2) If you try mounting an SD card with nothing in the slot, the mount will + fail: + + nsh> mount -t vfat /dev/mmcsd0 /mnt/sd0 + nsh: mount: mount failed: 19 + + NSH can be configured to provide errors as strings instead of + numbers. But in this case, only the error number is reported. The + error numbers can be found in nuttx/include/errno.h: + + #define ENODEV 19 + #define ENODEV_STR "No such device" + + So the mount command is saying that there is no device or, more + correctly, that there is no card in the SD card slot. + +3) Inserted the SD card. Then the mount should succeed. + + nsh> mount -t vfat /dev/mmcsd0 /mnt/sd0 + nsh> ls /mnt/sd1 + /mnt/sd1: + atest.txt + nsh> cat /mnt/sd1/atest.txt + This is a test + + NOTE: See the next section entitled "Auto-Mounter" for another way + to mount your SD card. + +4) Before removing the card, you must umount the file system. This is + equivalent to "ejecting" or "safely removing" the card on Windows: It + flushes any cached data to an SD card and makes the SD card unavailable + to the applications. + + nsh> umount -t /mnt/sd0 + + It is now safe to remove the card. NuttX provides into callbacks + that can be used by an application to automatically unmount the + volume when it is removed. But those callbacks are not used in + these configurations. + +Auto-Mounter +============ + + NuttX implements an auto-mounter than can make working with SD cards + easier. With the auto-mounter, the file system will be automatically + mounted when the SD card is inserted into the HSMCI slot and automatically + unmounted when the SD card is removed. + + Here is a sample configuration for the auto-mounter: + + File System Configuration + CONFIG_FS_AUTOMOUNTER=y + + Board-Specific Options + CONFIG_SAME70XPLAINED_HSMCI0_AUTOMOUNT=y + CONFIG_SAME70XPLAINED_HSMCI0_AUTOMOUNT_FSTYPE="vfat" + CONFIG_SAME70XPLAINED_HSMCI0_AUTOMOUNT_BLKDEV="/dev/mmcsd0" + CONFIG_SAME70XPLAINED_HSMCI0_AUTOMOUNT_MOUNTPOINT="/mnt/sdcard" + CONFIG_SAME70XPLAINED_HSMCI0_AUTOMOUNT_DDELAY=1000 + CONFIG_SAME70XPLAINED_HSMCI0_AUTOMOUNT_UDELAY=2000 + + WARNING: SD cards should never be removed without first unmounting + them. This is to avoid data and possible corruption of the file + system. Certainly this is the case if you are writing to the SD card + at the time of the removal. If you use the SD card for read-only access, + however, then I cannot think of any reason why removing the card without + mounting would be harmful. + +LEDs and Buttons +================ + +LEDs +---- +There are two yellow LED available on the SAM E70 Xplained board that can be +turned on and off. The LEDs can be activated by driving the connected I/O +line to GND. + + ------ ----------- --------------------- + SAME70 Function Shared functionality + PIO + ------ ----------- --------------------- + PA23 Yellow LED0 EDBG GPIO + PC09 Yellow LED1 LCD, and Shield + ------ ----------- --------------------- + +These LEDs are not used by the board port unless CONFIG_ARCH_LEDS is +defined. In that case, the usage by the board port is defined in +include/board.h and src/sam_autoleds.c. The LEDs are used to encode +OS-related events as follows: + + ------------------- ----------------------- -------- -------- + SYMBOL Meaning LED state + LED0 LED1 + ------------------- ----------------------- -------- -------- + LED_STARTED NuttX has been started OFF OFF + LED_HEAPALLOCATE Heap has been allocated OFF OFF + LED_IRQSENABLED Interrupts enabled OFF OFF + LED_STACKCREATED Idle stack created ON OFF + LED_INIRQ In an interrupt No change + LED_SIGNAL In a signal handler No change + LED_ASSERTION An assertion failed No change + LED_PANIC The system has crashed N/C Blinking + LED_IDLE MCU is is sleep mode Not used + ------------------- ----------------------- -------- -------- + +Thus if LED0 is statically on, NuttX has successfully booted and is, +apparently, running normally. If LED1 is flashing at approximately +2Hz, then a fatal error has been detected and the system has halted. + +NOTE: That LED0 is not used after completion of booting and may +be used by other board-specific logic. + +Buttons +------- +SAM E70 Xplained contains three mechanical buttons. One button is the RESET +button connected to the SAM E70 reset line and the others are generic user +configurable buttons. When a button is pressed it will drive the I/O line +to GND. + + ------ ----------- --------------------- + SAME70 Function Shared functionality + PIO + ------ ----------- --------------------- + RESET RESET Trace, Shield, and EDBG + PA09 SW0 EDBG GPIO and Camera + PB12 SW1 EDBG SWD and Chip Erase + ------ ----------- --------------------- + +NOTES: + + - There are no pull-up resistors connected to the generic user buttons so + it is necessary to enable the internal pull-up in the SAM E70 to use the + button. + - PB12 is set up as a system flash ERASE pin when the firmware boots. To + use the SW1, PB12 has to be configured as a normal regular I/O pin in + the MATRIX module. For more information see the SAM E70 datasheet. + +AT24MAC402 Serial EEPROM +======================== + +Ethernet MAC Address +-------------------- +The SAM E70 Xplained features one external AT24MAC402 serial EEPROM with an +EIA-48 MAC address connected to the SAM E70 through I2C. This device +contains a MAC address for use with the Ethernet interface. + +Connectivity: + + ------ -------- -------- ------------------------------------------ + SAME70 SAME70 I2C Shared + Pin Function Function Functionality + ------ -------- -------- ------------------------------------------ + PA03 TWID0 SDA EXT1, EXT2, EDBG I2C, LCD, Camera, and + Shield + PA04 TWICK0 SCL EXT1, EXT2, EDBG I2C, LCD, Camera, and, + Shield + ------ -------- -------- ------------------------------------------ + +I2C address: + + The 7-bit addresses of the AT24 part are 0b1010AAA for the normal 2Kbit + memory and 0b1011aaa for the "extended memory" where aaa is the state of + the A0, A1, and A3 pins on the part. On the SAME70-XPLD board, these + are all pulled high so the full, 7-bit address is 0x5f. + +Configuration +------------- + + System Type -> SAMV7 Peripheral Support + CONFIG_SAMV7_TWIHS0=y : Used to access the EEPROM + CONFIG_SAMV7_TWIHS0_FREQUENCY=100000 + + Device drivers -> Memory Technology Devices + CONFIG_MTD_AT24XX=y : Enable the AT24 device driver + CONFIG_AT24XX_SIZE=2 : Normal EEPROM is 2Kbit (256b) + CONFIG_AT24XX_ADDR=0x57 : Normal EEPROM address */ + CONFIG_AT24XX_EXTENDED=y : Supports an extended memory region + CONFIG_AT24XX_EXTSIZE=160 : Extended address up to 0x9f + +MTD Configuration Data +---------------------- +The AT24 EEPROM can also be used to storage of up to 256 bytes of +configuration data: + + Device drivers -> Memory Technology Devices + +The configuration data device will appear at /dev/config. + +Networking +========== + +KSZ8061RNBVA Connections +------------------------ + + ------ --------- --------- -------------------------- + SAME70 SAME70 Ethernet Shared functionality + Pin Function Function + ------ --------- --------- -------------------------- + PD00 GTXCK REF_CLK Shield + PD01 GTXEN TXEN + PD02 GTX0 TXD0 + PD03 GTX1 TXD1 + PD04 GRXDV CRS_DV Trace + PD05 GRX0 RXD0 Trace + PD06 GRX1 RXD1 Trace + PD07 GRXER RXER Trace + PD08 GMDC MDC Trace + PD09 GMDIO MDIO + PA19 GPIO INTERRUPT EXT1, Shield + PA29 GPIO SIGDET + PC10 GPIO RESET + ------ --------- --------- -------------------------- + +Selecting the GMAC peripheral +----------------------------- + + System Type -> SAMV7 Peripheral Support + CONFIG_SAMV7_EMAC0=y : Enable the GMAC peripheral (aka, EMAC0) + CONFIG_SAMV7_TWIHS0=y : We will get the MAC address from the AT24 EEPROM + CONFIG_SAMV7_TWIHS0_FREQUENCY=100000 + + System Type -> EMAC device driver options + CONFIG_SAMV7_EMAC0_NRXBUFFERS=16 : Set aside some RS and TX buffers + CONFIG_SAMV7_EMAC0_NTXBUFFERS=8 + CONFIG_SAMV7_EMAC0_RMII=y : The RMII interfaces is used on the board + CONFIG_SAMV7_EMAC0_AUTONEG=y : Use autonegotiation + CONFIG_SAMV7_EMAC0_PHYADDR=1 : KSZ8061 PHY is at address 1 + CONFIG_SAMV7_EMAC0_PHYSR=30 : Address of PHY status register on KSZ8061 + CONFIG_SAMV7_EMAC0_PHYSR_ALTCONFIG=y : Needed for KSZ8061 + CONFIG_SAMV7_EMAC0_PHYSR_ALTMODE=0x7 : " " " " " " + CONFIG_SAMV7_EMAC0_PHYSR_10HD=0x1 : " " " " " " + CONFIG_SAMV7_EMAC0_PHYSR_100HD=0x2 : " " " " " " + CONFIG_SAMV7_EMAC0_PHYSR_10FD=0x5 : " " " " " " + CONFIG_SAMV7_EMAC0_PHYSR_100FD=0x6 : " " " " " " + + PHY selection. Later in the configuration steps, you will need to select + the KSZ8061 PHY for EMAC (See below) + + Networking Support + CONFIG_NET=y : Enable Neworking + CONFIG_NET_NOINTS=y : Use the work queue, not interrupts for processing + CONFIG_NET_SOCKOPTS=y : Enable socket operations + CONFIG_NET_ETH_MTU=562 : Maximum packet size (MTU) 1518 is more standard + CONFIG_NET_ETH_TCP_RECVWNDO=562 : Should be the same as CONFIG_NET_ETH_MTU + CONFIG_NET_ARP=y : ARP support should be enabled + CONFIG_NET_ARP_SEND=y : Use ARP to get peer address before sending + CONFIG_NET_TCP=y : Enable TCP/IP networking + CONFIG_NET_TCPBACKLOG=y : Support TCP/IP backlog + CONFIG_NET_TCP_READAHEAD=y : Enable TCP read-ahead buffering + CONFIG_NET_TCP_WRITE_BUFFERS=y : Enable TCP write buffering + CONFIG_NET_UDP=y : Enable UDP networking + CONFIG_NET_BROADCAST=y : Support UDP broadcase packets + CONFIG_NET_ICMP=y : Enable ICMP networking + CONFIG_NET_ICMP_PING=y : Needed for NSH ping command + : Defaults should be okay for other options + Device drivers -> Network Device/PHY Support + CONFIG_NETDEVICES=y : Enabled PHY selection + CONFIG_ETH0_PHY_KSZ8061=y : Select the KSZ8061 PHY used with EMAC0 + + Device drivers -> Memory Technology Devices + CONFIG_MTD_AT24XX=y : Enable the AT24 device driver + CONFIG_AT24XX_SIZE=2 : Normal EEPROM is 2Kbit (256b) + CONFIG_AT24XX_ADDR=0x57 : Normal EEPROM address */ + CONFIG_AT24XX_EXTENDED=y : Supports an extended memory region + CONFIG_AT24XX_EXTSIZE=160 : Extended address up to 0x9f + + RTOS Features ->Work Queue Support + CONFIG_SCHED_WORKQUEUE=y : Work queue support is needed + CONFIG_SCHED_HPWORK=y + CONFIG_SCHED_HPWORKSTACKSIZE=2048 : Might need to be increased + + Application Configuration -> Network Utilities + CONFIG_NETDB_DNSCLIENT=y : Enable host address resolution + CONFIG_NETUTILS_TELNETD=y : Enable the Telnet daemon + CONFIG_NETUTILS_TFTPC=y : Enable TFTP data file transfers for get and put commands + CONFIG_NETUTILS_NETLIB=y : Network library support is needed + CONFIG_NETUTILS_WEBCLIENT=y : Needed for wget support + : Defaults should be okay for other options + Application Configuration -> NSH Library + CONFIG_NSH_TELNET=y : Enable NSH session via Telnet + CONFIG_NSH_IPADDR=0x0a000002 : Select an IP address + CONFIG_NSH_DRIPADDR=0x0a000001 : IP address of gateway/host PC + CONFIG_NSH_NETMASK=0xffffff00 : Netmask + CONFIG_NSH_NOMAC=n : We will get the IP address from EEPROM + : Defaults should be okay for other options + +Cache-Related Issues +-------------------- + +I- and D-Caches can be enabled but the D-Cache must be enabled in write- +through mode. This is to work around issues with the RX and TX descriptors +with are 8-bytes in size. But the D-Cache cache line size is 32-bytes. +That means that you cannot reload, clean or invalidate a descriptor without +also effecting three neighboring descriptors. Setting write through mode +eliminates the need for cleaning the D-Cache. If only reloading and +invalidating are done, then there is no problem. + +Using the network with NSH +-------------------------- + +So what can you do with this networking support? First you see that +NSH has several new network related commands: + + ifconfig, ifdown, ifup: Commands to help manage your network + get and put: TFTP file transfers + wget: HTML file transfers + ping: Check for access to peers on the network + Telnet console: You can access the NSH remotely via telnet. + +You can also enable other add on features like full FTP or a Web +Server or XML RPC and others. There are also other features that +you can enable like DHCP client (or server) or network name +resolution. + +By default, the IP address of the SAME70-XPLD will be 10.0.0.2 and +it will assume that your host is the gateway and has the IP address +10.0.0.1. + + nsh> ifconfig + eth0 HWaddr 00:e0:de:ad:be:ef at UP + IPaddr:10.0.0.2 DRaddr:10.0.0.1 Mask:255.255.255.0 + +You can use ping to test for connectivity to the host (Careful, +Window firewalls usually block ping-related ICMP traffic). On the +target side, you can: + + nsh> ping 10.0.0.1 + PING 10.0.0.1 56 bytes of data + 56 bytes from 10.0.0.1: icmp_seq=1 time=0 ms + 56 bytes from 10.0.0.1: icmp_seq=2 time=0 ms + 56 bytes from 10.0.0.1: icmp_seq=3 time=0 ms + 56 bytes from 10.0.0.1: icmp_seq=4 time=0 ms + 56 bytes from 10.0.0.1: icmp_seq=5 time=0 ms + 56 bytes from 10.0.0.1: icmp_seq=6 time=0 ms + 56 bytes from 10.0.0.1: icmp_seq=7 time=0 ms + 56 bytes from 10.0.0.1: icmp_seq=8 time=0 ms + 56 bytes from 10.0.0.1: icmp_seq=9 time=0 ms + 56 bytes from 10.0.0.1: icmp_seq=10 time=0 ms + 10 packets transmitted, 10 received, 0% packet loss, time 10100 ms + +NOTE: In this configuration is is normal to have packet loss > 0% +the first time you ping due to the default handling of the ARP +table. + +On the host side, you should also be able to ping the SAME70-XPLD: + + $ ping 10.0.0.2 + +You can also log into the NSH from the host PC like this: + + $ telnet 10.0.0.2 + Trying 10.0.0.2... + Connected to 10.0.0.2. + Escape character is '^]'. + sh_telnetmain: Session [3] Started + + NuttShell (NSH) NuttX-7.9 + nsh> help + help usage: help [-v] [] + + [ echo ifconfig mkdir mw sleep + ? exec ifdown mkfatfs ping test + cat exit ifup mkfifo ps umount + cp free kill mkrd put usleep + cmp get losetup mh rm wget + dd help ls mount rmdir xd + df hexdump mb mv sh + + Builtin Apps: + nsh> + +NOTE: If you enable this feature, you experience a delay on booting. +That is because the start-up logic waits for the network connection +to be established before starting NuttX. In a real application, you +would probably want to do the network bringup on a separate thread +so that access to the NSH prompt is not delayed. + +This delay will be especially long if the board is not connected to +a network. On the order of a minute! You will probably think that +NuttX has crashed! And then, when it finally does come up, the +network will not be available. + +Network Initialization Thread +----------------------------- +There is a configuration option enabled by CONFIG_NSH_NETINIT_THREAD +that will do the NSH network bring-up asynchronously in parallel on +a separate thread. This eliminates the (visible) networking delay +altogether. This networking initialization feature by itself has +some limitations: + + - If no network is connected, the network bring-up will fail and + the network initialization thread will simply exit. There are no + retries and no mechanism to know if the network initialization was + successful. + + - Furthermore, there is no support for detecting loss of the network + connection and recovery of networking when the connection is restored. + +Both of these shortcomings can be eliminated by enabling the network +monitor: + +Network Monitor +--------------- +By default the network initialization thread will bring-up the network +then exit, freeing all of the resources that it required. This is a +good behavior for systems with limited memory. + +If the CONFIG_NSH_NETINIT_MONITOR option is selected, however, then the +network initialization thread will persist forever; it will monitor the +network status. In the event that the network goes down (for example, if +a cable is removed), then the thread will monitor the link status and +attempt to bring the network back up. In this case the resources +required for network initialization are never released. + +Pre-requisites: + + - CONFIG_NSH_NETINIT_THREAD as described above. + + - CONFIG_NETDEV_PHY_IOCTL. Enable PHY IOCTL commands in the Ethernet + device driver. Special IOCTL commands must be provided by the Ethernet + driver to support certain PHY operations that will be needed for link + management. There operations are not complex and are implemented for + the Atmel SAMV7 family. + + - CONFIG_ARCH_PHY_INTERRUPT. This is not a user selectable option. + Rather, it is set when you select a board that supports PHY interrupts. + In most architectures, the PHY interrupt is not associated with the + Ethernet driver at all. Rather, the PHY interrupt is provided via some + board-specific GPIO and the board-specific logic must provide support + for that GPIO interrupt. To do this, the board logic must do two things: + (1) It must provide the function arch_phy_irq() as described and + prototyped in the nuttx/include/nuttx/arch.h, and (2) it must select + CONFIG_ARCH_PHY_INTERRUPT in the board configuration file to advertise + that it supports arch_phy_irq(). This logic can be found at + nuttx/configs/sama5d4-ek/src/sam_ethernet.c. + + - And a few other things: UDP support is required (CONFIG_NET_UDP) and + signals must not be disabled (CONFIG_DISABLE_SIGNALS). + +Given those prerequisites, the network monitor can be selected with these +additional settings. + + Networking Support -> Networking Device Support + CONFIG_NETDEV_PHY_IOCTL=y : Enable PHY ioctl support + + Application Configuration -> NSH Library -> Networking Configuration + CONFIG_NSH_NETINIT_THREAD : Enable the network initialization thread + CONFIG_NSH_NETINIT_MONITOR=y : Enable the network monitor + CONFIG_NSH_NETINIT_RETRYMSEC=2000 : Configure the network monitor as you like + CONFIG_NSH_NETINIT_SIGNO=18 + +USBHS Device Controller Driver +============================== +The USBHS device controller driver is enabled with he following configuration +settings: + + Device Drivers -> USB Device Driver Support + CONFIG_USBDEV=y : Enable USB device support + For full-speed/low-power mode: + CONFIG_USBDEV_DUALSPEED=n : Disable High speed support + For high-speed/normal mode: + CONFIG_USBDEV_DUALSPEED=y : Enable High speed support + CONFIG_USBDEV_DMA=y : Enable DMA methods + CONFIG_USBDEV_MAXPOWER=100 : Maximum power consumption + CONFIG_USBDEV_SELFPOWERED=y : Self-powered device + + System Type -> SAMV7 Peripheral Selection + CONFIG_SAMV7_USBDEVHS=y + + System Type -> SAMV7 USB High Sppeed Device Controller (DCD options + For full-speed/low-power mode: + CONFIG_SAMV7_USBDEVHS_LOWPOWER=y : Select low power mode + For high-speed/normal mode: + CONFIG_SAMV7_USBDEVHS_LOWPOWER=n : Don't select low power mode + CONFIG_SAMV7_USBHS_NDTDS=32 : Number of DMA transfer descriptors + CONFIG_SAMV7_USBHS_PREALLOCATE=y : Pre-allocate descriptors + +In order to be usable, you must all enabled some class driver(s) for the +USBHS device controller. Here, for example, is how to configure the CDC/ACM +serial device class: + + Device Drivers -> USB Device Driver Support + CONFIG_CDCACM=y : USB Modem (CDC ACM) support + CONFIG_CDCACM_EP0MAXPACKET=64 : Enpoint 0 packet size + CONFIG_CDCACM_EPINTIN=1 : Interrupt IN endpoint number + CONFIG_CDCACM_EPINTIN_FSSIZE=64 : Full speed packet size + CONFIG_CDCACM_EPINTIN_HSSIZE=64 : High speed packet size + CONFIG_CDCACM_EPBULKOUT=3 : Bulk OUT endpoint number + CONFIG_CDCACM_EPBULKOUT_FSSIZE=64 : Full speed packet size + CONFIG_CDCACM_EPBULKOUT_HSSIZE=512 : High speed packet size + CONFIG_CDCACM_EPBULKIN=2 : Bulk IN endpoint number + CONFIG_CDCACM_EPBULKIN_FSSIZE=64 : Full speed packet size + CONFIG_CDCACM_EPBULKIN_HSSIZE=512 : High speed packet size + CONFIG_CDCACM_NWRREQS=4 : Number of write requests + CONFIG_CDCACM_NRDREQS=8 : Number of read requests + CONFIG_CDCACM_BULKIN_REQLEN=768 : Size of write request buffer + CONFIG_CDCACM_RXBUFSIZE=256 : Serial read buffer size + CONFIG_CDCACM_TXBUFSIZE=256 : Serial transmit buffer size + CONFIG_CDCACM_VENDORID=0x0525 : Vendor ID + CONFIG_CDCACM_PRODUCTID=0xa4a7 : Product ID + CONFIG_CDCACM_VENDORSTR="NuttX" : Vendor string + CONFIG_CDCACM_PRODUCTSTR="CDC/ACM Serial" : Product string + + Device Drivers -> Serial Driver Support + CONFIG_SERIAL_REMOVABLE=y : Support for removable serial device + +The CDC/ACM application provides commands to connect and disconnect the +CDC/ACM serial device: + + CONFIG_SYSTEM_CDCACM=y : Enable connect/disconnect support + CONFIG_SYSTEM_CDCACM_DEVMINOR=0 : Use device /dev/ttyACM0 + CONFIG_CDCACM_RXBUFSIZE=??? : A large RX may be needed + +If you include this CDC/ACM application, then you can connect the CDC/ACM +serial device to the host by entering the command 'sercon' and you detach +the serial device with the command 'serdis'. If you do no use this +application, they you will have to write logic in your board initialization +code to initialize and attach the USB device. + +MCAN1 Loopback Test +=================== + + MCAN1 + ----- + SAM E70 Xplained has two MCAN modules that performs communication according + to ISO11898-1 (Bosch CAN specification 2.0 part A,B) and Bosch CAN FD + specification V1.0. MCAN1 is connected to an on-board ATA6561 CAN physical-layer + transceiver. + + ------- -------- -------- ------------- + SAM E70 FUNCTION ATA6561 SHARED + PIN FUNCTION FUNCTIONALITY + ------- -------- -------- ------------- + PC14 CANTX1 TXD Shield + PC12 CANRX1 RXD Shield + ------- -------- -------- ------------- + + Enabling MCAN1 + -------------- + These modifications may be applied to the same70-xplained/nsh configuration in order + to enable MCAN1: + + Device Drivers -> CAN Driver support + CONFIG_CAN=y # Enable the upper-half CAN driver + CONFIG_CAN_FIFOSIZE=8 + CONFIG_CAN_NPENDINGRTR=4 + + System Type -> SAMV7 Peripheral Selections + CONFIG_SAMV7_MCAN1=y # Enable MCAN1 as the lower-half + + System Type -> MCAN device driver options + CONFIG_SAMV7_MCAN_CLKSRC_MAIN=y # Use the MAIN clock as the source + CONFIG_SAMV7_MCAN_CLKSRC_PRESCALER=1 + + System Type ->MCAN device driver options -> MCAN1 device driver options + CONFIG_SAMV7_MCAN1_ISO11899_1=y # Loopback test only support ISO11899-1 + CONFIG_SAMV7_MCAN1_LOOPBACK=y # Needed for loopback test + CONFIG_SAMV7_MCAN1_BITRATE=500000 # Not critical for loopback test + CONFIG_SAMV7_MCAN1_PROPSEG=2 # Bit timing setup + CONFIG_SAMV7_MCAN1_PHASESEG1=11 # " " " " " " + CONFIG_SAMV7_MCAN1_PHASESEG2=11 # " " " " " " + CONFIG_SAMV7_MCAN1_FSJW=4 # " " " " " " + CONFIG_SAMV7_MCAN1_FBITRATE=2000000 # CAN_FD BTW mode is not used + CONFIG_SAMV7_MCAN1_FPROPSEG=2 # " " " " " " "" " " " " + CONFIG_SAMV7_MCAN1_FPHASESEG1=4 # " " " " " " "" " " " " + CONFIG_SAMV7_MCAN1_FPHASESEG2=4 # " " " " " " "" " " " " + CONFIG_SAMV7_MCAN1_FFSJW=2 # " " " " " " "" " " " " + CONFIG_SAMV7_MCAN1_NSTDFILTERS=0 # Filters are not used in the loopback test + CONFIG_SAMV7_MCAN1_NEXTFILTERS=0 # " " " " " " " " "" " " " " " " + CONFIG_SAMV7_MCAN1_RXFIFO0_32BYTES=y # Each RX FIFO0 element is 32 bytes + CONFIG_SAMV7_MCAN1_RXFIFO0_SIZE=8 # There are 8 queue elements + CONFIG_SAMV7_MCAN1_RXFIFO0_32BYTES=y # Each RX FIFO1 element is 32 bytes + CONFIG_SAMV7_MCAN1_RXFIFO0_SIZE=8 # There are 8 queue elements + CONFIG_SAMV7_MCAN1_RXBUFFER_32BYTES=y # Each RX BUFFER is 32 bytes + CONFIG_SAMV7_MCAN1_TXBUFFER_32BYTES=y # Each TX BUFFER is 32 bytes + CONFIG_SAMV7_MCAN1_TXFIFOQ_SIZE=8 # There are 8 queue elements + CONFIG_SAMV7_MCAN1_TXEVENTFIFO_SIZE=0 # The event FIFO is not used + + Board Selection + CONFIG_LIB_BOARDCTL=y # Needed for CAN initialization + CONFIG_BOARDCTL_CANINIT=y # Enabled CAN initialization + + Enabling the CAN Loopback Test + ------------------------------ + Application Configuration -> Examples -> CAN Example + CONFIG_EXAMPLES_CAN=y # Enables the CAN test + + Enabling CAN Debug Output + ------------------------- + Build Setup -> Debug Options + CONFIG_DEBUG=y # Enables general debug features + CONFIG_DEBUG_VERBOSE=y # Enables verbose output + CONFIG_DEBUG_CAN=y # Enables debug output from CAN + + CONFIG_STACK_COLORATION=y # Monitor stack usage + CONFIG_DEBUG_SYMBOLS=y # Needed only for use with a debugger + CONFIG_DEBUG_NOOPT=y # Disables optimization + + System Type -> MCAN device driver options + CONFIG_SAMV7_MCAN_REGDEBUG=y # Super low level register debug output + +SPI Slave +========= + + An interrutp driven SPI slave driver as added on 2015-08-09 but has not + been verified as of this writing. See discussion in include/nuttx/spi/slave.h + and below. + + I do not yet have a design that supports SPI slave DMA. And, under + certain, very limited conditions, I think it can be done. Those + certain conditions are: + + a) The master does not tie the chip select to ground. The master must + raise chip select at the end of the transfer. Then I do not need to + know the length of the transfer; I can cancel the DMA when the chip + is de-selected. + + b) The protocol includes a dummy read after sending the command. This + is very common in SPI device and should not be an issue if it is + specified. This dummy read time provides time to set up the DMA. + So the protocol would be: + + i) Master drops the chip select. + ii) Master sends the command which will indicate whether the master + is reading, writing, or exchanging data. The master discards + the garbage return value. + iii) Slave is interrupted when the command word is received. The + SPI device then decodes the command word and setups up the + subsequent DMA. + iv) Master sends a dummy word and discards the return value. + During the bit times to shift the dummy word, the slave has time + to set up the DMA. + v) Master then reads or writes (or exchanges) the data If the DMA + is in place, the transfer should continue normally. + vi) At the end of the data transfer the master raises the chip + select. + + c) There are limitations in the word time, i.e., the time between the + interrupt for each word shifted in from the master. + + The controller driver will get events after the receipt of each word in + ii), iv), and v). The time between each word will be: + + word-time = nbits * bit time + inter-word-gap + + So for an 8 bit interface at 20MHz, the words will be received from the + master a 8 * 50nsec = 400 nsec + inter-word-gap. That is the time + during which the dummy word would be shifted and during which we + receive the interrupt for the command word, interpret the command word, + and to set up the DMA for the remaining word transfer. I don't think + that is possible, at least not at 20 MHz. + + That is far too fast even for the interrupt driven solution that I have + in place now. It could not work at 20MHz. If we suppose that interrupt + processing is around 1 usec, then an 8 bit interface could not have bit + times more than 125 nsec or 8 KHz. Interrupt handling should be faster + than 1 usec, but not a lot faster. I have not benchmarked it. NuttX + also supports special, zero latency interrupts that could bring the + interrupt time down even more. + + Note that we would also have a little more processing time if you used + 16-bit SPI word size. + + Note also that the interrupt driven approach would have this same basic + performance limitation with the additional disadvantage that: + + a) The driver will receive two interrupts per word exchanged: + + i) One interrupt will be received when the word is shifted in from + the master (at the end of 8-bit times). This is a data received + interrupt. + + ii) And another interrupt when the next words moved to the shift-out + register, freeing up the transmit holding register. This is the + data sent interrupt. + + The ii) event should be very soon after the i) event. + + Without DMA, the only way to reduce the interrupt rate would be to add + interrupt-level polling to detect the when transmit holding register + is available. That is not really a good idea. + + b) It will hog all of the CPU for the duration of the transfer). + +Debugging +========= + + The on-board EDBG appears to work only with Atmel Studio. You can however, + simply connect a SAM-ICE or J-Link to the JTAG/SWD connector on the board + and that works great. The only tricky thing is getting the correct + orientation of the JTAG connection. + + I have been using Atmel Studio to write code to flash then I use the Segger + J-Link GDB server to debug. I have been using the 'Device Programming' I + available under the Atmel Studio 'Tool' menu. I have to disconnect the + SAM-ICE while programming with the EDBG. I am sure that you could come up + with a GDB server-only solution if you wanted. + + I run GDB like this from the directory containing the NuttX ELF file: + + arm-none-eabi-gdb + (gdb) target remote localhost:2331 + (gdb) mon reset + (gdb) file nuttx + (gdb) ... start debugging ... + +Configurations +============== + +Information Common to All Configurations +---------------------------------------- +Each SAME70-XPLD configuration is maintained in a sub-directory and +can be selected as follow: + + cd tools + ./configure.sh same70-xplained/ + cd - + . ./setenv.sh + +Before sourcing the setenv.sh file above, you should examine it and perform +edits as necessary so that TOOLCHAIN_BIN is the correct path to the directory +than holds your toolchain binaries. + +And then build NuttX by simply typing the following. At the conclusion of +the make, the nuttx binary will reside in an ELF file called, simply, nuttx. + + make oldconfig + make + +The that is provided above as an argument to the tools/configure.sh +must be is one of the following. + +NOTES: + + 1. These configurations use the mconf-based configuration tool. To + change any of these configurations using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. Unless stated otherwise, all configurations generate console + output on UART3 (i.e., for the Arduino serial shield). + + 3. All of these configurations are set up to build under Windows using the + "GNU Tools for ARM Embedded Processors" that is maintained by ARM + (unless stated otherwise in the description of the configuration). + + https://launchpad.net/gcc-arm-embedded + + As of this writing (2015-03-11), full support is difficult to find + for the Cortex-M7, but is supported by at least this realeasse of + the ARM GNU tools: + + https://launchpadlibrarian.net/192228215/release.txt + + Current (2105-07-31) setenv.sh file are configured to use this + release: + + https://launchpadlibrarian.net/209776344/release.txt + + That toolchain selection can easily be reconfigured using + 'make menuconfig'. Here are the relevant current settings: + + Build Setup: + CONFIG_HOST_WINDOWS=y : Window environment + CONFIG_WINDOWS_CYGWIN=y : Cywin under Windows + + System Type -> Toolchain: + CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW=y : GNU ARM EABI toolchain + + NOTE: As of this writing, there are issues with using this tool at + the -Os level of optimization. This has not been proven to be a + compiler issue (as least not one that might not be fixed with a + well placed volatile qualifier). However, in any event, it is + recommend that you use not more that -O2 optimization. + +Configuration sub-directories +----------------------------- + + knsh: + + This is identical to the nsh configuration below except that NuttX + is built as a kernel-mode, monolithic module and the user applications + are built separately. There are three very similar NSH configurations: + + - knsh. This is a somewhat simplified version of the nsh configuration + that builds using the protected build mode (CONFIG_BUILD_PROTECTED=y). + - nsh. This configuration is focused on low level, command-line + driver testing. It has no network. + - netnsh. This configuration is focused on network testing and + has only limited command support. + + It is recommends to use a special make command; not just 'make' but make + with the following two arguments: + + make pass1 pass2 + + In the normal case (just 'make'), make will attempt to build both user- + and kernel-mode blobs more or less interleaved. This actual works! + However, for me it is very confusing so I prefer the above make command: + Make the user-space binaries first (pass1), then make the kernel-space + binaries (pass2) + + NOTES: + + 1. At the end of the build, there will be several files in the top-level + NuttX build directory: + + PASS1: + nuttx_user.elf - The pass1 user-space ELF file + nuttx_user.hex - The pass1 Intel HEX format file (selected in defconfig) + User.map - Symbols in the user-space ELF file + + PASS2: + nuttx - The pass2 kernel-space ELF file + nuttx.hex - The pass2 Intel HEX file (selected in defconfig) + System.map - Symbols in the kernel-space ELF file + + The J-Link programmer will except files in .hex, .mot, .srec, and .bin + formats. + + 2. Combining .hex files. If you plan to use the .hex files with your + debugger or FLASH utility, then you may need to combine the two hex + files into a single .hex file. Here is how you can do that. + + a. The 'tail' of the nuttx.hex file should look something like this + (with my comments added): + + $ tail nuttx.hex + # 00, data records + ... + :10 9DC0 00 01000000000800006400020100001F0004 + :10 9DD0 00 3B005A0078009700B500D400F300110151 + :08 9DE0 00 30014E016D0100008D + # 05, Start Linear Address Record + :04 0000 05 0800 0419 D2 + # 01, End Of File record + :00 0000 01 FF + + Use an editor such as vi to remove the 05 and 01 records. + + b. The 'head' of the nuttx_user.hex file should look something like + this (again with my comments added): + + $ head nuttx_user.hex + # 04, Extended Linear Address Record + :02 0000 04 0801 F1 + # 00, data records + :10 8000 00 BD89 01084C800108C8110208D01102087E + :10 8010 00 0010 00201C1000201C1000203C16002026 + :10 8020 00 4D80 01085D80010869800108ED83010829 + ... + + Nothing needs to be done here. The nuttx_user.hex file should + be fine. + + c. Combine the edited nuttx.hex and un-edited nuttx_user.hex + file to produce a single combined hex file: + + $ cat nuttx.hex nuttx_user.hex >combined.hex + + Then use the combined.hex file with the to write the FLASH image. + If you do this a lot, you will probably want to invest a little time + to develop a tool to automate these steps. + + netnsh: + + Configures the NuttShell (nsh) located at examples/nsh. There are three + very similar NSH configurations: + + - knsh. This is a somewhat simplified version of the nsh configuration + that builds using the protected build mode (CONFIG_BUILD_PROTECTED=y). + - nsh. This configuration is focused on low level, command-line + driver testing. It has no network. + - netnsh. This configuration is focused on network testing and + has only limited command support. + + NOTES: + + 1. The serial console is configured by default for use with and Arduino + serial shield (UART3). You will need to reconfigure if you will + to use a different U[S]ART. + + 2. Default stack sizes are large and should really be tuned to reduce + the RAM footprint: + + CONFIG_SCHED_HPWORKSTACKSIZE=2048 + CONFIG_IDLETHREAD_STACKSIZE=1024 + CONFIG_USERMAIN_STACKSIZE=2048 + CONFIG_PTHREAD_STACK_MIN=256 + CONFIG_PTHREAD_STACK_DEFAULT=2048 + CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 + CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 + CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + CONFIG_NSH_TELNETD_DAEMONSTACKSIZE=2048 + CONFIG_NSH_TELNETD_CLIENTSTACKSIZE=2048 + + 3. NSH built-in applications are supported. There are, however, not + enabled built-in applications. + + Binary Formats: + CONFIG_BUILTIN=y : Enable support for built-in programs + + Application Configuration: + CONFIG_NSH_BUILTIN_APPS=y : Enable starting apps from NSH command line + + 4. The network initialization thread and the NSH network montior are + enabled in this configuration. As a result, networking initialization + is performed asynchronously with NSH bring-up. For more information, + see the paragraphs above entitled "Network Initialization Thread" and + "Network Monitor". + + 5. SDRAM is NOT enabled in this configuration. + + 6. TWI/I2C + + TWIHS0 is enabled in this configuration. The SAM E70 Xplained + supports one devices on the one on-board I2C device on the TWIHS0 bus: + The AT24MAC402 serial EEPROM described above. + Relevant configuration settings: + + CONFIG_SAMV7_TWIHS0=y + CONFIG_SAMV7_TWIHS0_FREQUENCY=100000 + + CONFIG_I2C=y + CONFIG_I2C_TRANSFER=y + + 7. TWIHS0 is used to support 256 byte non-volatile storage. This EEPROM + holds the assigned MAC address which is necessary for networking. The + EEPROM is also available for storage of configuration data using the + MTD configuration as described above under the heading, "MTD + Configuration Data". + + 8. Support for HSMCI is built-in by default. The SAME70-XPLD provides + one full-size SD memory card slot. Refer to the section entitled + "SD card" for configuration-related information. + + See "Open Issues" above for issues related to HSMCI. + + The auto-mounter is not enabled. See the section above entitled + "Auto-Mounter". + + 9. Performance-related Configuration settings: + + CONFIG_ARMV7M_ICACHE=y : Instruction cache is enabled + CONFIG_ARMV7M_DCACHE=y : Data cache is enabled + CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y : Write through mode + CONFIG_ARCH_FPU=y : H/W floating point support is enabled + CONFIG_ARCH_DPFPU=y : 64-bit H/W floating point support is enabled + + # CONFIG_ARMV7M_ITCM is not set : Support not yet in place + # CONFIG_ARMV7M_DTCM is not set : Support not yet in place + + I- and D-Caches are enabled but the D-Cache must be enabled in write- + through mode. This is to work around issues with the RX and TX + descriptors with are 8-bytes in size. But the D-Cache cache line + size is 32-bytes. That means that you cannot reload, clean or + invalidate a descriptor without also effecting three neighboring + descriptors. Setting write through mode eliminates the need for + cleaning the D-Cache. If only reloading and invalidating are done, + then there is no problem. + + Stack sizes are also large to simplify the bring-up and should be + tuned for better memory usages. + + STATUS: + 2015-03-29: I- and D-caches are currently enabled, but as noted + above, the D-Cache must be enabled in write-through mode. Also -Os + optimization is not being used (-O2). If the cache is enabled in + Write-Back mode or if higher levels of optimization are enabled, then + there are failures when trying to ping the target from a host. + + nsh: + + Configures the NuttShell (nsh) located at examples/nsh. There are three + very similar NSH configurations: + + - knsh. This is a somewhat simplified version of the nsh configuration + that builds using the protected build mode (CONFIG_BUILD_PROTECTED=y). + - nsh. This configuration is focused on low level, command-line + driver testing. It has no network. + - netnsh. This configuration is focused on network testing and + has only limited command support. + + NOTES: + + 1. The serial console is configured by default for use with and Arduino + serial shield (UART3). You will need to reconfigure if you will + to use a different U[S]ART. + + 2. Default stack sizes are large and should really be tuned to reduce + the RAM footprint: + + CONFIG_ARCH_INTERRUPTSTACK=2048 + CONFIG_IDLETHREAD_STACKSIZE=1024 + CONFIG_USERMAIN_STACKSIZE=2048 + CONFIG_PTHREAD_STACK_DEFAULT=2048 + ... and others ... + + 3. NSH built-in applications are supported. + + Binary Formats: + CONFIG_BUILTIN=y : Enable support for built-in programs + + Application Configuration: + CONFIG_NSH_BUILTIN_APPS=y : Enable starting apps from NSH command line + + 4. SDRAM is enabled in this configuration. Here are the relevant + configuration settings: + + System Type + CONFIG_SAMV7_SDRAMC=y + CONFIG_SAMV7_SDRAMSIZE=2097152 + + SDRAM is not added to the heap in this configuration. To do that + you would need to set CONFIG_SAMV7_SDRAMHEAP=y and CONFIG_MM_REGIONS=2. + Instead, the SDRAM is set up so that is can be used with a destructive + RAM test enabled with this option: + + Application Configuration: + CONFIG_SYSTEM_RAMTEST=y + + The RAM test can be executed as follows: + + nsh> ramtest -w 70000000 2097152 + + NuttShell (NSH) NuttX-7.8 + nsh> ramtest -w 70000000 2097152 + RAMTest: Marching ones: 70000000 2097152 + RAMTest: Marching zeroes: 70000000 2097152 + RAMTest: Pattern test: 70000000 2097152 55555555 aaaaaaaa + RAMTest: Pattern test: 70000000 2097152 66666666 99999999 + RAMTest: Pattern test: 70000000 2097152 33333333 cccccccc + RAMTest: Address-in-address test: 70000000 2097152 + nsh> + + 5. The button test at apps/examples/buttons is included in the + configuration. This configuration illustrates (1) use of the buttons + on the evaluation board, and (2) the use of PIO interrupts. Example + usage: + + NuttShell (NSH) NuttX-7.8 + nsh> help + help usage: help [-v] [] + ... + Builtin Apps: + buttons + nsh> buttons 3 + maxbuttons: 3 + Attached handler at 4078f7 to button 0 [SW0], oldhandler:0 + Attached handler at 4078e9 to button 1 [SW1], oldhandler:0 + IRQ:125 Button 1:SW1 SET:00: + SW1 released + IRQ:125 Button 1:SW1 SET:02: + SW1 depressed + IRQ:125 Button 1:SW1 SET:00: + SW1 released + IRQ:90 Button 0:SW0 SET:01: + SW0 depressed + IRQ:90 Button 0:SW0 SET:00: + SW0 released + IRQ:125 Button 1:SW1 SET:02: + SW1 depressed + nsh> + + 6. TWI/I2C + + TWIHS0 is enabled in this configuration. The SAM E70 Xplained + supports one device on the one on-board I2C device on the TWIHS0 bus: + The AT24MAC402 serial EEPROM described above. + + In this configuration, the I2C tool at apps/system/i2ctool is + enabled. This tools supports interactive access to I2C devices on + the enabled TWIHS bus. Relevant configuration settings: + + CONFIG_SAMV7_TWIHS0=y + CONFIG_SAMV7_TWIHS0_FREQUENCY=100000 + + CONFIG_I2C=y + CONFIG_I2C_TRANSFER=y + + CONFIG_SYSTEM_I2CTOOL=y + CONFIG_I2CTOOL_MINBUS=0 + CONFIG_I2CTOOL_MAXBUS=0 + CONFIG_I2CTOOL_MINADDR=0x03 + CONFIG_I2CTOOL_MAXADDR=0x77 + CONFIG_I2CTOOL_MAXREGADDR=0xff + CONFIG_I2CTOOL_DEFFREQ=400000 + + Example usage: + + nsh> i2c + Usage: i2c [arguments] + Where is one of: + + Show help : ? + List busses : bus + List devices : dev [OPTIONS] + Read register : get [OPTIONS] [] + Show help : help + Write register: set [OPTIONS] [] + Verify access : verf [OPTIONS] [] [] + + Where common "sticky" OPTIONS include: + [-a addr] is the I2C device address (hex). Default: 03 Current: 03 + [-b bus] is the I2C bus number (decimal). Default: 0 Current: 0 + [-r regaddr] is the I2C device register address (hex). Default: 00 Current: 00 + [-w width] is the data width (8 or 16 decimal). Default: 8 Current: 8 + [-s|n], send/don't send start between command and data. Default: -n Current: -n + [-i|j], Auto increment|don't increment regaddr on repititions. Default: NO Current: NO + [-f freq] I2C frequency. Default: 400000 Current: 400000 + + NOTES: + o An environment variable like $PATH may be used for any argument. + o Arguments are "sticky". For example, once the I2C address is + specified, that address will be re-used until it is changed. + + WARNING: + o The I2C dev command may have bad side effects on your I2C devices. + Use only at your own risk. + nsh> i2c bus + BUS EXISTS? + Bus 0: YES + nsh> i2c dev 3 77 + 0 1 2 3 4 5 6 7 8 9 a b c d e f + 00: -- -- -- -- -- -- -- -- -- -- -- -- -- + 10: -- -- -- -- -- -- -- -- -- -- 1a -- -- -- -- -- + 20: -- -- -- -- -- -- -- -- 28 -- -- -- -- -- -- -- + 30: -- -- -- -- -- -- -- 37 -- -- -- -- -- -- -- -- + 40: -- -- -- -- -- -- -- -- -- -- -- -- -- -- 4e -- + 50: -- -- -- -- -- -- -- 57 -- -- -- -- -- -- -- 5f + 60: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- + 70: -- -- -- -- -- -- -- -- + nsh> + + Where 0x28 is the address of TWI interface to the EDBG, 0x4e is the + address of the CP2100CP programmable PLL, and 0x57 and 0x5f are thei + addresses of the AT2 EEPROM (I am not sure what the other address,i + 0x37, is as this writing). + + 7. TWIHS0 is also used to support 256 byte non-volatile storage for + configuration data using the MTD configuration as described above + under the heading, "MTD Configuration Data". + + 8. Support for HSMCI is built-in by default. The SAME70-XPLD provides + one full-size SD memory card slot. Refer to the section entitled + "SD card" for configuration-related information. + + See "Open Issues" above for issues related to HSMCI. + + The auto-mounter is not enabled. See the section above entitled + "Auto-Mounter". + + 9. Performance-related Configuration settings: + + CONFIG_ARMV7M_ICACHE=y : Instruction cache is enabled + CONFIG_ARMV7M_DCACHE=y : Data cache is enabled + CONFIG_ARMV7M_DCACHE_WRITETHROUGH=n : Write back mode + CONFIG_ARCH_FPU=y : H/W floating point support is enabled + CONFIG_ARCH_DPFPU=y : 64-bit H/W floating point support is enabled + + # CONFIG_ARMV7M_ITCM is not set : Support not yet in place + # CONFIG_ARMV7M_DTCM is not set : Support not yet in place + + Stack sizes are also large to simplify the bring-up and should be + tuned for better memory usages. + + STATUS: + 2015-03-28: HSMCI TX DMA is disabled. There are some issues with the TX + DMA that need to be corrected. + diff --git a/configs/same70-xplained/include/board.h b/configs/same70-xplained/include/board.h new file mode 100644 index 00000000000..9923384f719 --- /dev/null +++ b/configs/same70-xplained/include/board.h @@ -0,0 +1,418 @@ +/************************************************************************************ + * configs/same70-xplained/include/board.h + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_SAME70_XPLAINED_INCLUDE_BOARD_H +#define __CONFIGS_SAME70_XPLAINED_INCLUDE_BOARD_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#include + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* Clocking *************************************************************************/ +/* After power-on reset, the SAME70Q device is running out of the Master Clock using + * the Fast RC Oscillator running at 4 MHz. + * + * MAINOSC: Frequency = 12MHz (crystal) + * + * 300MHz Settings: + * PLLA: PLL Divider = 1, Multiplier = 20 to generate PLLACK = 240MHz + * Master Clock (MCK): Source = PLLACK, Prescalar = 1 to generate MCK = 120MHz + * CPU clock: 120MHz + * + * There are two on-board crystals: + */ + +#define BOARD_SLOWCLK_FREQUENCY (32768) /* 32.768 KHz slow crystal oscillator */ +#define BOARD_MAINOSC_FREQUENCY (12000000) /* 12 MHz main oscillator */ + +/* Main oscillator register settings. + * + * The main oscillator could be either the embedded 4/8/12 MHz fast RC oscillators + * or an external 3-20 MHz crystal or ceramic resonator. The external clock source + * is selected by default in sam_clockconfig.c. Here we need to specify the main + * oscillator start-up time. + * + * REVISIT... this is old information: + * The start up time should be should be: + * + * Start Up Time = 8 * MOSCXTST / SLCK = 56 Slow Clock Cycles. + */ + +#define BOARD_CKGR_MOR_MOSCXTST (62 << PMC_CKGR_MOR_MOSCXTST_SHIFT) /* Start-up Time */ + +/* PLLA configuration. + * + * Divider = 1 + * Multiplier = 25 + * + * Yields: + * + * PLLACK = 25 * 12MHz / 1 = 300MHz + */ + +#define BOARD_CKGR_PLLAR_STMODE PMC_CKGR_PLLAR_STMODE_FAST +#define BOARD_CKGR_PLLAR_COUNT (63 << PMC_CKGR_PLLAR_COUNT_SHIFT) +#define BOARD_CKGR_PLLAR_MUL PMC_CKGR_PLLAR_MUL(24) +#define BOARD_CKGR_PLLAR_DIV PMC_CKGR_PLLAR_DIV_BYPASS + +/* PMC master clock register settings. + * + * BOARD_PMC_MCKR_CSS - The source of main clock input. This may be one of: + * + * PMC_MCKR_CSS_SLOW Slow Clock + * PMC_MCKR_CSS_MAIN Main Clock + * PMC_MCKR_CSS_PLLA PLLA Clock + * PMC_MCKR_CSS_UPLL Divided UPLL Clock + * + * BOARD_PMC_MCKR_PRES - Source clock pre-scaler. May be one of: + * + * PMC_MCKR_PRES_DIV1 Selected clock + * PMC_MCKR_PRES_DIV2 Selected clock divided by 2 + * PMC_MCKR_PRES_DIV4 Selected clock divided by 4 + * PMC_MCKR_PRES_DIV8 Selected clock divided by 8 + * PMC_MCKR_PRES_DIV16 Selected clock divided by 16 + * PMC_MCKR_PRES_DIV32 Selected clock divided by 32 + * PMC_MCKR_PRES_DIV64 Selected clock divided by 64 + * PMC_MCKR_PRES_DIV3 Selected clock divided by 3 + * + * The prescaler determines (1) the CPU clock and (2) the input into the + * second divider that then generates the Master Clock (MCK). MCK is the + * source clock of the peripheral clocks. + * + * BOARD_PMC_MCKR_MDIV - MCK divider. May be one of: + * + * PMC_MCKR_MDIV_DIV1 Master Clock = Prescaler Output Clock / 1 + * PMC_MCKR_MDIV_DIV2 Master Clock = Prescaler Output Clock / 2 + * PMC_MCKR_MDIV_DIV4 Master Clock = Prescaler Output Clock / 4 + * PMC_MCKR_MDIV_DIV3 Master Clock = Prescaler Output Clock / 3 + */ + +#define BOARD_PMC_MCKR_CSS PMC_MCKR_CSS_PLLA /* Source = PLLA */ +#define BOARD_PMC_MCKR_PRES PMC_MCKR_PRES_DIV1 /* Prescaler = /1 */ +#define BOARD_PMC_MCKR_MDIV PMC_MCKR_MDIV_DIV2 /* MCK divider = /2 */ + +/* USB clocking + * To be provided + */ + +#define BOARD_PMC_MCKR_UPLLDIV2 0 /* UPLL clock not divided by 2 */ + +/* Resulting frequencies */ + +#define BOARD_PLLA_FREQUENCY (300000000) /* PLLACK: 25 * 12Mhz / 1 */ +#define BOARD_CPU_FREQUENCY (300000000) /* CPU: PLLACK / 1 */ +#define BOARD_MCK_FREQUENCY (150000000) /* MCK: PLLACK / 1 / 2 */ +#define BOARD_UPLL_FREQUENCY /* To be provided */ + +/* HSMCI clocking + * + * Multimedia Card Interface clock (MCCK or MCI_CK) is Master Clock (MCK) + * divided by (2*(CLKDIV) + CLOCKODD + 2). + * + * MCI_SPEED = MCK / (2*CLKDIV + CLOCKODD + 2) + * + * Where CLKDIV has a range of 0-255. + */ + +/* MCK = 150MHz, CLKDIV = 186, MCI_SPEED = 150MHz / (2*186 + 1 + 2) = 400 KHz */ + +#define HSMCI_INIT_CLKDIV ((186 << HSMCI_MR_CLKDIV_SHIFT) | HSMCI_MR_CLKODD) + +/* MCK = 150MHz, CLKDIV = 3 w/CLOCKODD, MCI_SPEED = 150MHz /(2*3 + 0 + 2) = 18.75 MHz */ + +#define HSMCI_MMCXFR_CLKDIV (2 << HSMCI_MR_CLKDIV_SHIFT) + +/* MCK = 150MHz, CLKDIV = 2, MCI_SPEED = 150MHz /(2*2 + 0 + 2) = 25 MHz */ + +#define HSMCI_SDXFR_CLKDIV (2 << HSMCI_MR_CLKDIV_SHIFT) +#define HSMCI_SDWIDEXFR_CLKDIV HSMCI_SDXFR_CLKDIV + +/* FLASH wait states. + * + * Wait states Max frequency at 105 centigrade (STH conditions) + * + * VDDIO + * 1.62V 2.7V + * --- ------- ------- + * 0 26 MHz 30 MHz + * 1 52 MHz 62 MHz + * 2 78 MHz 93 MHz + * 3 104 MHz 124 MHz + * 4 131 MHz 150 MHz + * 5 150 MHz --- MHz + * + * Given: VDDIO=3.3V, VDDCORE=1.2V, MCK=150MHz + */ + +#define BOARD_FWS 4 + +/* LED definitions ******************************************************************/ +/* LEDs + * + * There are two yellow LED available on the SAM E70 Xplained board that can + * be turned on and off. The LEDs can be activated by driving the connected + * I/O line to GND. + * + * ------ ----------- --------------------- + * SAME70 Function Shared functionality + * PIO + * ------ ----------- --------------------- + * PA23 Yellow LED0 EDBG GPIO + * PC09 Yellow LED1 LCD, and Shield + * ------ ----------- --------------------- + * + * If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in any + * way. The following definitions are used to access individual LEDs. + */ + +/* LED index values for use with board_userled() */ + +#define BOARD_LED0 0 +#define BOARD_LED1 1 +#define BOARD_NLEDS 2 + +/* LED bits for use with board_userled_all() */ + +#define BOARD_LED0_BIT (1 << BOARD_LED0) +#define BOARD_LED1_BIT (1 << BOARD_LED1) + +/* These LEDs are not used by the board port unless CONFIG_ARCH_LEDS is + * defined. In that case, the usage by the board port is defined in + * include/board.h and src/sam_autoleds.c. The LEDs are used to encode + * OS-related events as follows: + * + * SYMBOL Meaning LED state + * LED2 LED1 + * ------------------------ -------------------------- ------ ------ */ + +#define LED_STARTED 0 /* NuttX has been started OFF OFF */ +#define LED_HEAPALLOCATE 0 /* Heap has been allocated OFF OFF */ +#define LED_IRQSENABLED 0 /* Interrupts enabled OFF OFF */ +#define LED_STACKCREATED 1 /* Idle stack created ON OFF */ +#define LED_INIRQ 2 /* In an interrupt No change */ +#define LED_SIGNAL 2 /* In a signal handler No change */ +#define LED_ASSERTION 2 /* An assertion failed No change */ +#define LED_PANIC 3 /* The system has crashed N/C Blinking */ +#undef LED_IDLE /* MCU is is sleep mode Not used */ + +/* Thus if LED0 is statically on, NuttX has successfully booted and is, + * apparently, running normally. If LED1 is flashing at approximately + * 2Hz, then a fatal error has been detected and the system has halted. + * + * NOTE: That LED0 is not used after completion of booting and may + * be used by other board-specific logic. + */ + +/* Button definitions ***************************************************************/ +/* Buttons + * + * SAM E70 Xplained contains three mechanical buttons. One button is the RESET + * button connected to the SAM E70 reset line and the others are generic user + * configurable buttons. When a button is pressed it will drive the I/O line + * to GND. + * + * ------ ----------- --------------------- + * SAME70 Function Shared functionality + * PIO + * ------ ----------- --------------------- + * RESET RESET Trace, Shield, and EDBG + * PA09 SW0 EDBG GPIO and Camera + * PB12 SW1 EDBG SWD and Chip Erase + * ------ ----------- --------------------- + * + * NOTES: + * + * - There are no pull-up resistors connected to the generic user buttons so + * it is necessary to enable the internal pull-up in the SAM E70 to use the + * button. + * - PB12 is set up as a system flash ERASE pin when the firmware boots. To + * use the SW1, PB12 has to be configured as a normal regular I/O pin in + * the MATRIX module. For more information see the SAM E70 datasheet. + */ + +#define BUTTON_SW0 0 +#define BUTTON_SW1 1 +#define NUM_BUTTONS 2 + +#define BUTTON_SW0_BIT (1 << BUTTON_SW0) +#define BUTTON_SW1_BIT (1 << BUTTON_SW1) + +/* PIO Disambiguation ***************************************************************/ +/* Serial Console + * + * The SAME70-XPLD has no on-board RS-232 drivers so it will be necessary to use + * either the VCOM or an external RS-232 driver. Here are some options. + * + * - Arduino Serial Shield: One option is to use an Arduino-compatible + * serial shield. This will use the RXD and TXD signals available at pins + * 0 an 1, respectively, of the Arduino "Digital Low" connector. On the + * SAME70-XPLD board, this corresponds to UART3: + * + * ------ ------ ------- ------- -------- + * Pin on SAME70 Arduino Arduino SAME70 + * J503 PIO Name Pin Function + * ------ ------ ------- ------- -------- + * 1 PD28 RX0 0 URXD3 + * 2 PD30 TX0 1 UTXD3 + * ------ ------ ------- ------- -------- + * + * There are alternative pin selections only for UART3 TXD: + */ + +#define GPIO_UART3_TXD GPIO_UART3_TXD_1 + + +/* - Arduino Communications. Additional UART/USART connections are available + * on the Arduino Communications connection J505: + * + * ------ ------ ------- ------- -------- + * Pin on SAME70 Arduino Arduino SAME70 + * J503 PIO Name Pin Function + * ------ ------ ------- ------- -------- + * 3 PD18 RX1 0 URXD4 + * 4 PD19 TX1 0 UTXD4 + * 5 PD15 RX2 0 RXD2 + * 6 PD16 TX2 0 TXD2 + * 7 PB0 RX3 0 RXD0 + * 8 PB1 TX3 1 TXD0 + * ------ ------ ------- ------- -------- + * + * There are alternative pin selections only for UART4 TXD: + */ + +#define GPIO_UART4_TXD GPIO_UART4_TXD_1 + +/* - SAMV7-XULT EXTn connectors. USART pins are also available the EXTn + * connectors. The following are labelled in the User Guide for USART + * functionality: + * + * ---- -------- ------ -------- + * EXT1 EXTI1 SAME70 SAME70 + * Pin Name PIO Function + * ---- -------- ------ -------- + * 13 USART_RX PB00 RXD0 + * 14 USART_TX PB01 TXD0 + * + * ---- -------- ------ -------- + * EXT2 EXTI2 SAME70 SAME70 + * Pin Name PIO Function + * ---- -------- ------ -------- + * 13 USART_RX PA21 RXD1 + * 14 USART_TX PB04 TXD1 + * + * There are no alternative pin selections for USART0 or USART1. + */ + +/* - VCOM. The Virtual Com Port gateway is available on USART1: + * + * ------ -------- + * SAME70 SAME70 + * PIO Function + * ------ -------- + * PB04 TXD1 + * PA21 RXD1 + * ------ -------- + * + * There are no alternative pin selections for USART1. + */ + +/* MCAN1 + * + * SAM E70 Xplained has two MCAN modules that performs communication according + * to ISO11898-1 (Bosch CAN specification 2.0 part A,B) and Bosch CAN FD + * specification V1.0. MCAN1 is connected to an on-board ATA6561 CAN physical-layer + * transceiver. + * + * ------- -------- -------- ------------- + * SAM E70 FUNCTION ATA6561 SHARED + * PIN FUNCTION FUNCTIONALITY + * ------- -------- -------- ------------- + * PC14 CANTX1 TXD Shield + * PC12 CANRX1 RXD Shield + * ------- -------- -------- ------------- + */ + +#define GPIO_MCAN1_TX GPIO_MCAN1_TX_2 +#define GPIO_MCAN1_RX GPIO_MCAN1_RX_2 + +/************************************************************************************ + * Public Types + ************************************************************************************/ + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: sam_lcdclear + * + * Description: + * This is a non-standard LCD interface just for the SAM4e-EK board. Because + * of the various rotations, clearing the display in the normal way by writing a + * sequences of runs that covers the entire display can be very slow. Here the + * display is cleared by simply setting all GRAM memory to the specified color. + * + ************************************************************************************/ + +void sam_lcdclear(uint16_t color); + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_SAME70_XPLAINED_INCLUDE_BOARD_H */ diff --git a/configs/same70-xplained/kernel/.gitignore b/configs/same70-xplained/kernel/.gitignore new file mode 100644 index 00000000000..7bacd5aee3e --- /dev/null +++ b/configs/same70-xplained/kernel/.gitignore @@ -0,0 +1,2 @@ +/nuttx_user.elf + diff --git a/configs/same70-xplained/kernel/Makefile b/configs/same70-xplained/kernel/Makefile new file mode 100644 index 00000000000..a71e019eb0e --- /dev/null +++ b/configs/same70-xplained/kernel/Makefile @@ -0,0 +1,116 @@ +############################################################################ +# configs/samv7-xult/kernel/Makefile +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +# This is the directory for the board-specific header files + +BOARD_INCLUDE = $(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)include + +# The entry point name (if none is provided in the .config file) + +CONFIG_USER_ENTRYPOINT ?= user_start +ENTRYPT = $(patsubst "%",%,$(CONFIG_USER_ENTRYPOINT)) + +# Get the paths to the libraries and the links script path in format that +# is appropriate for the host OS + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + USER_LIBPATHS = ${shell for path in $(USERLIBS); do dir=`dirname $(TOPDIR)$(DELIM)$$path`;echo "-L\"`cygpath -w $$dir`\"";done} + USER_LDSCRIPT = -T "${shell cygpath -w $(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)memory.ld}" + USER_LDSCRIPT += -T "${shell cygpath -w $(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)user-space.ld}" +else + # Linux/Cygwin-native toolchain + USER_LIBPATHS = $(addprefix -L$(TOPDIR)$(DELIM),$(dir $(USERLIBS))) + USER_LDSCRIPT = -T$(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)memory.ld + USER_LDSCRIPT += -T$(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)user-space.ld +endif + +USER_LDFLAGS = --undefined=$(ENTRYPT) --entry=$(ENTRYPT) $(USER_LDSCRIPT) +USER_LDLIBS = $(patsubst lib%,-l%,$(basename $(notdir $(USERLIBS)))) +USER_LIBGCC = "${shell "$(CC)" $(ARCHCPUFLAGS) -print-libgcc-file-name}" + +# Source files + +CSRCS = sam_userspace.c +COBJS = $(CSRCS:.c=$(OBJEXT)) +OBJS = $(COBJS) + +# Targets: + +all: $(TOPDIR)$(DELIM)nuttx_user.elf $(TOPDIR)$(DELIM)User.map +.PHONY: nuttx_user.elf depend clean distclean + +$(COBJS): %$(OBJEXT): %.c + $(call COMPILE, $<, $@) + +# Create the nuttx_user.elf file containing all of the user-mode code + +nuttx_user.elf: $(OBJS) + $(Q) $(LD) -o $@ $(USER_LDFLAGS) $(USER_LIBPATHS) $(OBJS) --start-group $(USER_LDLIBS) --end-group $(USER_LIBGCC) + +$(TOPDIR)$(DELIM)nuttx_user.elf: nuttx_user.elf + @echo "LD: nuttx_user.elf" + $(Q) cp -a nuttx_user.elf $(TOPDIR)$(DELIM)nuttx_user.elf +ifeq ($(CONFIG_INTELHEX_BINARY),y) + @echo "CP: nuttx_user.hex" + $(Q) $(OBJCOPY) $(OBJCOPYARGS) -O ihex nuttx_user.elf $(TOPDIR)$(DELIM)nuttx_user.hex +endif +ifeq ($(CONFIG_MOTOROLA_SREC),y) + @echo "CP: nuttx_user.srec" + $(Q) $(OBJCOPY) $(OBJCOPYARGS) -O srec nuttx_user.elf $(TOPDIR)$(DELIM)nuttx_user.srec +endif +ifeq ($(CONFIG_RAW_BINARY),y) + @echo "CP: nuttx_user.bin" + $(Q) $(OBJCOPY) $(OBJCOPYARGS) -O binary nuttx_user.elf $(TOPDIR)$(DELIM)nuttx_user.bin +endif + +$(TOPDIR)$(DELIM)User.map: nuttx_user.elf + @echo "MK: User.map" + $(Q) $(NM) nuttx_user.elf >$(TOPDIR)$(DELIM)User.map + $(Q) $(CROSSDEV)size nuttx_user.elf + +.depend: + +depend: .depend + +clean: + $(call DELFILE, nuttx_user.elf) + $(call DELFILE, "$(TOPDIR)$(DELIM)nuttx_user.*") + $(call DELFILE, "$(TOPDIR)$(DELIM)User.map") + $(call CLEAN) + +distclean: clean diff --git a/configs/same70-xplained/kernel/sam_userspace.c b/configs/same70-xplained/kernel/sam_userspace.c new file mode 100644 index 00000000000..f4c7e40a734 --- /dev/null +++ b/configs/same70-xplained/kernel/sam_userspace.c @@ -0,0 +1,132 @@ +/**************************************************************************** + * configs/same70-xplained/kernel/sam_userspace.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include +#include + +#if defined(CONFIG_BUILD_PROTECTED) && !defined(__KERNEL__) + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ + +#ifndef CONFIG_NUTTX_USERSPACE +# error "CONFIG_NUTTX_USERSPACE not defined" +#endif + +#if CONFIG_NUTTX_USERSPACE != 0x00500000 +# error "CONFIG_NUTTX_USERSPACE must be 0x00500000 to match user-space.ld" +#endif + +/**************************************************************************** + * Public Data + ****************************************************************************/ + +/* These 'addresses' of these values are setup by the linker script. They are + * not actual uint32_t storage locations! They are only used meaningfully in the + * following way: + * + * - The linker script defines, for example, the symbol_sdata. + * - The declareion extern uint32_t _sdata; makes C happy. C will believe + * that the value _sdata is the address of a uint32_t variable _data (it is + * not!). + * - We can recoved the linker value then by simply taking the address of + * of _data. like: uint32_t *pdata = &_sdata; + */ + +extern uint32_t _stext; /* Start of .text */ +extern uint32_t _etext; /* End_1 of .text + .rodata */ +extern const uint32_t _eronly; /* End+1 of read only section (.text + .rodata) */ +extern uint32_t _sdata; /* Start of .data */ +extern uint32_t _edata; /* End+1 of .data */ +extern uint32_t _sbss; /* Start of .bss */ +extern uint32_t _ebss; /* End+1 of .bss */ + +/* This is the user space entry point */ + +int CONFIG_USER_ENTRYPOINT(int argc, char *argv[]); + +const struct userspace_s userspace __attribute__ ((section (".userspace"))) = +{ + /* General memory map */ + + .us_entrypoint = (main_t)CONFIG_USER_ENTRYPOINT, + .us_textstart = (uintptr_t)&_stext, + .us_textend = (uintptr_t)&_etext, + .us_datasource = (uintptr_t)&_eronly, + .us_datastart = (uintptr_t)&_sdata, + .us_dataend = (uintptr_t)&_edata, + .us_bssstart = (uintptr_t)&_sbss, + .us_bssend = (uintptr_t)&_ebss, + + /* Memory manager heap structure */ + + .us_heap = &g_mmheap, + + /* Task/thread startup routines */ + + .task_startup = task_startup, +#ifndef CONFIG_DISABLE_PTHREAD + .pthread_startup = pthread_startup, +#endif + + /* Signal handler trampoline */ + +#ifndef CONFIG_DISABLE_SIGNALS + .signal_handler = up_signal_handler, +#endif + + /* User-space work queue support (declared in include/nuttx/wqueue.h) */ + +#ifdef CONFIG_LIB_USRWORK + .work_usrstart = work_usrstart, +#endif +}; + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +#endif /* CONFIG_BUILD_PROTECTED && !__KERNEL__ */ diff --git a/configs/same70-xplained/nsh/Make.defs b/configs/same70-xplained/nsh/Make.defs new file mode 100644 index 00000000000..37d0cba0924 --- /dev/null +++ b/configs/same70-xplained/nsh/Make.defs @@ -0,0 +1,117 @@ +############################################################################ +# configs/same70-xplained/nsh/Make.defs +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(CONFIG_ARMV7M_DTCM),y) + LDSCRIPT = flash-dtcm.ld +else + LDSCRIPT = flash-sram.ld +endif + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mknulldeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps.sh + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -fno-strict-aliasing +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/same70-xplained/nsh/defconfig b/configs/same70-xplained/nsh/defconfig new file mode 100644 index 00000000000..b5fbd8c6e06 --- /dev/null +++ b/configs/same70-xplained/nsh/defconfig @@ -0,0 +1,998 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +CONFIG_ARCH_CHIP_SAMV7=y +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +# CONFIG_ARCH_CORTEXM4 is not set +CONFIG_ARCH_CORTEXM7=y +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="samv7" +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +CONFIG_ARMV7M_CMNVECTOR=y +CONFIG_ARMV7M_LAZYFPU=y +CONFIG_ARCH_HAVE_FPU=y +CONFIG_ARCH_HAVE_DPFPU=y +CONFIG_ARCH_FPU=y +CONFIG_ARCH_DPFPU=y +# CONFIG_ARMV7M_MPU is not set + +# +# ARMV7M Configuration Options +# +CONFIG_ARMV7M_HAVE_ICACHE=y +CONFIG_ARMV7M_HAVE_DCACHE=y +CONFIG_ARMV7M_ICACHE=y +CONFIG_ARMV7M_DCACHE=y +# CONFIG_ARMV7M_DCACHE_WRITETHROUGH is not set +CONFIG_ARMV7M_HAVE_ITCM=y +CONFIG_ARMV7M_HAVE_DTCM=y +# CONFIG_ARMV7M_ITCM is not set +# CONFIG_ARMV7M_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW is not set +# CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW=y +# CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE is not set +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set +CONFIG_SDIO_DMA=y +# CONFIG_SDIO_WIDTH_D1_ONLY is not set + +# +# SAMV7 Configuration Options +# +# CONFIG_ARCH_CHIP_SAME70Q19 is not set +# CONFIG_ARCH_CHIP_SAME70Q20 is not set +CONFIG_ARCH_CHIP_SAME70Q21=y +# CONFIG_ARCH_CHIP_SAME70N19 is not set +# CONFIG_ARCH_CHIP_SAME70N20 is not set +# CONFIG_ARCH_CHIP_SAME70N21 is not set +# CONFIG_ARCH_CHIP_SAME70J19 is not set +# CONFIG_ARCH_CHIP_SAME70J20 is not set +# CONFIG_ARCH_CHIP_SAME70J21 is not set +# CONFIG_ARCH_CHIP_SAMV71Q19 is not set +# CONFIG_ARCH_CHIP_SAMV71Q20 is not set +# CONFIG_ARCH_CHIP_SAMV71Q21 is not set +# CONFIG_ARCH_CHIP_SAMV71N19 is not set +# CONFIG_ARCH_CHIP_SAMV71N20 is not set +# CONFIG_ARCH_CHIP_SAMV71N21 is not set +# CONFIG_ARCH_CHIP_SAMV71J19 is not set +# CONFIG_ARCH_CHIP_SAMV71J20 is not set +# CONFIG_ARCH_CHIP_SAMV71J21 is not set +CONFIG_ARCH_CHIP_SAME70=y +CONFIG_ARCH_CHIP_SAME70Q=y +# CONFIG_ARCH_CHIP_SAME70N is not set +# CONFIG_ARCH_CHIP_SAME70J is not set +# CONFIG_ARCH_CHIP_SAMV71 is not set +# CONFIG_ARCH_CHIP_SAMV71Q is not set +# CONFIG_ARCH_CHIP_SAMV71N is not set +# CONFIG_ARCH_CHIP_SAMV71J is not set +# CONFIG_SAMV7_MCAN is not set +CONFIG_SAMV7_HAVE_MCAN1=y +CONFIG_SAMV7_HAVE_DAC1=y +CONFIG_SAMV7_HAVE_EBI=y +# CONFIG_SAMV7_EMAC is not set +CONFIG_SAMV7_HSMCI=y +CONFIG_SAMV7_HAVE_HSMCI0=y +# CONFIG_SAMV7_HAVE_ISI8 is not set +# CONFIG_SAMV7_HAVE_MEDIALB is not set +CONFIG_SAMV7_HAVE_SDRAMC=y +CONFIG_SAMV7_HAVE_SPI0=y +CONFIG_SAMV7_HAVE_SPI1=y +# CONFIG_SAMV7_QSPI_IS_SPI is not set +# CONFIG_SAMV7_SSC is not set +CONFIG_SAMV7_HAVE_TWIHS2=y +# CONFIG_SAMV7_HAVE_USBFS is not set +CONFIG_SAMV7_HAVE_USBHS=y +CONFIG_SAMV7_HAVE_USART0=y +CONFIG_SAMV7_HAVE_USART1=y +CONFIG_SAMV7_HAVE_USART2=y +# CONFIG_SAMV7_SPI is not set +# CONFIG_SAMV7_SPI_MASTER is not set +# CONFIG_SAMV7_SPI_SLAVE is not set + +# +# SAMV7 Peripheral Selection +# +# CONFIG_SAMV7_ACC is not set +# CONFIG_SAMV7_ADC is not set +# CONFIG_SAMV7_AFEC0 is not set +# CONFIG_SAMV7_AFEC1 is not set +# CONFIG_SAMV7_MCAN0 is not set +# CONFIG_SAMV7_MCAN1 is not set +# CONFIG_SAMV7_DAC0 is not set +# CONFIG_SAMV7_DAC1 is not set +# CONFIG_SAMV7_EBI is not set +# CONFIG_SAMV7_EMAC0 is not set +CONFIG_SAMV7_XDMAC=y +CONFIG_SAMV7_HSMCI0=y +# CONFIG_SAMV7_ISI is not set +# CONFIG_SAMV7_PWM0 is not set +# CONFIG_SAMV7_PWM1 is not set +# CONFIG_SAMV7_QSPI is not set +# CONFIG_SAMV7_RTC is not set +# CONFIG_SAMV7_RTT is not set +CONFIG_SAMV7_SDRAMC=y +# CONFIG_SAMV7_SMC is not set +# CONFIG_SAMV7_SPI0 is not set +# CONFIG_SAMV7_SPI1 is not set +# CONFIG_SAMV7_SSC0 is not set +# CONFIG_SAMV7_TC0 is not set +# CONFIG_SAMV7_TC1 is not set +# CONFIG_SAMV7_TC2 is not set +# CONFIG_SAMV7_TC3 is not set +# CONFIG_SAMV7_TC4 is not set +# CONFIG_SAMV7_TC5 is not set +# CONFIG_SAMV7_TC6 is not set +# CONFIG_SAMV7_TC7 is not set +# CONFIG_SAMV7_TC8 is not set +# CONFIG_SAMV7_TC9 is not set +# CONFIG_SAMV7_TC10 is not set +# CONFIG_SAMV7_TC11 is not set +# CONFIG_SAMV7_TRNG is not set +CONFIG_SAMV7_TWIHS0=y +# CONFIG_SAMV7_TWIHS1 is not set +# CONFIG_SAMV7_TWIHS2 is not set +# CONFIG_SAMV7_UART0 is not set +# CONFIG_SAMV7_UART1 is not set +# CONFIG_SAMV7_UART2 is not set +CONFIG_SAMV7_UART3=y +# CONFIG_SAMV7_UART4 is not set +# CONFIG_SAMV7_USBDEVHS is not set +# CONFIG_SAMV7_USBHOSTHS is not set +# CONFIG_SAMV7_USART0 is not set +# CONFIG_SAMV7_USART1 is not set +# CONFIG_SAMV7_USART2 is not set +# CONFIG_SAMV7_WDT0 is not set +# CONFIG_SAMV7_WDT1 is not set +CONFIG_SAMV7_GPIO_IRQ=y +CONFIG_SAMV7_GPIOA_IRQ=y +CONFIG_SAMV7_GPIOB_IRQ=y +# CONFIG_SAMV7_GPIOC_IRQ is not set +CONFIG_SAMV7_GPIOD_IRQ=y +# CONFIG_SAMV7_GPIOE_IRQ is not set +# CONFIG_SAMV7_PROGMEM is not set + +# +# SDRAM Configuration +# +CONFIG_SAMV7_SDRAMSIZE=2097152 +# CONFIG_SAMV7_SDRAMHEAP is not set + +# +# TWIHS device driver options +# +CONFIG_SAMV7_TWIHS0_FREQUENCY=100000 + +# +# HSMCI device driver options +# +# CONFIG_SAMV7_HSMCI_RDPROOF is not set +# CONFIG_SAMV7_HSMCI_WRPROOF is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +CONFIG_ARCH_DMA=y +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +# CONFIG_ARCH_HAVE_RESET is not set +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +CONFIG_ARCH_HAVE_RAMFUNCS=y +# CONFIG_ARCH_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=51262 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=2048 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20400000 +CONFIG_RAM_SIZE=393216 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_SAME70_XPLAINED=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="same70-xplained" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_HAVE_IRQBUTTONS=y +CONFIG_ARCH_IRQBUTTONS=y +CONFIG_NSH_MMCSDMINOR=0 +CONFIG_NSH_MMCSDSLOTNO=0 + +# +# Board-Specific Options +# +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_UNIQUEID is not set +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2014 +CONFIG_START_MONTH=3 +CONFIG_START_DAY=10 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=32 +CONFIG_WDOG_INTRESERVE=4 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=31 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 +CONFIG_SIG_SIGWORK=17 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 + +# +# Work Queue Support +# +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=224 +CONFIG_SCHED_HPWORKPERIOD=50000 +CONFIG_SCHED_HPWORKSTACKSIZE=2048 +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +CONFIG_I2C=y +# CONFIG_I2C_SLAVE is not set +CONFIG_I2C_TRANSFER=y +# CONFIG_I2C_WRITEREAD is not set +# CONFIG_I2C_POLLED is not set +# CONFIG_I2C_TRACE is not set +CONFIG_SPI=y +# CONFIG_SPI_SLAVE is not set +# CONFIG_SPI_OWNBUS is not set +CONFIG_SPI_EXCHANGE=y +# CONFIG_SPI_CMDDATA is not set +# CONFIG_SPI_CALLBACK is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_TIMERS_CS2100CP is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_DISCRETE_IO is not set +# CONFIG_LCD is not set +CONFIG_MMCSD=y +CONFIG_MMCSD_NSLOTS=1 +# CONFIG_MMCSD_READONLY is not set +CONFIG_MMCSD_MULTIBLOCK_DISABLE=y +# CONFIG_MMCSD_MMCSUPPORT is not set +CONFIG_MMCSD_HAVECARDDETECT=y +# CONFIG_MMCSD_SPI is not set +CONFIG_ARCH_HAVE_SDIO=y +# CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set +CONFIG_MMCSD_SDIO=y +# CONFIG_SDIO_PREFLIGHT is not set +# CONFIG_SDIO_MUXBUS is not set +CONFIG_SDIO_BLOCKSETUP=y +CONFIG_MTD=y + +# +# MTD Configuration +# +# CONFIG_MTD_PARTITION is not set +# CONFIG_MTD_SECT512 is not set +# CONFIG_MTD_BYTE_WRITE is not set +# CONFIG_MTD_PROGMEM is not set +CONFIG_MTD_CONFIG=y +# CONFIG_MTD_CONFIG_RAM_CONSOLIDATE is not set +CONFIG_MTD_CONFIG_ERASEDVALUE=0xff + +# +# MTD Device Drivers +# +# CONFIG_MTD_NAND is not set +# CONFIG_RAMMTD is not set +CONFIG_MTD_AT24XX=y +# CONFIG_AT24XX_MULTI is not set +CONFIG_AT24XX_SIZE=2 +CONFIG_AT24XX_ADDR=0x57 +CONFIG_AT24XX_EXTENDED=y +CONFIG_AT24XX_EXTSIZE=160 +CONFIG_AT24XX_FREQUENCY=100000 +CONFIG_MTD_AT25=y +CONFIG_AT25_SPIMODE=0 +CONFIG_AT25_SPIFREQUENCY=20000000 +# CONFIG_MTD_AT45DB is not set +# CONFIG_MTD_M25P is not set +# CONFIG_MTD_S25FL1 is not set +# CONFIG_MTD_SMART is not set +# CONFIG_MTD_RAMTRON is not set +# CONFIG_MTD_SST25 is not set +# CONFIG_MTD_SST25XX is not set +# CONFIG_MTD_SST39FV is not set +# CONFIG_MTD_W25 is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +CONFIG_ARCH_HAVE_UART3=y +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_UART3_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART3 Configuration +# +CONFIG_UART3_RXBUFSIZE=256 +CONFIG_UART3_TXBUFSIZE=256 +CONFIG_UART3_BAUD=115200 +CONFIG_UART3_BITS=8 +CONFIG_UART3_PARITY=0 +CONFIG_UART3_2STOP=0 +# CONFIG_UART3_IFLOWCONTROL is not set +# CONFIG_UART3_OFLOWCONTROL is not set +# CONFIG_UART3_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +CONFIG_FAT_LCNAMES=y +CONFIG_FAT_LFN=y +CONFIG_FAT_MAXFNAME=32 +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set +# CONFIG_NETDB_HOSTFILE is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +CONFIG_EXAMPLES_BUTTONS=y +CONFIG_EXAMPLES_BUTTONS_MIN=0 +CONFIG_EXAMPLES_BUTTONS_MAX=1 +CONFIG_EXAMPLES_IRQBUTTONS_MIN=0 +CONFIG_EXAMPLES_IRQBUTTONS_MAX=1 +CONFIG_EXAMPLES_BUTTONS_NAME0="SW0" +CONFIG_EXAMPLES_BUTTONS_NAME1="SW1" +CONFIG_EXAMPLES_BUTTONS_NAME2="Button 2" +CONFIG_EXAMPLES_BUTTONS_NAME3="Button 3" +CONFIG_EXAMPLES_BUTTONS_NAME4="Button 4" +CONFIG_EXAMPLES_BUTTONS_NAME5="Button 5" +CONFIG_EXAMPLES_BUTTONS_NAME6="Button 6" +CONFIG_EXAMPLES_BUTTONS_NAME7="Button 7" +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFATFS is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +# CONFIG_NSH_CMDOPT_DF_H is not set +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +CONFIG_NSH_ARCHINIT=y + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_FLASH_ERASEALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +CONFIG_SYSTEM_I2CTOOL=y +CONFIG_I2CTOOL_MINBUS=0 +CONFIG_I2CTOOL_MAXBUS=0 +CONFIG_I2CTOOL_MINADDR=0x03 +CONFIG_I2CTOOL_MAXADDR=0x77 +CONFIG_I2CTOOL_MAXREGADDR=0xff +CONFIG_I2CTOOL_DEFFREQ=400000 +# CONFIG_SYSTEM_INIFILE is not set +CONFIG_SYSTEM_RAMTEST=y +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_RAMTRON is not set +# CONFIG_SYSTEM_SDCARD is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/same70-xplained/nsh/setenv.sh b/configs/same70-xplained/nsh/setenv.sh new file mode 100755 index 00000000000..8fda2eca920 --- /dev/null +++ b/configs/same70-xplained/nsh/setenv.sh @@ -0,0 +1,77 @@ +#!/bin/bash +# configs/samv7-xult/nsh/Make.defs +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the Atmel GCC +# toolchain under Windows. You will also have to edit this if you install +# this toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atmel/Atmel Toolchain/ARM GCC/Native/4.7.3.99/arm-gnu-toolchain/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +# export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# This is the location where I installed the ARM "GNU Tools for ARM Embedded Processors" +# You can this free toolchain here https://launchpad.net/gcc-arm-embedded +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/GNU Tools ARM Embedded/4.9 2015q2/bin" + +# This is the path to the location where I installed the devkitARM toolchain +# You can get this free toolchain from http://devkitpro.org/ or http://sourceforge.net/projects/devkitpro/ +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/devkitARM/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +# export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/same70-xplained/scripts/flash-dtcm.ld b/configs/same70-xplained/scripts/flash-dtcm.ld new file mode 100644 index 00000000000..28f618fe414 --- /dev/null +++ b/configs/same70-xplained/scripts/flash-dtcm.ld @@ -0,0 +1,122 @@ +/**************************************************************************** + * configs/same70-xplained/scripts/flash-dtcm.ld + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The SAME70Q21 has 2048Kb of FLASH beginning at address 0x0040:0000 and + * 384Kb of SRAM beginining at 0x2040:0000 + * + * When booting from FLASH, FLASH memory is aliased to address 0x0000:0000 + * where the code expects to begin execution by jumping to the entry point in + * the 0x0400:0000 address range (Assuming that ITCM is not enable). + * + * NOTE: that the DTCM address of 0x2000:0000 is used for SRAM. If DTCM is + * disabled, then the accesses will actually occur on the AHB bus. + */ + +MEMORY +{ + flash (rx) : ORIGIN = 0x00400000, LENGTH = 2048K + sram (rwx) : ORIGIN = 0x20000000, LENGTH = 384K +} + +OUTPUT_ARCH(arm) +EXTERN(_vectors) +ENTRY(_stext) + +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > flash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > flash + + .ARM.extab : { + *(.ARM.extab*) + } > flash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > flash + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > sram AT > flash + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > sram + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/same70-xplained/scripts/flash-sram.ld b/configs/same70-xplained/scripts/flash-sram.ld new file mode 100644 index 00000000000..e1dff4a10f7 --- /dev/null +++ b/configs/same70-xplained/scripts/flash-sram.ld @@ -0,0 +1,119 @@ +/**************************************************************************** + * configs/same70-xplained/scripts/flash-sram.ld + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The SAME70Q21 has 2048Kb of FLASH beginning at address 0x0040:0000 and + * 384Kb of SRAM beginining at 0x2040:0000 + * + * When booting from FLASH, FLASH memory is aliased to address 0x0000:0000 + * where the code expects to begin execution by jumping to the entry point in + * the 0x0400:0000 address range (Assuming that ITCM is not enable). + */ + +MEMORY +{ + flash (rx) : ORIGIN = 0x00400000, LENGTH = 2048K + sram (rwx) : ORIGIN = 0x20400000, LENGTH = 384K +} + +OUTPUT_ARCH(arm) +EXTERN(_vectors) +ENTRY(_stext) + +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > flash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > flash + + .ARM.extab : { + *(.ARM.extab*) + } > flash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > flash + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > sram AT > flash + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > sram + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/same70-xplained/scripts/gnu-elf.ld b/configs/same70-xplained/scripts/gnu-elf.ld new file mode 100644 index 00000000000..d811db5a692 --- /dev/null +++ b/configs/same70-xplained/scripts/gnu-elf.ld @@ -0,0 +1,129 @@ +/**************************************************************************** + * configs/same70-xplained/scripts/gnu-elf.ld + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +SECTIONS +{ + .text 0x00000000 : + { + _stext = . ; + *(.text) + *(.text.*) + *(.gnu.warning) + *(.stub) + *(.glue_7) + *(.glue_7t) + *(.jcr) + + /* C++ support: The .init and .fini sections contain specific logic + * to manage static constructors and destructors. + */ + + *(.gnu.linkonce.t.*) + *(.init) /* Old ABI */ + *(.fini) /* Old ABI */ + _etext = . ; + } + + .rodata : + { + _srodata = . ; + *(.rodata) + *(.rodata1) + *(.rodata.*) + *(.gnu.linkonce.r*) + _erodata = . ; + } + + .data : + { + _sdata = . ; + *(.data) + *(.data1) + *(.data.*) + *(.gnu.linkonce.d*) + _edata = . ; + } + + /* C++ support. For each global and static local C++ object, + * GCC creates a small subroutine to construct the object. Pointers + * to these routines (not the routines themselves) are stored as + * simple, linear arrays in the .ctors section of the object file. + * Similarly, pointers to global/static destructor routines are + * stored in .dtors. + */ + + .ctors : + { + _sctors = . ; + *(.ctors) /* Old ABI: Unallocated */ + *(.init_array) /* New ABI: Allocated */ + _edtors = . ; + } + + .dtors : + { + _sdtors = . ; + *(.dtors) /* Old ABI: Unallocated */ + *(.fini_array) /* New ABI: Allocated */ + _edtors = . ; + } + + .bss : + { + _sbss = . ; + *(.bss) + *(.bss.*) + *(.sbss) + *(.sbss.*) + *(.gnu.linkonce.b*) + *(COMMON) + _ebss = . ; + } + + /* Stabs debugging sections. */ + + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/same70-xplained/scripts/kernel-space.ld b/configs/same70-xplained/scripts/kernel-space.ld new file mode 100644 index 00000000000..8864c96b9ea --- /dev/null +++ b/configs/same70-xplained/scripts/kernel-space.ld @@ -0,0 +1,111 @@ +/**************************************************************************** + * configs/same70-xplained/scripts/kernel-space.ld + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* NOTE: This depends on the memory.ld script having been included prior to + * this script. + */ + +OUTPUT_ARCH(arm) +EXTERN(_vectors) +ENTRY(_stext) + +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > kflash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > kflash + + .ARM.extab : { + *(.ARM.extab*) + } > kflash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > kflash + + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > ksram AT > kflash + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > ksram + + /* Stabs debugging sections */ + + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/same70-xplained/scripts/memory.ld b/configs/same70-xplained/scripts/memory.ld new file mode 100644 index 00000000000..65673b3d84a --- /dev/null +++ b/configs/same70-xplained/scripts/memory.ld @@ -0,0 +1,84 @@ +/**************************************************************************** + * configs/same70-xplained/scripts/memory.ld + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The SAME70Q21 has 2048Kb of FLASH beginning at address 0x0040:0000 and + * 384Kb of SRAM beginining at 0x2040:0000 + * + * When booting from FLASH, FLASH memory is aliased to address 0x0000:0000 + * where the code expects to begin execution by jumping to the entry point in + * the 0x0400:0000 address range. + * + * NOTE: that the DTCM address of 0x2000:0000 is used for SRAM. If DTCM is + * disabled, then the accesses will actually occur on the AHB bus. + * + * The user space partition will be spanned with a single region of size + * 2**n bytes. The alignment of the user-space region must be the same. + * As a consequence, as the user-space increases in size, the alignment + * requirement also increases. The sizes below give the largest possible + * user address spaces (but leave far too much for the OS). + * + * The solution to this wasted memory is to (1) use more than one region to + * span the user spaces, or (2) poke holes in a larger region to trim it + * to fit better. + * + * A detailed memory map for the 384KB SRAM region is as follows: + * + * 0x20000 0000: Kernel .data region. Typical size: 0.1KB + * ------- ---- Kernel .bss region. Typical size: 1.8KB + * 0x20000 0800: Kernel IDLE thread stack (approximate). Size is + * determined by CONFIG_IDLETHREAD_STACKSIZE and + * adjustments for alignment. Typical is 1KB. + * ------- ---- Padded to 4KB + * 0x20002 0000: User .data region. Size is variable. + * ------- ---- User .bss region Size is variable. + * 0x20000 2000: Beginning of kernel heap. Size determined by + * CONFIG_MM_KERNEL_HEAPSIZE. + * ------- ---- Beginning of user heap. Can vary with other settings. + * 0x20004 0000: End+1 of mappable internal SRAM + */ + +MEMORY +{ + /* 2048KiB of internal FLASH */ + + kflash (rx) : ORIGIN = 0x00400000, LENGTH = 1M + uflash (rx) : ORIGIN = 0x00500000, LENGTH = 1M + + /* 384Kb of internal SRAM */ + + ksram (rwx) : ORIGIN = 0x20000000, LENGTH = 128K + usram (rwx) : ORIGIN = 0x20020000, LENGTH = 128K + xsram (rwx) : ORIGIN = 0x20040000, LENGTH = 128K +} diff --git a/configs/same70-xplained/scripts/user-space.ld b/configs/same70-xplained/scripts/user-space.ld new file mode 100644 index 00000000000..bdb149ca83a --- /dev/null +++ b/configs/same70-xplained/scripts/user-space.ld @@ -0,0 +1,126 @@ +/**************************************************************************** + * configs/same70-xplained/scripts/user-space.ld + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* NOTE: This depends on the memory.ld script having been included prior to + * this script. + */ + +/* Make sure that the critical memory management functions are in user-space. + * the user heap memory manager will reside in user-space but be usable both + * by kernel- and user-space code + */ + +EXTERN(umm_initialize) +EXTERN(umm_addregion) +EXTERN(umm_trysemaphore) +EXTERN(umm_givesemaphore) + +EXTERN(malloc) +EXTERN(realloc) +EXTERN(zalloc) +EXTERN(free) + +OUTPUT_ARCH(arm) +SECTIONS +{ + .userspace : { + *(.userspace) + } > uflash + + .text : { + _stext = ABSOLUTE(.); + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > uflash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > uflash + + .ARM.extab : { + *(.ARM.extab*) + } > uflash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > uflash + + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > usram AT > uflash + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > usram + + /* Stabs debugging sections */ + + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/same70-xplained/src/Makefile b/configs/same70-xplained/src/Makefile new file mode 100644 index 00000000000..2f58a943c76 --- /dev/null +++ b/configs/same70-xplained/src/Makefile @@ -0,0 +1,101 @@ +############################################################################ +# configs/same70-xplained/src/Makefile +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = sam_boot.c + +ifeq ($(CONFIG_SAMV7_SDRAMC),y) +CSRCS += sam_sdram.c +endif + +ifeq ($(CONFIG_HAVE_CXX),y) +CSRCS += sam_cxxinitialize.c +endif + +ifeq ($(CONFIG_NSH_ARCHINIT),y) +CSRCS += sam_nsh.c sam_bringup.c +else ifeq ($(CONFIG_BOARD_INITIALIZE),y) +CSRCS += sam_bringup.c +endif + +ifeq ($(CONFIG_HAVE_CXXINITIALIZE),y) +CSRCS += sam_cxxinitialize.c +endif + +ifeq ($(CONFIG_ARCH_LEDS),y) +CSRCS += sam_autoleds.c +else +CSRCS += sam_userleds.c +endif + +ifeq ($(CONFIG_ARCH_BUTTONS),y) +CSRCS += sam_buttons.c +endif + +ifeq ($(CONFIG_SAMV7_HSMCI0),y) +CSRCS += sam_hsmci.c +endif + +ifeq ($(CONFIG_SAMV7_EMAC),y) +CSRCS += sam_ethernet.c +endif + +ifeq ($(CONFIG_SAMV7_USBDEVHS),y) +CSRCS += sam_usbdev.c +endif + +ifeq ($(CONFIG_SAMV7_SPI),y) +CSRCS += sam_spi.c +endif + +ifeq ($(CONFIG_USBMSC),y) +CSRCS += sam_usbmsc.c +endif + +ifeq ($(CONFIG_SAMV7_MCAN),y) +CSRCS += sam_mcan.c +endif + +ifeq ($(CONFIG_MTD_CONFIG),y) +ifeq ($(CONFIG_SAMV7_TWIHS0),y) +ifeq ($(CONFIG_MTD_AT24XX),y) +CSRCS += sam_at24config.c +endif +endif +endif + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/same70-xplained/src/sam_at24config.c b/configs/same70-xplained/src/sam_at24config.c new file mode 100644 index 00000000000..1a34e8fc42a --- /dev/null +++ b/configs/same70-xplained/src/sam_at24config.c @@ -0,0 +1,112 @@ +/************************************************************************************ + * configs/same70-xplained/src/sam_at24config.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include + +#include +#include +#include + +#include "sam_twihs.h" +#include "same70-xplained.h" + +#ifdef HAVE_MTDCONFIG + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: sam_at24config + * + * Description: + * Create an AT24xx-based MTD configuration device for storage device configuration + * information. + * + ************************************************************************************/ + +int sam_at24config(void) +{ + struct i2c_dev_s *i2c; + struct mtd_dev_s *at24; + int ret; + + /* Get an instance of the TWI0 interface */ + + i2c = up_i2cinitialize(0); + if (!i2c) + { + fdbg("ERROR: Failed to initialize TWI0\n"); + return -ENODEV; + } + + /* Initialize the AT24 driver */ + + at24 = at24c_initialize(i2c); + if (!at24) + { + fdbg("ERROR: Failed to initialize the AT24 driver\n"); + (void)up_i2cuninitialize(i2c); + return -ENODEV; + } + + /* Make sure that the AT24 is in normal memory access mode */ + + ret = at24->ioctl(at24, MTDIOC_EXTENDED, 0); + if (ret < 0) + { + fdbg("ERROR: AT24 ioctl(MTDIOC_EXTENDED) failed: %d\n", ret); + } + + /* Bind the instance of an MTD device to the /dev/config device. */ + + ret = mtdconfig_register(at24); + if (ret < 0) + { + fdbg("ERROR: Failed to bind AT24 driver to the MTD config device\n"); + (void)up_i2cuninitialize(i2c); + } + + return ret; +} + +#endif /* HAVE_MTDCONFIG */ diff --git a/configs/same70-xplained/src/sam_autoleds.c b/configs/same70-xplained/src/sam_autoleds.c new file mode 100644 index 00000000000..96c80a1b6ec --- /dev/null +++ b/configs/same70-xplained/src/sam_autoleds.c @@ -0,0 +1,173 @@ +/**************************************************************************** + * configs/same70-xplained/include/sam_autoleds.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* LEDs + * + * There are two yellow LED available on the SAM E70 Xplained board that + * can be turned on and off. The LEDs can be activated by driving the + * connected I/O line to GND. + * + * ------ ----------- --------------------- + * SAME70 Function Shared functionality + * PIO + * ------ ----------- --------------------- + * PA23 Yellow LED0 EDBG GPIO + * PC09 Yellow LED1 LCD, and Shield + * ------ ----------- --------------------- + * + * These LEDs are not used by the board port unless CONFIG_ARCH_LEDS is + * defined. In that case, the usage by the board port is defined in + * include/board.h and src/sam_autoleds.c. The LEDs are used to encode + * OS-related events as follows: + * + * ------------------- ----------------------- -------- -------- + * SYMBOL Meaning LED state + * LED0 LED1 + * ------------------- ----------------------- -------- -------- + * LED_STARTED NuttX has been started OFF OFF + * LED_HEAPALLOCATE Heap has been allocated OFF OFF + * LED_IRQSENABLED Interrupts enabled OFF OFF + * LED_STACKCREATED Idle stack created ON OFF + * LED_INIRQ In an interrupt No change + * LED_SIGNAL In a signal handler No change + * LED_ASSERTION An assertion failed No change + * LED_PANIC The system has crashed N/C Blinking + * LED_IDLE MCU is is sleep mode Not used + * ------------------- ----------------------- -------- -------- + * + * Thus if LED0 is statically on, NuttX has successfully booted and is, + * apparently, running normally. If LED1 is flashing at approximately + * 2Hz, then a fatal error has been detected and the system has halted. + * + * NOTE: That LED0 is not used after completion of booting and may + * be used by other board-specific logic. + */ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "sam_gpio.h" +#include "same70-xplained.h" + +#ifdef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# define ledvdbg llvdbg +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_autoled_initialize + ****************************************************************************/ + +void board_autoled_initialize(void) +{ + /* Configure LED PIOs for output */ + + sam_configgpio(GPIO_LED0); + sam_configgpio(GPIO_LED1); +} + +/**************************************************************************** + * Name: board_autoled_on + ****************************************************************************/ + +void board_autoled_on(int led) +{ + switch (led) + { + case 0: /* LED_STARTED, LED_HEAPALLOCATE, LED_IRQSENABLED */ + break; + + case 1: /* LED_STACKCREATED */ + sam_gpiowrite(GPIO_LED0, false); /* Low illuminates */ + break; + + default: + case 2: /* LED_INIRQ, LED_SIGNAL, LED_ASSERTION */ + return; + + case 3: /* LED_PANIC */ + sam_gpiowrite(GPIO_LED1, false); /* Low illuminates */ + break; + } +} + +/**************************************************************************** + * Name: board_autoled_off + ****************************************************************************/ + +void board_autoled_off(int led) +{ + if (led == 3) + { + sam_gpiowrite(GPIO_LED1, true); /* High extinguishes */ + } +} + +#endif /* CONFIG_ARCH_LEDS */ diff --git a/configs/same70-xplained/src/sam_boot.c b/configs/same70-xplained/src/sam_boot.c new file mode 100644 index 00000000000..bd3f7954ee4 --- /dev/null +++ b/configs/same70-xplained/src/sam_boot.c @@ -0,0 +1,131 @@ +/**************************************************************************** + * configs/same70-xplained/src/sam_boot.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include + +#include "up_arch.h" +#include "sam_start.h" +#include "same70-xplained.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: sam_boardinitialize + * + * Description: + * All SAMV7 architectures must provide the following entry point. This + * entry point is called early in the initialization -- after clocking and + * memory have been configured but before caches have been enabled and + * before any devices have been initialized. + * + ****************************************************************************/ + +void sam_boardinitialize(void) +{ +#ifdef CONFIG_SAMV7_SDRAMC + /* Configure SDRAM if it has been enabled in the NuttX configuration. + * Here we assume, of course, that we are not running out SDRAM. + */ + + sam_sdram_config(); +#endif + +#ifdef CONFIG_SAMV7_SPI + /* Configure SPI chip selects if SPI has been enabled */ + + sam_spi_initialize(); +#endif + +#ifdef HAVE_USB + /* Setup USB-related GPIO pins for the SAME70-XPLD board. */ + + sam_usbinitialize(); +#endif + +#ifdef HAVE_NETWORK + /* Configure board resources to support networking if the 1) networking is + * enabled, and 2) the EMAC module is enabled + */ + + sam_netinitialize(); +#endif + + /* Configure on-board LEDs if LED support has been selected. */ + +#ifdef CONFIG_ARCH_LEDS + board_autoled_initialize(); +#endif +} + +/**************************************************************************** + * Name: board_initialize + * + * Description: + * If CONFIG_BOARD_INITIALIZE is selected, then an additional + * initialization call will be performed in the boot-up sequence to a + * function called board_initialize(). board_initialize() will be + * called immediately after up_intitialize() is called and just before the + * initial application is started. This additional initialization phase + * may be used, for example, to initialize board-specific device drivers. + * + ****************************************************************************/ + +#ifdef CONFIG_BOARD_INITIALIZE +void board_initialize(void) +{ + /* Perform board initialization */ + + (void)sam_bringup(); +} +#endif /* CONFIG_BOARD_INITIALIZE */ diff --git a/configs/same70-xplained/src/sam_bringup.c b/configs/same70-xplained/src/sam_bringup.c new file mode 100644 index 00000000000..b4b7dd2050d --- /dev/null +++ b/configs/same70-xplained/src/sam_bringup.c @@ -0,0 +1,270 @@ +/**************************************************************************** + * config/same70-xplained/src/sam_bringup.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include +#include +#include + +#ifdef CONFIG_SYSTEM_USBMONITOR +# include +#endif + +#include +#include +#include +#include + +#include "same70-xplained.h" + +#ifdef HAVE_PROGMEM_CHARDEV +# include +# include "sam_progmem.h" +#endif + +#ifdef HAVE_ROMFS +# include +#endif + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#define NSECTORS(n) \ + (((n)+CONFIG_SAME70XPLAINED_ROMFS_ROMDISK_SECTSIZE-1) / \ + CONFIG_SAME70XPLAINED_ROMFS_ROMDISK_SECTSIZE) + +/* Debug ********************************************************************/ + +#ifdef CONFIG_BOARD_INITIALIZE +# define SYSLOG lldbg +#else +# define SYSLOG dbg +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: sam_bringup + * + * Description: + * Bring up board features + * + ****************************************************************************/ + +int sam_bringup(void) +{ +#ifdef HAVE_PROGMEM_CHARDEV + FAR struct mtd_dev_s *mtd; + char blockdev[18]; + char chardev[12]; +#endif + int ret; + +#ifdef HAVE_MACADDR + /* Read the Ethernet MAC address from the AT24 FLASH and configure the + * Ethernet driver with that address. + */ + + ret = sam_emac0_setmac(); + if (ret < 0) + { + SYSLOG("ERROR: sam_emac0_setmac() failed: %d\n", ret); + } +#endif + +#ifdef HAVE_MTDCONFIG + /* Create an AT24xx-based MTD configuration device for storage device + * configuration information. + */ + + ret = sam_at24config(); + if (ret < 0) + { + SYSLOG("ERROR: sam_at24config() failed: %d\n", ret); + } +#endif + +#ifdef HAVE_HSMCI + /* Initialize the HSMCI0 driver */ + + ret = sam_hsmci_initialize(HSMCI0_SLOTNO, HSMCI0_MINOR); + if (ret < 0) + { + SYSLOG("ERROR: sam_hsmci_initialize(%d,%d) failed: %d\n", + HSMCI0_SLOTNO, HSMCI0_MINOR, ret); + } + +#ifdef CONFIG_SAME70XPLAINED_HSMCI0_MOUNT + else + { + /* REVISIT: A delay seems to be required here or the mount will fail. */ + /* Mount the volume on HSMCI0 */ + + ret = mount(CONFIG_SAME70XPLAINED_HSMCI0_MOUNT_BLKDEV, + CONFIG_SAME70XPLAINED_HSMCI0_MOUNT_MOUNTPOINT, + CONFIG_SAME70XPLAINED_HSMCI0_MOUNT_FSTYPE, + 0, NULL); + + if (ret < 0) + { + SYSLOG("ERROR: Failed to mount %s: %d\n", + CONFIG_SAME70XPLAINED_HSMCI0_MOUNT_MOUNTPOINT, errno); + } + } + +#endif /* CONFIG_SAME70XPLAINED_HSMCI0_MOUNT */ +#endif /* HAVE_HSMCI */ + +#ifdef HAVE_AUTOMOUNTER + /* Initialize the auto-mounter */ + + sam_automount_initialize(); +#endif + +#ifdef HAVE_ROMFS + /* Create a ROM disk for the /etc filesystem */ + + ret = romdisk_register(CONFIG_SAME70XPLAINED_ROMFS_ROMDISK_MINOR, romfs_img, + NSECTORS(romfs_img_len), + CONFIG_SAME70XPLAINED_ROMFS_ROMDISK_SECTSIZE); + if (ret < 0) + { + SYSLOG("ERROR: romdisk_register failed: %d\n", -ret); + } + else + { + /* Mount the file system */ + + ret = mount(CONFIG_SAME70XPLAINED_ROMFS_ROMDISK_DEVNAME, + CONFIG_SAME70XPLAINED_ROMFS_MOUNT_MOUNTPOINT, + "romfs", MS_RDONLY, NULL); + if (ret < 0) + { + SYSLOG("ERROR: mount(%s,%s,romfs) failed: %d\n", + CONFIG_SAME70XPLAINED_ROMFS_ROMDISK_DEVNAME, + CONFIG_SAME70XPLAINED_ROMFS_MOUNT_MOUNTPOINT, errno); + } + } +#endif + +#ifdef HAVE_PROGMEM_CHARDEV + /* Initialize the SAME70 FLASH programming memory library */ + + sam_progmem_initialize(); + + /* Create an instance of the SAME70 FLASH program memory device driver */ + + mtd = progmem_initialize(); + if (!mtd) + { + SYSLOG("ERROR: progmem_initialize failed\n"); + } + + /* Use the FTL layer to wrap the MTD driver as a block driver */ + + ret = ftl_initialize(PROGMEM_MTD_MINOR, mtd); + if (ret < 0) + { + SYSLOG("ERROR: Failed to initialize the FTL layer: %d\n", ret); + return ret; + } + + /* Use the minor number to create device paths */ + + snprintf(blockdev, 18, "/dev/mtdblock%d", PROGMEM_MTD_MINOR); + snprintf(chardev, 12, "/dev/mtd%d", PROGMEM_MTD_MINOR); + + /* Now create a character device on the block device */ + + ret = bchdev_register(blockdev, chardev, false); + if (ret < 0) + { + SYSLOG("ERROR: bchdev_register %s failed: %d\n", chardev, ret); + return ret; + } +#endif + +#ifdef HAVE_USBHOST + /* Initialize USB host operation. sam_usbhost_initialize() starts a thread + * will monitor for USB connection and disconnection events. + */ + + ret = sam_usbhost_initialize(); + if (ret != OK) + { + SYSLOG("ERROR: Failed to initialize USB host: %d\n", ret); + } +#endif + +#ifdef HAVE_USBMONITOR + /* Start the USB Monitor */ + + ret = usbmonitor_start(0, NULL); + if (ret != OK) + { + SYSLOG("ERROR: Failed to start the USB monitor: %d\n", ret); + } +#endif + +#ifdef HAVE_ELF + /* Initialize the ELF binary loader */ + + SYSLOG("Initializing the ELF binary loader\n"); + ret = elf_initialize(); + if (ret < 0) + { + SYSLOG("ERROR: Initialization of the ELF loader failed: %d\n", ret); + } +#endif + + /* If we got here then perhaps not all initialization was successful, but + * at least enough succeeded to bring-up NSH with perhaps reduced + * capabilities. + */ + + UNUSED(ret); + return OK; +} diff --git a/configs/same70-xplained/src/sam_buttons.c b/configs/same70-xplained/src/sam_buttons.c new file mode 100644 index 00000000000..b005fd937a3 --- /dev/null +++ b/configs/same70-xplained/src/sam_buttons.c @@ -0,0 +1,239 @@ +/**************************************************************************** + * configs/sam4e-ek/src/sam_buttons.c + * + * Copyright (C) 2014-2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "sam_gpio.h" +#include "chip/sam_matrix.h" +#include "same70-xplained.h" + +#ifdef CONFIG_ARCH_BUTTONS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +#ifdef CONFIG_ARCH_IRQBUTTONS + +#define HAVE_IRQBUTTONS 1 +#if !defined(CONFIG_SAMV7_GPIOA_IRQ) && !defined(CONFIG_SAMV7_GPIOB_IRQ) +# undef HAVE_IRQBUTTONS +#endif + +#ifdef CONFIG_SAMV7_GPIOA_IRQ +static xcpt_t g_irq_sw0; +#endif +#ifdef CONFIG_SAMV7_GPIOB_IRQ +static xcpt_t g_irq_sw1; +#endif +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_button_irqx + * + * Description: + * This function implements the core of the board_button_irq() logic. + * + ****************************************************************************/ + +#ifdef HAVE_IRQBUTTONS +static xcpt_t board_button_irqx(gpio_pinset_t pinset, int irq, + xcpt_t irqhandler, xcpt_t *store) +{ + xcpt_t oldhandler; + irqstate_t flags; + + /* Disable interrupts until we are done. This guarantees that the following + * operations are atomic. + */ + + flags = irqsave(); + + /* Get the old button interrupt handler and save the new one */ + + oldhandler = *store; + *store = irqhandler; + + /* Are we attaching or detaching? */ + + if (irqhandler != NULL) + { + /* Configure the interrupt */ + + sam_gpioirq(pinset); + (void)irq_attach(irq, irqhandler); + sam_gpioirqenable(irq); + } + else + { + /* Detach and disable the interrupt */ + + (void)irq_detach(irq); + sam_gpioirqdisable(irq); + } + + irqrestore(flags); + + /* Return the old button handler (so that it can be restored) */ + + return oldhandler; +} +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_button_initialize + * + * Description: + * board_button_initialize() must be called to initialize button resources. + * After that, board_buttons() may be called to collect the current state + * of all buttons or board_button_irq() may be called to register button + * interrupt handlers. + * + ****************************************************************************/ + +void board_button_initialize(void) +{ + uint32_t regval; + + /* PB12 is set up as a system flash ERASE pin when the firmware boots. To + * use the SW1, PB12 has to be configured as a normal regular I/O pin in + * the MATRIX module. For more information see the SAM E70 datasheet. + */ + + regval = getreg32(SAM_MATRIX_CCFG_SYSIO); + regval |= MATRIX_CCFG_SYSIO_SYSIO12; + putreg32(regval, SAM_MATRIX_CCFG_SYSIO); + + /* Configure button PIOs */ + + (void)sam_configgpio(GPIO_SW0); + (void)sam_configgpio(GPIO_SW1); +} + +/**************************************************************************** + * Name: board_buttons + * + * Description: + * After board_button_initialize() has been called, board_buttons() may be + * called to collect the state of all buttons. board_buttons() returns an + * 8-bit bit set with each bit associated with a button. See the BUTTON* + * definitions above for the meaning of each bit in the returned value. + * + ****************************************************************************/ + +uint8_t board_buttons(void) +{ + uint8_t retval; + + retval = sam_gpioread(GPIO_SW0) ? 0 : BUTTON_SW0_BIT; + retval |= sam_gpioread(GPIO_SW1) ? 0 : BUTTON_SW1_BIT; + + return retval; +} + +/**************************************************************************** + * Name: board_button_irq + * + * Description: + * This function may be called to register an interrupt handler that will + * be called when a button is depressed or released. The ID value is one + * of the BUTTON* definitions provided above. The previous interrupt + * handler address is returned (so that it may restored, if so desired). + * + * Configuration Notes: + * Configuration CONFIG_AVR32_GPIOIRQ must be selected to enable the + * overall GPIO IRQ feature and CONFIG_AVR32_GPIOIRQSETA and/or + * CONFIG_AVR32_GPIOIRQSETB must be enabled to select GPIOs to support + * interrupts on. For button support, bits 2 and 3 must be set in + * CONFIG_AVR32_GPIOIRQSETB (PB2 and PB3). + * + ****************************************************************************/ + +#ifdef CONFIG_ARCH_IRQBUTTONS +xcpt_t board_button_irq(int id, xcpt_t irqhandler) +{ +#ifdef HAVE_IRQBUTTONS + + switch (id) + { +#ifdef CONFIG_SAMV7_GPIOA_IRQ + case BUTTON_SW0: + return board_button_irqx(GPIO_SW0, IRQ_SW0, irqhandler, &g_irq_sw0); +#endif + +#ifdef CONFIG_SAMV7_GPIOB_IRQ + case BUTTON_SW1: + return board_button_irqx(GPIO_SW1, IRQ_SW1, irqhandler, &g_irq_sw1); +#endif + + default: + return NULL; + } + +#else + + return NULL; + +#endif +} +#endif + +#endif /* CONFIG_ARCH_BUTTONS */ diff --git a/configs/same70-xplained/src/sam_cxxinitialize.c b/configs/same70-xplained/src/sam_cxxinitialize.c new file mode 100644 index 00000000000..f8910cb1a29 --- /dev/null +++ b/configs/same70-xplained/src/sam_cxxinitialize.c @@ -0,0 +1,150 @@ +/************************************************************************************ + * configs/same70-xplained/src/sam_cxxinitialize.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include + +#if defined(CONFIG_HAVE_CXX) && defined(CONFIG_HAVE_CXXINITIALIZE) + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* Debug ****************************************************************************/ +/* Non-standard debug that may be enabled just for testing the static constructors */ + +#ifndef CONFIG_DEBUG +# undef CONFIG_DEBUG_CXX +#endif + +#ifdef CONFIG_DEBUG_CXX +# define cxxdbg dbg +# define cxxlldbg lldbg +# ifdef CONFIG_DEBUG_VERBOSE +# define cxxvdbg vdbg +# define cxxllvdbg llvdbg +# else +# define cxxvdbg(x...) +# define cxxllvdbg(x...) +# endif +#else +# define cxxdbg(x...) +# define cxxlldbg(x...) +# define cxxvdbg(x...) +# define cxxllvdbg(x...) +#endif + +/************************************************************************************ + * Private Types + ************************************************************************************/ +/* This type defines one entry in initialization array */ + +typedef void (*initializer_t)(void); + +/************************************************************************************ + * External references + ************************************************************************************/ +/* _sinit and _einit are symbols exported by the linker script that mark the + * beginning and the end of the C++ initialization section. + */ + +extern initializer_t _sinit; +extern initializer_t _einit; + +/* _stext and _etext are symbols exported by the linker script that mark the + * beginning and the end of text. + */ + +extern uint32_t _stext; +extern uint32_t _etext; + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/**************************************************************************** + * Name: up_cxxinitialize + * + * Description: + * If C++ and C++ static constructors are supported, then this function + * must be provided by board-specific logic in order to perform + * initialization of the static C++ class instances. + * + * This function should then be called in the application-specific + * user_start logic in order to perform the C++ initialization. NOTE + * that no component of the core NuttX RTOS logic is involved; This + * function defintion only provides the 'contract' between application + * specific C++ code and platform-specific toolchain support + * + ****************************************************************************/ + +void up_cxxinitialize(void) +{ + initializer_t *initp; + + cxxdbg("_sinit: %p _einit: %p _stext: %p _etext: %p\n", + &_sinit, &_einit, &_stext, &_etext); + + /* Visit each entry in the initialization table */ + + for (initp = &_sinit; initp != &_einit; initp++) + { + initializer_t initializer = *initp; + cxxdbg("initp: %p initializer: %p\n", initp, initializer); + + /* Make sure that the address is non-NULL and lies in the text region + * defined by the linker script. Some toolchains may put NULL values + * or counts in the initialization table + */ + + if ((void*)initializer > (void*)&_stext && (void*)initializer < (void*)&_etext) + { + cxxdbg("Calling %p\n", initializer); + initializer(); + } + } +} + +#endif /* CONFIG_HAVE_CXX && CONFIG_HAVE_CXXINITIALIZE */ diff --git a/configs/same70-xplained/src/sam_ethernet.c b/configs/same70-xplained/src/sam_ethernet.c new file mode 100644 index 00000000000..e8cddf822d4 --- /dev/null +++ b/configs/same70-xplained/src/sam_ethernet.c @@ -0,0 +1,379 @@ +/************************************************************************************ + * configs/same70-xplained/src/sam_ethernet.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +/* Force verbose debug on in this file only to support unit-level testing. */ + +#ifdef CONFIG_NETDEV_PHY_DEBUG +# undef CONFIG_DEBUG_VERBOSE +# define CONFIG_DEBUG_VERBOSE 1 +# undef CONFIG_DEBUG_NET +# define CONFIG_DEBUG_NET 1 +#endif + +#include +#include +#include +#include + +#include +#include +#include +#include + +#include "sam_gpio.h" +#include "sam_twihs.h" +#include "sam_ethernet.h" + +#include "same70-xplained.h" + +#ifdef HAVE_NETWORK + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +#define SAMV7_EMAC0_DEVNAME "eth0" + +#define AT24XX_MACADDR_OFFSET 0x9a + +/* Debug ********************************************************************/ +/* Extra, in-depth debug output that is only available if + * CONFIG_NETDEV_PHY_DEBUG us defined. + */ + +#ifdef CONFIG_NETDEV_PHY_DEBUG +# define phydbg dbg +# define phylldbg lldbg +#else +# define phydbg(x...) +# define phylldbg(x...) +#endif + +/************************************************************************************ + * Private Data + ************************************************************************************/ + +#ifdef CONFIG_SAMV7_GPIOA_IRQ +static xcpt_t g_emac0_handler; +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: sam_emac0_phy_enable + ************************************************************************************/ + +#ifdef CONFIG_SAMV7_GPIOA_IRQ +static void sam_emac0_phy_enable(bool enable) +{ + phydbg("IRQ%d: enable=%d\n", IRQ_EMAC0_INT, enable); + if (enable) + { + sam_gpioirqenable(IRQ_EMAC0_INT); + } + else + { + sam_gpioirqdisable(IRQ_EMAC0_INT); + } +} +#endif + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: sam_netinitialize + * + * Description: + * Configure board resources to support networking. + * + ************************************************************************************/ + +void weak_function sam_netinitialize(void) +{ + /* Configure the PHY interrupt GPIO */ + + phydbg("Configuring %08x\n", GPIO_EMAC0_INT); + sam_configgpio(GPIO_EMAC0_INT); + + /* Configure the PHY SIGDET input */ + + sam_configgpio(GPIO_EMAC0_SIGDET); + + /* Configure PHY /RESET output */ + + sam_configgpio(GPIO_EMAC0_RESET); +} + +/************************************************************************************ + * Name: sam_emac0_setmac + * + * Description: + * Read the Ethernet MAC address from the AT24 FLASH and configure the Ethernet + * driver with that address. + * + ************************************************************************************/ + +#ifdef HAVE_MACADDR +int sam_emac0_setmac(void) +{ + struct i2c_dev_s *i2c; + struct mtd_dev_s *at24; + uint8_t mac[6]; + ssize_t nread; + int ret; + + /* Get an instance of the TWI0 interface */ + + i2c = up_i2cinitialize(0); + if (!i2c) + { + ndbg("ERROR: Failed to initialize TWI0\n"); + return -ENODEV; + } + + /* Initialize the AT24 driver */ + + at24 = at24c_initialize(i2c); + if (!at24) + { + ndbg("ERROR: Failed to initialize the AT24 driver\n"); + (void)up_i2cuninitialize(i2c); + return -ENODEV; + } + + /* Configure the AT24 to access the extended memory region */ + + ret = at24->ioctl(at24, MTDIOC_EXTENDED, 1); + if (ret < 0) + { + ndbg("ERROR: AT24 ioctl(MTDIOC_EXTENDED) failed: %d\n", ret); + (void)up_i2cuninitialize(i2c); + return ret; + } + + /* Read the MAC address */ + + nread = at24->read(at24, AT24XX_MACADDR_OFFSET, 6, mac); + if (nread < 6) + { + ndbg("ERROR: AT24 read(AT24XX_MACADDR_OFFSET) failed: ld\n", (long)nread); + (void)up_i2cuninitialize(i2c); + return (int)nread; + } + + /* Put the AT24 back in normal memory access mode */ + + ret = at24->ioctl(at24, MTDIOC_EXTENDED, 0); + if (ret < 0) + { + ndbg("ERROR: AT24 ioctl(MTDIOC_EXTENDED) failed: %d\n", ret); + } + + /* Release the I2C instance. + * REVISIT: Need an interface to release the AT24 instance too + */ + + ret = up_i2cuninitialize(i2c); + if (ret < 0) + { + ndbg("ERROR: Failed to release the I2C interface: %d\n", ret); + } + + nvdbg("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n", + mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]); + + /* Now configure the EMAC driver to use this MAC address */ + + ret = sam_emac_setmacaddr(EMAC0_INTF, mac); + if (ret < 0) + { + ndbg("ERROR: Failed to set MAC address: %d\n", ret); + } + + return ret; +} +#else +# define sam_emac0_setmac() +#endif + +/**************************************************************************** + * Name: arch_phy_irq + * + * Description: + * This function may be called to register an interrupt handler that will + * be called when a PHY interrupt occurs. This function both attaches + * the interrupt handler and enables the interrupt if 'handler' is non- + * NULL. If handler is NULL, then the interrupt is detached and disabled + * instead. + * + * The PHY interrupt is always disabled upon return. The caller must + * call back through the enable function point to control the state of + * the interrupt. + * + * This interrupt may or may not be available on a given platform depending + * on how the network hardware architecture is implemented. In a typical + * case, the PHY interrupt is provided to board-level logic as a GPIO + * interrupt (in which case this is a board-specific interface and really + * should be called board_phy_irq()); In other cases, the PHY interrupt + * may be cause by the chip's MAC logic (in which case arch_phy_irq()) is + * an appropriate name. Other other boards, there may be no PHY interrupts + * available at all. If client attachable PHY interrupts are available + * from the board or from the chip, then CONFIG_ARCH_PHY_INTERRUPT should + * be defined to indicate that fact. + * + * Typical usage: + * a. OS service logic (not application logic*) attaches to the PHY + * PHY interrupt and enables the PHY interrupt. + * b. When the PHY interrupt occurs: (1) the interrupt should be + * disabled and () work should be scheduled on the worker thread (or + * perhaps a dedicated application thread). + * c. That worker thread should use the SIOCGMIIPHY, SIOCGMIIREG, + * and SIOCSMIIREG ioctl calls** to communicate with the PHY, + * determine what network event took place (Link Up/Down?), and + * take the appropriate actions. + * d. It should then interact the the PHY to clear any pending + * interrupts, then re-enable the PHY interrupt. + * + * * This is an OS internal interface and should not be used from + * application space. Rather applications should use the SIOCMIISIG + * ioctl to receive a signal when a PHY event occurs. + * ** This interrupt is really of no use if the Ethernet MAC driver + * does not support these ioctl calls. + * + * Input Parameters: + * intf - Identifies the network interface. For example "eth0". Only + * useful on platforms that support multiple Ethernet interfaces + * and, hence, multiple PHYs and PHY interrupts. + * handler - The client interrupt handler to be invoked when the PHY + * asserts an interrupt. Must reside in OS space, but can + * signal tasks in user space. A value of NULL can be passed + * in order to detach and disable the PHY interrupt. + * enable - A function pointer that be unsed to enable or disable the + * PHY interrupt. + * + * Returned Value: + * The previous PHY interrupt handler address is returned. This allows you + * to temporarily replace an interrupt handler, then restore the original + * interrupt handler. NULL is returned if there is was not handler in + * place when the call was made. + * + ****************************************************************************/ + +#ifdef CONFIG_SAMV7_GPIOA_IRQ +xcpt_t arch_phy_irq(FAR const char *intf, xcpt_t handler, phy_enable_t *enable) +{ + irqstate_t flags; + xcpt_t *phandler; + xcpt_t oldhandler; + gpio_pinset_t pinset; + phy_enable_t enabler; + int irq; + + DEBUGASSERT(intf); + + nvdbg("%s: handler=%p\n", intf, handler); + phydbg("EMAC0: devname=%s\n", SAMV7_EMAC0_DEVNAME); + + if (strcmp(intf, SAMV7_EMAC0_DEVNAME) == 0) + { + phydbg("Select EMAC0\n"); + phandler = &g_emac0_handler; + pinset = GPIO_EMAC0_INT; + irq = IRQ_EMAC0_INT; + enabler = sam_emac0_phy_enable; + } + else + { + ndbg("Unsupported interface: %s\n", intf); + return NULL; + } + + /* Disable interrupts until we are done. This guarantees that the + * following operations are atomic. + */ + + flags = irqsave(); + + /* Get the old interrupt handler and save the new one */ + + oldhandler = *phandler; + *phandler = handler; + + /* Configure the interrupt */ + + if (handler) + { + phydbg("Configure pin: %08x\n", pinset); + sam_gpioirq(pinset); + + phydbg("Attach IRQ%d\n", irq); + (void)irq_attach(irq, handler); + } + else + { + phydbg("Detach IRQ%d\n", irq); + (void)irq_detach(irq); + enabler = NULL; + } + + /* Return with the interrupt disabled in either case */ + + sam_gpioirqdisable(irq); + + /* Return the enabling function pointer */ + + if (enable) + { + *enable = enabler; + } + + /* Return the old handler (so that it can be restored) */ + + irqrestore(flags); + return oldhandler; +} +#endif /* CONFIG_SAMV7_GPIOA_IRQ */ + +#endif /* HAVE_NETWORK */ diff --git a/configs/same70-xplained/src/sam_hsmci.c b/configs/same70-xplained/src/sam_hsmci.c new file mode 100644 index 00000000000..f166a3e59be --- /dev/null +++ b/configs/same70-xplained/src/sam_hsmci.c @@ -0,0 +1,320 @@ +/**************************************************************************** + * config/same70-xplained/src/sam_hsmci.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The SAM E70 Xplained Ultraas one standard SD card connector that is + * connected to the High Speed Multimedia Card Interface (HSMCI) of the SAM + * E70. SD card connector: + * + * ------ ----------------- --------------------- + * SAME70 SAME70 Shared functionality + * Pin Function + * ------ ----------------- --------------------- + * PA30 MCDA0 (DAT0) + * PA31 MCDA1 (DAT1) + * PA26 MCDA2 (DAT2) + * PA27 MCDA3 (DAT3) Camera + * PA25 MCCK (CLK) Shield + * PA28 MCCDA (CMD) + * PD18 Card Detect (C/D) Shield + * ------ ----------------- --------------------- + */ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include + +#include "sam_gpio.h" +#include "sam_hsmci.h" + +#include "same70-xplained.h" + +#ifdef HAVE_HSMCI + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Types + ****************************************************************************/ +/* This structure holds static information unique to one HSMCI peripheral */ + +struct sam_hsmci_state_s +{ + struct sdio_dev_s *hsmci; /* R/W device handle */ + gpio_pinset_t cdcfg; /* Card detect PIO pin configuration */ + gpio_pinset_t pwrcfg; /* Power PIO pin configuration */ + uint8_t irq; /* Interrupt number (same as pid) */ + uint8_t slotno; /* Slot number */ + bool cd; /* TRUE: card is inserted */ + xcpt_t handler; /* Interrupt handler */ +}; + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/* HSCMI device state */ + +#ifdef CONFIG_SAMV7_HSMCI0 +static int sam_hsmci0_cardetect(int irq, void *regs); + +static struct sam_hsmci_state_s g_hsmci0 = +{ + .cdcfg = GPIO_MCI0_CD, + .irq = IRQ_MCI0_CD, + .slotno = 0, + .handler = sam_hsmci0_cardetect, +}; +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: sam_cardinserted_internal + * + * Description: + * Check if a card is inserted into the selected HSMCI slot + * + ****************************************************************************/ + +bool sam_cardinserted_internal(struct sam_hsmci_state_s *state) +{ + bool inserted; + + /* Get the state of the PIO pin */ + + inserted = sam_gpioread(state->cdcfg); + fllvdbg("Slot %d inserted: %s\n", state->slotno, inserted ? "NO" : "YES"); + return !inserted; +} + +/**************************************************************************** + * Name: sam_hsmci_cardetect, sam_hsmci0_cardetect, and sam_hsmci1_cardetect + * + * Description: + * Card detect interrupt handlers + * + ****************************************************************************/ + +static int sam_hsmci_cardetect(struct sam_hsmci_state_s *state) +{ + /* Get the current card insertion state */ + + bool cd = sam_cardinserted_internal(state); + + /* Has the card detect state changed? */ + + if (cd != state->cd) + { + /* Yes... remember that new state and inform the HSMCI driver */ + + state->cd = cd; + + /* Report the new state to the SDIO driver */ + + sdio_mediachange(state->hsmci, cd); + } + + return OK; +} + +#ifdef CONFIG_SAMV7_HSMCI0 +static int sam_hsmci0_cardetect(int irq, void *regs) +{ + int ret; + + /* Handle the card detect interrupt. The interrupt level logic will + * kick of the driver-level operations to initialize the MMC/SD block + * device. + */ + + ret = sam_hsmci_cardetect(&g_hsmci0); + +#ifdef CONFIG_SAME70XPLAINED_HSMCI0_AUTOMOUNT + /* Let the automounter know about the insertion event */ + + sam_automount_event(HSMCI0_SLOTNO, sam_cardinserted(HSMCI0_SLOTNO)); +#endif + + return ret; +} +#endif + +/**************************************************************************** + * Name: sam_hsmci_state + * + * Description: + * Initialize HSMCI PIOs. + * + ****************************************************************************/ + +static inline struct sam_hsmci_state_s *sam_hsmci_state(int slotno) +{ + struct sam_hsmci_state_s *state = NULL; + +#ifdef CONFIG_SAMV7_HSMCI0 + state = &g_hsmci0; +#endif + + return state; +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: sam_hsmci_initialize + * + * Description: + * Perform architecture specific initialization + * + ****************************************************************************/ + +int sam_hsmci_initialize(int slotno, int minor) +{ + struct sam_hsmci_state_s *state; + int ret; + + /* Get the static HSMI description */ + + state = sam_hsmci_state(slotno); + if (!state) + { + fdbg("ERROR: No state for slotno %d\n", slotno); + return -EINVAL; + } + + /* Initialize card-detect, write-protect, and power enable PIOs */ + + sam_configgpio(state->cdcfg); + sam_dumpgpio(state->cdcfg, "HSMCI Card Detect"); + + if (state->pwrcfg != 0) + { + sam_configgpio(state->pwrcfg); + sam_dumpgpio(state->pwrcfg, "HSMCI Power"); + } + + /* Mount the SDIO-based MMC/SD block driver */ + /* First, get an instance of the SDIO interface */ + + state->hsmci = sdio_initialize(slotno); + if (!state->hsmci) + { + fdbg("ERROR: Failed to initialize SDIO slot %d\n", slotno); + return -ENODEV; + } + + /* Now bind the SDIO interface to the MMC/SD driver */ + + ret = mmcsd_slotinitialize(minor, state->hsmci); + if (ret != OK) + { + fdbg("ERROR: Failed to bind SDIO to the MMC/SD driver: %d\n", ret); + return ret; + } + + /* Configure card detect interrupts */ + + sam_gpioirq(state->cdcfg); + (void)irq_attach(state->irq, state->handler); + + /* Then inform the HSMCI driver if there is or is not a card in the slot. */ + + state->cd = sam_cardinserted_internal(state); + sdio_mediachange(state->hsmci, state->cd); + + /* Enable card detect interrupts */ + + sam_gpioirqenable(state->irq); + return OK; +} + +/**************************************************************************** + * Name: sam_cardinserted + * + * Description: + * Check if a card is inserted into the selected HSMCI slot + * + ****************************************************************************/ + +bool sam_cardinserted(int slotno) +{ + struct sam_hsmci_state_s *state; + + /* Get the HSMI description */ + + state = sam_hsmci_state(slotno); + if (!state) + { + fdbg("ERROR: No state for slotno %d\n", slotno); + return false; + } + + /* Return the state of the PIO pin */ + + return sam_cardinserted_internal(state); +} + +/**************************************************************************** + * Name: sam_writeprotected + * + * Description: + * Check if a card is inserted into the selected HSMCI slot + * + ****************************************************************************/ + +bool sam_writeprotected(int slotno) +{ + /* There are no write protect pins */ + + return false; +} + +#endif /* HAVE_HSMCI */ diff --git a/configs/same70-xplained/src/sam_mcan.c b/configs/same70-xplained/src/sam_mcan.c new file mode 100644 index 00000000000..d0430ed1cee --- /dev/null +++ b/configs/same70-xplained/src/sam_mcan.c @@ -0,0 +1,134 @@ +/************************************************************************************ + * configs/same70-xplainedk/src/sam_mcan.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "sam_mcan.h" +#include "same70-xplained.h" + +#if defined(CONFIG_CAN) && (defined(CONFIG_SAMV7_MCAN0) || defined(CONFIG_SAMV7_MCAN1)) + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* Configuration ********************************************************************/ + +#if defined(CONFIG_SAMV7_MCAN0) && defined(CONFIG_SAMV7_MCAN1) +# warning "Both MCAN0 and MCAN1 are enabled. Assuming only CAN1." +# undef CONFIG_SAMV7_MCAN0 +#endif + +#ifdef CONFIG_SAMV7_MCAN0 +# define CAN_PORT 0 +#else +# define CAN_PORT 1 +#endif + +/* Debug ***************************************************************************/ +/* Non-standard debug that may be enabled just for testing CAN */ + +#ifdef CONFIG_DEBUG_CAN +# define candbg dbg +# define canvdbg vdbg +# define canlldbg lldbg +# define canllvdbg llvdbg +#else +# define candbg(x...) +# define canvdbg(x...) +# define canlldbg(x...) +# define canllvdbg(x...) +#endif + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: board_can_initialize + * + * Description: + * All STM32 architectures must provide the following interface to work with + * examples/can. + * + ************************************************************************************/ + +int board_can_initialize(void) +{ + static bool initialized = false; + struct can_dev_s *can; + int ret; + + /* Check if we have already initialized */ + + if (!initialized) + { + /* Call stm32_caninitialize() to get an instance of the CAN interface */ + + can = sam_mcan_initialize(CAN_PORT); + if (can == NULL) + { + candbg("ERROR: Failed to get CAN interface\n"); + return -ENODEV; + } + + /* Register the CAN driver at "/dev/can0" */ + + ret = can_register("/dev/can0", can); + if (ret < 0) + { + candbg("ERROR: can_register failed: %d\n", ret); + return ret; + } + + /* Now we are initialized */ + + initialized = true; + } + + return OK; +} + +#endif /* CONFIG_CAN && (CONFIG_SAMV7_MCAN0 || CONFIG_SAMV7_MCAN1) */ diff --git a/configs/same70-xplained/src/sam_nsh.c b/configs/same70-xplained/src/sam_nsh.c new file mode 100644 index 00000000000..5660574411b --- /dev/null +++ b/configs/same70-xplained/src/sam_nsh.c @@ -0,0 +1,75 @@ +/**************************************************************************** + * config/same70-xplained/src/sam_nsh.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include "same70-xplained.h" + +#if defined(CONFIG_NSH_ARCHINIT) && !defined(CONFIG_BUILD_KERNEL) + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_app_initialize + * + * Description: + * Perform architecture specific initialization + * + ****************************************************************************/ + +int board_app_initialize(void) +{ +#ifndef CONFIG_BOARD_INITIALIZE + /* Perform board initialization */ + + return sam_bringup(); +#else + return OK; +#endif +} + +#endif /* CONFIG_NSH_ARCHINIT && !CONFIG_BUILD_KERNEL */ diff --git a/configs/same70-xplained/src/sam_sdram.c b/configs/same70-xplained/src/sam_sdram.c new file mode 100644 index 00000000000..e8a6e65a195 --- /dev/null +++ b/configs/same70-xplained/src/sam_sdram.c @@ -0,0 +1,314 @@ +/**************************************************************************** + * configs/same70-xplained/src/sam_sdram.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Most of this file derives from Atmel sample code for the SAME70-XPLD + * board. That sample code has licensing that is compatible with the NuttX + * modified BSD license: + * + * Copyright (c) 2012, Atmel Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor Atmel nor the names of its contributors may + * be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include + +#include "up_arch.h" + +#include "sam_periphclks.h" +#include "chip/sam_memorymap.h" +#include "chip/sam_pinmap.h" +#include "chip/sam_pmc.h" +#include "chip/sam_matrix.h" +#include "chip/sam_sdramc.h" + +#include "same70-xplained.h" + +#ifdef CONFIG_SAMV7_SDRAMC + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#define SDRAM_BA0 (1 << 20) +#define SDRAM_BA1 (1 << 21) + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: sam_sdram_config + * + * Description: + * Configures the on-board SDRAM. SAME70 Xplained features one external + * IS42S16100E-7BLI, 512Kx16x2, 10ns, SDRAM. SDRAM0 is connected to chip + * select NCS1. + * + * Input Parameters: + * None + * + * Assumptions: + * This test runs early in initialization before I- and D-caches are + * enabled. + * + * NOTE: Since the delay loop is calibrate with caches in enabled, the + * calls to up_udelay() are wrong ty orders of magnitude. + * + ****************************************************************************/ + +void sam_sdram_config(void) +{ + volatile uint8_t *psdram = (uint8_t *)SAM_SDRAMCS_BASE; + uint32_t regval; + int i; + + /* Configure SDRAM pins */ + + sam_configgpio(GPIO_SMC_D0); + sam_configgpio(GPIO_SMC_D1); + sam_configgpio(GPIO_SMC_D2); + sam_configgpio(GPIO_SMC_D3); + sam_configgpio(GPIO_SMC_D4); + sam_configgpio(GPIO_SMC_D5); + sam_configgpio(GPIO_SMC_D6); + sam_configgpio(GPIO_SMC_D7); + sam_configgpio(GPIO_SMC_D8); + sam_configgpio(GPIO_SMC_D9); + sam_configgpio(GPIO_SMC_D10); + sam_configgpio(GPIO_SMC_D11); + sam_configgpio(GPIO_SMC_D12); + sam_configgpio(GPIO_SMC_D13); + sam_configgpio(GPIO_SMC_D14); + sam_configgpio(GPIO_SMC_D15); + + /* SAME70 SDRAM + * --------------- ----------- + * PC20 A2 A0 + * PC21 A3 A1 + * PC22 A4 A2 + * PC23 A5 A3 + * PC24 A6 A4 + * PC25 A7 A5 + * PC26 A8 A6 + * PC27 A9 A7 + * PC28 A10 A8 + * PC29 A11 A9 + * PD13 SDA10 A10 + * PA20 BA0 A11 + * PD17 CAS nCAS + * PD14 SDCKE CKE + * PD23 SDCK CLK + * PC15 SDCS nCS + * PC18 A0/NBS0 LDQM + * PD16 RAS nRAS + * PD15 NWR1/NBS1 UDQM + * PD29 SDWE nWE + */ + + sam_configgpio(GPIO_SMC_A2); /* PC20 A2 -> A0 */ + sam_configgpio(GPIO_SMC_A3); /* PC21 A3 -> A1 */ + sam_configgpio(GPIO_SMC_A4); /* PC22 A4 -> A2 */ + sam_configgpio(GPIO_SMC_A5); /* PC23 A5 -> A3 */ + sam_configgpio(GPIO_SMC_A6); /* PC24 A6 -> A4 */ + sam_configgpio(GPIO_SMC_A7); /* PC25 A7 -> A5 */ + sam_configgpio(GPIO_SMC_A8); /* PC26 A8 -> A6 */ + sam_configgpio(GPIO_SMC_A9); /* PC27 A9 -> A7 */ + sam_configgpio(GPIO_SMC_A10); /* PC28 A10 -> A8 */ + sam_configgpio(GPIO_SMC_A11); /* PC29 A11 -> A9 */ + sam_configgpio(GPIO_SDRAMC_A10_2); /* PD13 SDA10 -> A10 */ + sam_configgpio(GPIO_SDRAMC_BA0); /* PA20 BA0 -> A11 */ + + sam_configgpio(GPIO_SDRAMC_CKE); /* PD14 SDCKE -> CKE */ + sam_configgpio(GPIO_SDRAMC_CK); /* PD23 SDCK -> CLK */ + sam_configgpio(GPIO_SDRAMC_CS_1); /* PC15 SDCS -> nCS */ + sam_configgpio(GPIO_SDRAMC_RAS); /* PD16 RAS -> nRAS */ + sam_configgpio(GPIO_SDRAMC_CAS); /* PD17 CAS -> nCAS */ + sam_configgpio(GPIO_SDRAMC_WE); /* PD29 SDWE -> nWE */ + sam_configgpio(GPIO_SMC_NBS0); /* PC18 A0/NBS0 -> LDQM */ + sam_configgpio(GPIO_SMC_NBS1); /* PD15 NWR1/NBS1 -> UDQM */ + + /* Enable the SDRAMC peripheral */ + + sam_sdramc_enableclk(); + + regval = getreg32(SAM_MATRIX_CCFG_SMCNFCS); + regval |= MATRIX_CCFG_SMCNFCS_SDRAMEN; + putreg32(regval, SAM_MATRIX_CCFG_SMCNFCS); + + /* 1. SDRAM features must be set in the configuration register: + * asynchronous timings (TRC, TRAS, etc.), number of columns, rows, CAS + * latency, and the data bus width. + * + * SDRAMC_CR_NC_COL8 8 column bits + * SDRAMC_CR_NR_ROW11 1 row bits + * SDRAMC_CR_NB_BANK2 2 banks + * SDRAMC_CR_CAS_LATENCY3 3 cycle CAS latency + * SDRAMC_CR_DBW 16 bit + * SDRAMC_CR_TWR(4) 4 cycle write recovery delay + * SDRAMC_CR_TRCTRFC(11) 63 ns min + * SDRAMC_CR_TRP(5) 21 ns min Command period (PRE to ACT) + * SDRAMC_CR_TRCD(5) 21 ns min Active Command to read/Write Command delay time + * SDRAMC_CR_TRAS(8) 42 ns min Command period (ACT to PRE) + * SDRAMC_CR_TXSR(13) 70 ns min Exit self-refresh to active time + */ + + regval = SDRAMC_CR_NC_COL8 | /* 8 column bits */ + SDRAMC_CR_NR_ROW11 | /* 11 row bits */ + SDRAMC_CR_NB_BANK2 | /* 2 banks */ + SDRAMC_CR_CAS_LATENCY3 | /* 3 cycle CAS latency */ + SDRAMC_CR_DBW | /* 16 bit */ + SDRAMC_CR_TWR(4) | /* 4 cycle write recovery delay */ + SDRAMC_CR_TRCTRFC(11) | /* 63 ns min */ + SDRAMC_CR_TRP(5) | /* 21 ns min Command period (PRE to ACT) */ + SDRAMC_CR_TRCD(5) | /* 21 ns min Active Command to read/Write Command delay time */ + SDRAMC_CR_TRAS(8) | /* 42 ns min Command period (ACT to PRE) */ + SDRAMC_CR_TXSR(13); /* 70 ns min Exit self-refresh to active time */ + + putreg32(regval, SAM_SDRAMC_CR); + + /* 2. For mobile SDRAM, temperature-compensated self refresh (TCSR), drive + * strength (DS) and partial array self refresh (PASR) must be set in + * the Low Power Register. + */ + + putreg32(0, SAM_SDRAMC_LPR); + + /* 3. The SDRAM memory type must be set in the Memory Device Register.*/ + + putreg32(SDRAMC_MDR_SDRAM, SAM_SDRAMC_MDR); + + /* 4. A minimum pause of 200 usec is provided to precede any signal toggle.*/ + + up_udelay(200); + + /* 5. A NOP command is issued to the SDRAM devices. The application must + * set Mode to 1 in the Mode Register and perform a write access to any + * SDRAM address. + */ + + putreg32(SDRAMC_MR_MODE_NOP, SAM_SDRAMC_MR); + *psdram = 0; + up_udelay(200); + + /* 6. An All Banks Precharge command is issued to the SDRAM devices. The + * application must set Mode to 2 in the Mode Register and perform a + * write access to any SDRAM address. + */ + + putreg32(SDRAMC_MR_MODE_PRECHARGE, SAM_SDRAMC_MR); + *psdram = 0; + up_udelay(200); + + /* 7. Eight auto-refresh (CBR) cycles are provided. The application must + * set the Mode to 4 in the Mode Register and perform a write access to + * any SDRAM location eight times. + */ + + for (i = 0 ; i < 8; i++) + { + putreg32(SDRAMC_MR_MODE_AUTOREFRESH, SAM_SDRAMC_MR); + *psdram = 0; + } + + up_udelay(200); + + /* 8. A Mode Register set (MRS) cycle is issued to program the parameters + * of the SDRAM devices, in particular CAS latency and burst length. + * The application must set Mode to 3 in the Mode Register and perform + * a write access to the SDRAM. The write address must be chosen so + * that BA[1:0] are set to 0. For example, with a 16-bit 128 MB SDRAM + * (12 rows, 9 columns, 4 banks) bank address, the SDRAM write access + * should be done at the address 0x70000000. + */ + + putreg32(SDRAMC_MR_MODE_LOADMODE, SAM_SDRAMC_MR); + *psdram = 0; + up_udelay(200); + + /* 9. For mobile SDRAM initialization, an Extended Mode Register set + * (EMRS) cycle is issued to program the SDRAM parameters (TCSR, PASR, + * DS). The application must set Mode to 5 in the Mode Register and + * perform a write access to the SDRAM. The write address must be + * chosen so that BA[1] or BA[0] are set to 1. + * + * For example, with a 16-bit 128 MB SDRAM, (12 rows, 9 columns, 4 + * banks) bank address the SDRAM write access should be done at the + * address 0x70800000 or 0x70400000. + */ + + //putreg32(SDRAMC_MR_MODE_EXTLOADMODE, SDRAMC_MR_MODE_EXT_LOAD_MODEREG); + // *((uint8_t *)(psdram + SDRAM_BA0)) = 0; + + /* 10. The application must go into Normal Mode, setting Mode to 0 in the + * Mode Register and performing a write access at any location in the + * SDRAM. + */ + + putreg32(SDRAMC_MR_MODE_NORMAL, SAM_SDRAMC_MR); + *psdram = 0; + up_udelay(200); + + /* 11. Write the refresh rate into the count field in the SDRAMC Refresh + * Timer register. (Refresh rate = delay between refresh cycles). The + * SDRAM device requires a refresh every 15.625 usec or 7.81 usec. With + * a 100 MHz frequency, the Refresh Timer Counter Register must be set + * with the value 1562(15.625 usec x 100 MHz) or 781(7.81 usec x 100 + * MHz). + * + * For IS42S16100E, 2048 refresh cycle every 32ms, every 15.625 usec + */ + + regval = (32 * (BOARD_MCK_FREQUENCY / 1000)) / 2048 ; + putreg32(regval, SAM_SDRAMC_TR); + + regval = getreg32(SAM_SDRAMC_CFR1); + regval |= SDRAMC_CFR1_UNAL; + putreg32(regval, SAM_SDRAMC_CFR1); + + /* After initialization, the SDRAM devices are fully functional. */ +} + +#endif /* CONFIG_SAMV7_SDRAMC */ diff --git a/configs/same70-xplained/src/sam_spi.c b/configs/same70-xplained/src/sam_spi.c new file mode 100644 index 00000000000..bf305ba7262 --- /dev/null +++ b/configs/same70-xplained/src/sam_spi.c @@ -0,0 +1,209 @@ +/************************************************************************************ + * configs/same70-xplained/src/sam_spi.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "chip.h" +#include "sam_gpio.h" +#include "sam_spi.h" +#include "same70-xplained.h" + +#ifdef CONFIG_SAMV7_SPI + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Enables debug output from this file (needs CONFIG_DEBUG too) */ + +#undef SPI_DEBUG /* Define to enable debug */ +#undef SPI_VERBOSE /* Define to enable verbose debug */ + +#ifdef SPI_DEBUG +# define spidbg lldbg +# ifdef SPI_VERBOSE +# define spivdbg lldbg +# else +# define spivdbg(x...) +# endif +#else +# undef SPI_VERBOSE +# define spidbg(x...) +# define spivdbg(x...) +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: sam_spi_initialize + * + * Description: + * Called to configure SPI chip select PIO pins for the SAME70-XPLD board. + * + ************************************************************************************/ + +void sam_spi_initialize(void) +{ +#ifdef CONFIG_SAMV7_SPI0_MASTER +#endif + +#ifdef CONFIG_SAMV7_SPI0_SLAVE +#endif + +#ifdef CONFIG_SAMV7_SPI1_MASTER +#endif + +#ifdef CONFIG_SAMV7_SPI1_SLAVE +#endif +} + +/**************************************************************************** + * Name: sam_spi[0|1]select, sam_spi[0|1]status, and sam_spi[0|1]cmddata + * + * Description: + * These external functions must be provided by board-specific logic. They + * include: + * + * o sam_spi[0|1]select is a functions tomanage the board-specific chip selects + * o sam_spi[0|1]status and sam_spi[0|1]cmddata: Implementations of the status + * and cmddata methods of the SPI interface defined by struct spi_ops_ + * (see include/nuttx/spi/spi.h). All other methods including + * up_spiinitialize()) are provided by common SAM3/4 logic. + * + * To use this common SPI logic on your board: + * + * 1. Provide logic in sam_boardinitialize() to configure SPI chip select + * pins. + * 2. Provide sam_spi[0|1]select() and sam_spi[0|1]status() functions in your board- + * specific logic. These functions will perform chip selection and + * status operations using PIOs in the way your board is configured. + * 2. If CONFIG_SPI_CMDDATA is defined in the NuttX configuration, provide + * sam_spi[0|1]cmddata() functions in your board-specific logic. This + * function will perform cmd/data selection operations using PIOs in + * the way your board is configured. + * 3. Add a call to up_spiinitialize() in your low level application + * initialization logic + * 4. The handle returned by up_spiinitialize() may then be used to bind the + * SPI driver to higher level logic (e.g., calling + * mmcsd_spislotinitialize(), for example, will bind the SPI driver to + * the SPI MMC/SD driver). + * + ****************************************************************************/ + +/**************************************************************************** + * Name: sam_spi[0|1]select + * + * Description: + * PIO chip select pins may be programmed by the board specific logic in + * one of two different ways. First, the pins may be programmed as SPI + * peripherals. In that case, the pins are completely controlled by the + * SPI driver. This method still needs to be provided, but it may be only + * a stub. + * + * An alternative way to program the PIO chip select pins is as a normal + * PIO output. In that case, the automatic control of the CS pins is + * bypassed and this function must provide control of the chip select. + * NOTE: In this case, the PIO output pin does *not* have to be the + * same as the NPCS pin normal associated with the chip select number. + * + * Input Parameters: + * devid - Identifies the (logical) device + * selected - TRUE:Select the device, FALSE:De-select the device + * + * Returned Values: + * None + * + ****************************************************************************/ + +#ifdef CONFIG_SAMV7_SPI0_MASTER +void sam_spi0select(enum spi_dev_e devid, bool selected) +{ +} +#endif + +#ifdef CONFIG_SAMV7_SPI1_MASTER +void sam_spi1select(enum spi_dev_e devid, bool selected) +{ +} +#endif + +/**************************************************************************** + * Name: sam_spi[0|1]status + * + * Description: + * Return status information associated with the SPI device. + * + * Input Parameters: + * devid - Identifies the (logical) device + * + * Returned Values: + * Bit-encoded SPI status (see include/nuttx/spi/spi.h. + * + ****************************************************************************/ + +#ifdef CONFIG_SAMV7_SPI0_MASTER +uint8_t sam_spi0status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + return 0; +} +#endif + +#ifdef CONFIG_SAMV7_SPI1_MASTER +uint8_t sam_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + return 0; +} +#endif + +#endif /* CONFIG_SAMV7_SPI */ diff --git a/configs/same70-xplained/src/sam_usbdev.c b/configs/same70-xplained/src/sam_usbdev.c new file mode 100644 index 00000000000..e75322a37d3 --- /dev/null +++ b/configs/same70-xplained/src/sam_usbdev.c @@ -0,0 +1,98 @@ +/************************************************************************************ + * configs/same70-xplained/src/sam_usbdev.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "sam_gpio.h" +#include "same70-xplained.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: sam_usbinitialize + * + * Description: + * Called from stm32_boardinitialize very early in initialization to setup USB- + * related GPIO pins for the SAME70-XPLD board. + * + ************************************************************************************/ + +void sam_usbinitialize(void) +{ + /* Initialize the VBUS enable signal to HI output in any event so that, by + * default, VBUS power is not provided at the USB connector. + */ + + sam_configgpio(GPIO_VBUSON); +} + +/************************************************************************************ + * Name: sam_usbsuspend + * + * Description: + * Board logic must provide the sam_usbsuspend logic if the USBDEV driver is + * used. This function is called whenever the USB enters or leaves suspend mode. + * This is an opportunity for the board logic to shutdown clocks, power, etc. + * while the USB is suspended. + * + ************************************************************************************/ + +void sam_usbsuspend(FAR struct usbdev_s *dev, bool resume) +{ + ulldbg("resume: %d\n", resume); +} diff --git a/configs/same70-xplained/src/sam_userleds.c b/configs/same70-xplained/src/sam_userleds.c new file mode 100644 index 00000000000..5116ee14f1f --- /dev/null +++ b/configs/same70-xplained/src/sam_userleds.c @@ -0,0 +1,109 @@ +/**************************************************************************** + * configs/same70-xplained/src/sam_userleds.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include + +#include "sam_gpio.h" +#include "same70-xplained.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_userled_initialize + ****************************************************************************/ + +void board_userled_initialize(void) +{ + /* Configure LED PIOs for output */ + + sam_configgpio(GPIO_LED0); + sam_configgpio(GPIO_LED1); +} + +/**************************************************************************** + * Name: board_userled + ****************************************************************************/ + +void board_userled(int led, bool ledon) +{ + uint32_t ledcfg; + + if (led == BOARD_LED0) + { + ledcfg = GPIO_LED0; + } + else if (led == BOARD_LED1) + { + ledcfg = GPIO_LED1; + } + else + { + return; + } + + sam_gpiowrite(ledcfg, !ledon); /* Low illuminates */ +} + +/**************************************************************************** + * Name: board_userled_all + ****************************************************************************/ + +void board_userled_all(uint8_t ledset) +{ + /* Low illuminates */ + + sam_gpiowrite(GPIO_LED0, (ledset & BOARD_LED0_BIT) == 0); + sam_gpiowrite(GPIO_LED1, (ledset & BOARD_LED1_BIT) == 0); +} diff --git a/configs/same70-xplained/src/same70-xplained.h b/configs/same70-xplained/src/same70-xplained.h new file mode 100644 index 00000000000..1d4fd4ef5a2 --- /dev/null +++ b/configs/same70-xplained/src/same70-xplained.h @@ -0,0 +1,532 @@ +/************************************************************************************ + * configs/same70-xplained/src/same70-xplained.h + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_SAME70_XPLAINED_SRC_SAME70_XPLAINED_H +#define __CONFIGS_SAME70_XPLAINED_SRC_SAME70_XPLAINED_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include + +#include +#include + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* Configuration ********************************************************************/ + +#define HAVE_HSMCI 1 +#define HAVE_AUTOMOUNTER 1 +#define HAVE_USB 1 +#define HAVE_USBDEV 1 +#define HAVE_USBMONITOR 1 +#define HAVE_NETWORK 1 +#define HAVE_MACADDR 1 +#define HAVE_MTDCONFIG 1 +#define HAVE_PROGMEM_CHARDEV 1 + +/* HSMCI */ +/* Can't support MMC/SD if the card interface is not enabled */ + +#if !defined(CONFIG_SAMV7_HSMCI0) +# undef HAVE_HSMCI +#endif + +/* Can't support MMC/SD features if mountpoints are disabled */ + +#if defined(HAVE_HSMCI) && defined(CONFIG_DISABLE_MOUNTPOINT) +# warning Mountpoints disabled. No MMC/SD support +# undef HAVE_HSMCI +#endif + +/* We need PIO interrupts on GPIOD to support card detect interrupts */ + +#if defined(HAVE_HSMCI) && !defined(CONFIG_SAMV7_GPIOD_IRQ) +# warning PIOD interrupts not enabled. No MMC/SD support. +# undef HAVE_HSMCI +#endif + +/* MMC/SD minor numbers */ + +#ifndef CONFIG_NSH_MMCSDMINOR +# define CONFIG_NSH_MMCSDMINOR 0 +#endif + +#ifndef CONFIG_NSH_MMCSDMINOR +# define CONFIG_NSH_MMCSDSLOTNO 0 +#endif + +#if CONFIG_NSH_MMCSDMINOR != 0 +# error SAME70 has only one MMC/SD slot (CONFIG_NSH_MMCSDMINOR) +# undef CONFIG_NSH_MMCSDSLOTNO +# define CONFIG_NSH_MMCSDSLOTNO 0 +#endif + +#define HSMCI0_SLOTNO CONFIG_NSH_MMCSDSLOTNO +#define HSMCI0_MINOR CONFIG_NSH_MMCSDMINOR + +/* Automounter. Currently only works with HSMCI. */ + +#if !defined(CONFIG_FS_AUTOMOUNTER) || !defined(HAVE_HSMCI) +# undef HAVE_AUTOMOUNTER +# undef CONFIG_SAME70XPLAINED_HSMCI0_AUTOMOUNT +#endif + +#ifndef CONFIG_SAME70XPLAINED_HSMCI0_AUTOMOUNT +# undef HAVE_AUTOMOUNTER +#endif + +#ifdef HAVE_AUTOMOUNTER +# ifdef CONFIG_SAME70XPLAINED_HSMCI0_AUTOMOUNT + /* HSMCI0 Automounter defaults */ + +# ifndef CONFIG_SAME70XPLAINED_HSMCI0_AUTOMOUNT_FSTYPE +# define CONFIG_SAME70XPLAINED_HSMCI0_AUTOMOUNT_FSTYPE "vfat" +# endif + +# ifndef CONFIG_SAME70XPLAINED_HSMCI0_AUTOMOUNT_BLKDEV +# define CONFIG_SAME70XPLAINED_HSMCI0_AUTOMOUNT_BLKDEV "/dev/mmcds0" +# endif + +# ifndef CONFIG_SAME70XPLAINED_HSMCI0_AUTOMOUNT_MOUNTPOINT +# define CONFIG_SAME70XPLAINED_HSMCI0_AUTOMOUNT_MOUNTPOINT "/mnt/sdcard0" +# endif + +# ifndef CONFIG_SAME70XPLAINED_HSMCI0_AUTOMOUNT_DDELAY +# define CONFIG_SAME70XPLAINED_HSMCI0_AUTOMOUNT_DDELAY 1000 +# endif + +# ifndef CONFIG_SAME70XPLAINED_HSMCI0_AUTOMOUNT_UDELAY +# define CONFIG_SAME70XPLAINED_HSMCI0_AUTOMOUNT_UDELAY 2000 +# endif +# endif /* CONFIG_SAME70XPLAINED_HSMCI0_AUTOMOUNT */ +#endif /* HAVE_AUTOMOUNTER */ + +/* USB Device */ +/* CONFIG_SAMV7_UDP and CONFIG_USBDEV must be defined, or there is no USB + * device. + */ + +#if !defined(CONFIG_SAMV7_UDP) || !defined(CONFIG_USBDEV) +# undef HAVE_USB +# undef HAVE_USBDEV +#endif + +/* Check if we should enable the USB monitor before starting NSH */ + +#ifndef HAVE_USBDEV +# undef CONFIG_USBDEV_TRACE +#endif + +#if !defined(CONFIG_SYSTEM_USBMONITOR) || !defined(CONFIG_USBDEV_TRACE) +# undef HAVE_USBMONITOR +#endif + +/* Networking and AT24-based MTD config */ + +#if !defined(CONFIG_NET) || !defined(CONFIG_SAMV7_EMAC) +# undef HAVE_NETWORK +# undef HAVE_MACADDR +#endif + +#if !defined(CONFIG_SAMV7_TWIHS0) || !defined(CONFIG_MTD_AT24XX) +# undef HAVE_MACADDR +# undef HAVE_MTDCONFIG +#endif + +#if defined(CONFIG_NSH_NOMAC) || !defined(CONFIG_AT24XX_EXTENDED) +# undef HAVE_MACADDR +#endif + +#if !defined(CONFIG_MTD_CONFIG) +# undef HAVE_MTDCONFIG +#endif + +/* On-chip Programming Memory */ + +#if !defined(CONFIG_SAMV7_PROGMEM) || !defined(CONFIG_MTD_PROGMEM) +# undef HAVE_PROGMEM_CHARDEV +#endif + +/* This is the on-chip progmem memroy driver minor number */ + +#define PROGMEM_MTD_MINOR 0 + +/* SAME70-XPLD GPIO Pin Definitions *************************************************/ + +/* Ethernet MAC. + * + * KSZ8061RNBVA Connections + * ------------------------ + * + * ------ --------- --------- -------------------------- + * SAME70 SAME70 Ethernet Shared functionality + * Pin Function Function + * ------ --------- --------- -------------------------- + * PD00 GTXCK REF_CLK Shield + * PD01 GTXEN TXEN + * PD02 GTX0 TXD0 + * PD03 GTX1 TXD1 + * PD04 GRXDV CRS_DV Trace + * PD05 GRX0 RXD0 Trace + * PD06 GRX1 RXD1 Trace + * PD07 GRXER RXER Trace + * PD08 GMDC MDC Trace + * PD09 GMDIO MDIO + * PA19 GPIO INTERRUPT EXT1, Shield + * PA29 GPIO SIGDET + * PC10 GPIO RESET + * ------ --------- --------- -------------------------- + */ + +#define GPIO_EMAC0_INT (GPIO_INPUT | GPIO_CFG_PULLUP | GPIO_CFG_DEGLITCH | \ + GPIO_INT_FALLING | GPIO_PORT_PIOA | GPIO_PIN19) +#define GPIO_EMAC0_SIGDET (GPIO_INPUT | GPIO_CFG_DEFAULT | \ + GPIO_PORT_PIOA | GPIO_PIN29) +#define GPIO_EMAC0_RESET (GPIO_OUTPUT | GPIO_CFG_PULLUP | GPIO_OUTPUT_SET | \ + GPIO_PORT_PIOC | GPIO_PIN10) + +#define IRQ_EMAC0_INT SAM_IRQ_PA19 + +/* LEDs + * + * There are two yellow LED available on the SAM E70 Xplained board that can + * be turned on and off. The LEDs can be activated by driving the connected + * I/O line to GND. + * + * ------ ----------- --------------------- + * SAME70 Function Shared functionality + * PIO + * ------ ----------- --------------------- + * PA23 Yellow LED0 EDBG GPIO + * PC09 Yellow LED1 LCD, and Shield + * ------ ----------- --------------------- + */ + +#define GPIO_LED0 (GPIO_OUTPUT | GPIO_CFG_DEFAULT | GPIO_OUTPUT_SET | \ + GPIO_PORT_PIOA | GPIO_PIN23) +#define GPIO_LED1 (GPIO_OUTPUT | GPIO_CFG_DEFAULT | GPIO_OUTPUT_SET | \ + GPIO_PORT_PIOC | GPIO_PIN9) + +/* Buttons + * + * SAM E70 Xplained contains three mechanical buttons. One button is the + * RESET button connected to the SAME70 reset line and the others are generic + * user configurable buttons. When a button is pressed it will drive the I/O + * line to GND. + * + * ------ ----------- --------------------- + * SAME70 Function Shared functionality + * PIO + * ------ ----------- --------------------- + * RESET RESET Trace, Shield, and EDBG + * PA09 SW0 EDBG GPIO and Camera + * PB12 SW1 EDBG SWD and Chip Erase + * ------ ----------- --------------------- + * + * NOTES: + * + * - There are no pull-up resistors connected to the generic user buttons so + * it is necessary to enable the internal pull-up in the SAM E70 to use the + * button. + * - PB12 is set up as a system flash ERASE pin when the firmware boots. To + * use the SW1, PB12 has to be configured as a normal regular I/O pin in + * the MATRIX module. For more information see the SAM E70 datasheet. + */ + +#define GPIO_SW0 (GPIO_INPUT | GPIO_CFG_PULLUP | GPIO_CFG_DEGLITCH | \ + GPIO_INT_BOTHEDGES | GPIO_PORT_PIOA | GPIO_PIN9) +#define GPIO_SW1 (GPIO_INPUT | GPIO_CFG_PULLUP | GPIO_CFG_DEGLITCH | \ + GPIO_INT_BOTHEDGES | GPIO_PORT_PIOB | GPIO_PIN12) + +#define IRQ_SW0 SAM_IRQ_PA9 +#define IRQ_SW1 SAM_IRQ_PB12 + +/* HSMCI SD Card Detect + * + * The SAM E70 Xplained has one standard SD card connector that is connected + * to the High Speed Multimedia Card Interface (HSMCI) of the SAM E70. SD + * card connector: + * + * ------ ----------------- --------------------- + * SAME70 SAME70 Shared functionality + * Pin Function + * ------ ----------------- --------------------- + * PA30 MCDA0 (DAT0) + * PA31 MCDA1 (DAT1) + * PA26 MCDA2 (DAT2) + * PA27 MCDA3 (DAT3) Camera + * PA25 MCCK (CLK) Shield + * PA28 MCCDA (CMD) + * PD18 Card Detect (C/D) Shield + * ------ ----------------- --------------------- + */ + +#define GPIO_MCI0_CD (GPIO_INPUT | GPIO_CFG_DEFAULT | GPIO_CFG_DEGLITCH | \ + GPIO_INT_BOTHEDGES | GPIO_PORT_PIOD | GPIO_PIN18) +#define IRQ_MCI0_CD SAM_IRQ_PD18 + +/* USB Host + * + * The SAM E70 Xplained has a Micro-USB connector for use with the SAM E70 USB + * module labeled as TARGET USB on the kit. In USB host mode VBUS voltage is + * provided by the kit and has to be enabled by setting the "VBUS Host Enable" + * pin (PC16) low. + */ + +#define GPIO_VBUSON (GPIO_OUTPUT | GPIO_CFG_DEFAULT | GPIO_OUTPUT_SET | \ + GPIO_PORT_PIOC | GPIO_PIN16) + +/************************************************************************************ + * Public Types + ************************************************************************************/ + +/************************************************************************************ + * Public data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: sam_sdram_config + * + * Description: + * Configures the on-board SDRAM. SAME70 Xplained features one external + * IS42S16100E-7BLI, 512Kx16x2, 10ns, SDRAM. SDRAM0 is connected to chip select + * NCS1. + * + * Input Parameters: + * None + * + * Assumptions: + * The DDR memory regions is configured as strongly ordered memory. When we + * complete initialization of SDRAM and it is ready for use, we will make DRAM + * into normal memory. + * + ************************************************************************************/ + +#ifdef CONFIG_SAMV7_SDRAMC +void sam_sdram_config(void); +#else +# define sam_sdram_config(t) +#endif + +/************************************************************************************ + * Name: sam_bringup + * + * Description: + * Bring up board features + * + ************************************************************************************/ + +#if defined(CONFIG_NSH_ARCHINIT) || defined(CONFIG_BOARD_INITIALIZE) +int sam_bringup(void); +#endif + +/************************************************************************************ + * Name: sam_spi_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the SAME70-XPLD board. + * + ************************************************************************************/ + +#ifdef CONFIG_SAMV7_SPI +void sam_spi_initialize(void); +#endif + +/************************************************************************************ + * Name: sam_hsmci_initialize + * + * Description: + * Initialize HSMCI support + * + ************************************************************************************/ + +#ifdef HAVE_HSMCI +int sam_hsmci_initialize(int slot, int minor); +#else +# define sam_hsmci_initialize(s,m) (-ENOSYS) +#endif + +/************************************************************************************ + * Name: sam_usbinitialize + * + * Description: + * Called from stm32_boardinitialize very early in initialization to setup USB- + * related GPIO pins for the SAME70-XPLD board. + * + ************************************************************************************/ + +#ifdef HAVE_USB +void sam_usbinitialize(void); +#endif + +/************************************************************************************ + * Name: sam_netinitialize + * + * Description: + * Configure board resources to support networking. + * + ************************************************************************************/ + +#ifdef HAVE_NETWORK +void sam_netinitialize(void); +#endif + +/************************************************************************************ + * Name: sam_emac0_setmac + * + * Description: + * Read the Ethernet MAC address from the AT24 FLASH and configure the Ethernet + * driver with that address. + * + ************************************************************************************/ + +#ifdef HAVE_MACADDR +int sam_emac0_setmac(void); +#endif + +/************************************************************************************ + * Name: sam_cardinserted + * + * Description: + * Check if a card is inserted into the selected HSMCI slot + * + ************************************************************************************/ + +#ifdef HAVE_HSMCI +bool sam_cardinserted(int slotno); +#else +# define sam_cardinserted(slotno) (false) +#endif + +/************************************************************************************ + * Name: sam_writeprotected + * + * Description: + * Check if the card in the MMCSD slot is write protected + * + ************************************************************************************/ + +#ifdef HAVE_HSMCI +bool sam_writeprotected(int slotno); +#endif + +/************************************************************************************ + * Name: sam_automount_initialize + * + * Description: + * Configure auto-mounters for each enable and so configured HSMCI + * + * Input Parameters: + * None + * + * Returned Value: + * None + * + ************************************************************************************/ + +#ifdef HAVE_AUTOMOUNTER +void sam_automount_initialize(void); +#endif + +/************************************************************************************ + * Name: sam_automount_event + * + * Description: + * The HSMCI card detection logic has detected an insertion or removal event. It + * has already scheduled the MMC/SD block driver operations. Now we need to + * schedule the auto-mount event which will occur with a substantial delay to make + * sure that everything has settle down. + * + * Input Parameters: + * slotno - Identifies the HSMCI0 slot: HSMCI0 or HSMCI1_SLOTNO. There is a + * terminology problem here: Each HSMCI supports two slots, slot A and slot B. + * Only slot A is used. So this is not a really a slot, but an HSCMI peripheral + * number. + * inserted - True if the card is inserted in the slot. False otherwise. + * + * Returned Value: + * None + * + * Assumptions: + * Interrupts are disabled. + * + ************************************************************************************/ + +#ifdef HAVE_AUTOMOUNTER +void sam_automount_event(int slotno, bool inserted); +#endif + +/************************************************************************************ + * Name: sam_writeprotected + * + * Description: + * Check if the card in the MMCSD slot is write protected + * + ************************************************************************************/ + +#ifdef HAVE_HSMCI +bool sam_writeprotected(int slotno); +#else +# define sam_writeprotected(slotno) (false) +#endif + +/************************************************************************************ + * Name: sam_at24config + * + * Description: + * Create an AT24xx-based MTD configuration device for storage device configuration + * information. + * + ************************************************************************************/ + +#ifdef HAVE_MTDCONFIG +int sam_at24config(void); +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_SAME70_XPLAINED_SRC_SAME70_XPLAINED_H */