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LM3S9B96 update

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git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4899 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo
2012-07-02 23:32:08 +00:00
parent da7e2cb93a
commit c11cd0bb7e
10 changed files with 484 additions and 488 deletions
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arch/arm/src/lm3s/lm3s_internal.h
+2 -4
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@@ -280,13 +280,11 @@
# define GPIO_SSI0_FSS (GPIO_FUNC_PFIO | GPIO_PORTA | 3) /* PA3: SSI0 frame (SSI0Fss) */
# define GPIO_SSI0_RX (GPIO_FUNC_PFINPUT | GPIO_PORTA | 4) /* PA4: SSI0 receive (SSI0Rx) */
# define GPIO_SSI0_TX (GPIO_FUNC_PFOUTPUT | GPIO_PORTA | 5) /* PA5: SSI0 transmit (SSI0Tx) */
# define GPIO_I2C1_SCL (GPIO_FUNC_PFOUTPUT | GPIO_PORTA | 7) /* PA6: I2C1 clock (I2C1SCL) */
# define GPIO_I2C1_SCL (GPIO_FUNC_PFODIO | GPIO_PORTA | 6) /* PA6: I2C1 clock (I2C1SCL) */
# define GPIO_I2C1_SDA (GPIO_FUNC_PFODIO | GPIO_PORTA | 7) /* PA7: I2C1 data (I2C1SDA) */
# define GPIO_PWM1_2 (GPIO_FUNC_PFOUTPUT | GPIO_PORTB | 0) /* PB0: PWM Generator 1, PWM2 */
# define GPIO_PWM1_3 (GPIO_FUNC_PFOUTPUT | GPIO_PORTB | 1) /* PB1: PWM Generator 1, PWM3 */
# define GPIO_USB0ID (GPIO_FUNC_PFINPUT | GPIO_PORTB | 0) /* PB0: USBID signal from the USB-On-the-Go */
# define GPIO_USB0VBUS (GPIO_FUNC_PFODIO | GPIO_PORTB | 1) /* PB1: USB VBUS input signal from USB-OTG */
# define GPIO_I2C0_SCL (GPIO_FUNC_PFOUTPUT | GPIO_PORTB | 2) /* PB2: I2C0 clock (I2C0SCL) */
# define GPIO_I2C0_SCL (GPIO_FUNC_PFODIO | GPIO_PORTB | 2) /* PB2: I2C0 clock (I2C0SCL) */
# define GPIO_I2C0_SDA (GPIO_FUNC_PFODIO | GPIO_PORTB | 3) /* PB3: I2C0 data (I2C0SDA) */
# define GPIO_CMP0_NIN (GPIO_FUNC_PFINPUT | GPIO_PORTB | 4) /* PB4: Analog comparator 0 negative input (C0-) */
# define GPIO_CMP1_NIN (GPIO_FUNC_PFINPUT | GPIO_PORTB | 5) /* PB5: Analog comparator 1 negative input (C1-) */
arch/arm/src/lm3s/lm3s_syscontrol.h
+11 -2
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@@ -304,8 +304,8 @@
# define SYSCON_RCC_OSCSRC_IOSC (1 << SYSCON_RCC_OSCSRC_SHIFT) /* Internal oscillator (reset) */
# define SYSCON_RCC_OSCSRC_IOSC4 (2 << SYSCON_RCC_OSCSRC_SHIFT) /* Internal oscillator / 4 */
# define SYSCON_RCC_OSCSRC_30KHZ (3 << SYSCON_RCC_OSCSRC_SHIFT) /* 30KHz internal oscillator */
#define SYSCON_RCC_XTAL_SHIFT 6 /* Bits 9-6: Crystal Value */
#define SYSCON_RCC_XTAL_MASK (0x0f << SYSCON_RCC_XTAL_SHIFT)
#define SYSCON_RCC_XTAL_SHIFT 6 /* Bits 10-6: Crystal Value */
#define SYSCON_RCC_XTAL_MASK (0x1f << SYSCON_RCC_XTAL_SHIFT)
# define SYSCON_RCC_XTAL1000KHZ ( 0 << SYSCON_RCC_XTAL_SHIFT) /* 1.0000MHz (NO PLL) */
# define SYSCON_RCC_XTAL1843KHZ ( 1 << SYSCON_RCC_XTAL_SHIFT) /* 1.8432MHz (NO PLL) */
# define SYSCON_RCC_XTAL2000KHZ ( 2 << SYSCON_RCC_XTAL_SHIFT) /* 2.0000MHz (NO PLL) */
@@ -322,6 +322,15 @@
# define SYSCON_RCC_XTAL7373KHZ (13 << SYSCON_RCC_XTAL_SHIFT) /* 7.3728MHz */
# define SYSCON_RCC_XTAL8000KHZ (14 << SYSCON_RCC_XTAL_SHIFT) /* 8.0000MHz */
# define SYSCON_RCC_XTAL8192KHZ (15 << SYSCON_RCC_XTAL_SHIFT) /* 8.1920MHz */
#ifdef CONFIG_ARCH_CHIP_LM3S9B96
# define SYSCON_RCC_XTAL10000KHZ (16 << SYSCON_RCC_XTAL_SHIFT) /* 10.0 MHz (USB) */
# define SYSCON_RCC_XTAL12000KHZ (17 << SYSCON_RCC_XTAL_SHIFT) /* 12.0 MHz (USB) */
# define SYSCON_RCC_XTAL12888KHZ (18 << SYSCON_RCC_XTAL_SHIFT) /* 12.288 MHz */
# define SYSCON_RCC_XTAL13560KHZ (19 << SYSCON_RCC_XTAL_SHIFT) /* 13.56 MHz */
# define SYSCON_RCC_XTAL14318KHZ (20 << SYSCON_RCC_XTAL_SHIFT) /* 14.31818 MHz */
# define SYSCON_RCC_XTAL16000KHZ (21 << SYSCON_RCC_XTAL_SHIFT) /* 16.0 MHz (USB) */
# define SYSCON_RCC_XTAL16384KHZ (22 << SYSCON_RCC_XTAL_SHIFT) /* 16.384 MHz */
#endif
#define SYSCON_RCC_BYPASS (1 << 11) /* Bit 11: PLL Bypass */
#define SYSCON_RCC_PWRDN (1 << 13) /* Bit 13: PLL Power Down */
#define SYSCON_RCC_USESYSDIV (1 << 22) /* Bit 22: Enable System Clock Divider */
configs/ekk-lm3s9b96/Kconfig
+1 -1
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@@ -3,5 +3,5 @@
# see misc/tools/kconfig-language.txt.
#
if ARCH_BOARD_EKK_LM3S9B96
if ARCH_BOARD_EKKLM3S9B96
endif
configs/ekk-lm3s9b96/include/board.h
+3 -3
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@@ -50,7 +50,7 @@
/* RCC settings */
#define SYSCON_RCC_XTAL SYSCON_RCC_XTAL8000KHZ /* Eagle100 on-board crystall is 8.00 MHz */
#define SYSCON_RCC_XTAL SYSCON_RCC_XTAL16000KHZ /* 16.000 MHz crystal */
#define XTAL_FREQUENCY 16000000
/* Oscillator source is the main oscillator (not internal, internal/4, 30KHz or
@@ -65,7 +65,7 @@
*/
#define LM3S_SYSDIV 4
#define SYSCLK_FREQUENCY 80000000 /* 80MHz */
#define SYSCLK_FREQUENCY 50000000 /* 50MHz */
/* Other RCC settings:
*
@@ -88,7 +88,7 @@
/* LED definitions ******************************************************************/
/* The EKK-LMS3oB96 Eval Kit has only one user LED: Port D, Bit 0. Below is the mapping of this
/* The EKK-LMS39B96 Eval Kit has only one user LED: Port D, Bit 0. Below is the mapping of this
* single LED. From this single LED, we can get the following information:
*
* OFF Steady: The system has failed to boot to the point of enabling interrupts
configs/ekk-lm3s9b96/src/ekklm3s9b96_internal.h
-4
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@@ -90,13 +90,9 @@
/* GPIO for LED's:
* - PD0: User LED
* - PF2: LED1 (yellow)
* - PF3: LED0 (green)
*/
#define LED_GPIO (GPIO_FUNC_OUTPUT | GPIO_VALUE_ONE | GPIO_PORTD | 0)
#define LED1_GPIO (GPIO_FUNC_OUTPUT | GPIO_VALUE_ZERO | GPIO_PORTF | 2)
#define LED0_GPIO (GPIO_FUNC_OUTPUT | GPIO_VALUE_ONE | GPIO_PORTF | 3)
/************************************************************************************
* Public Functions
configs/ekk-lm3s9b96/src/up_leds.c
-4
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@@ -105,8 +105,6 @@ void up_ledinit(void)
led_dumpgpio("up_ledinit before lm3s_configgpio()");
lm3s_configgpio(LED_GPIO);
lm3s_configgpio(LED0_GPIO);
lm3s_configgpio(LED1_GPIO);
led_dumpgpio("up_ledinit after lm3s_configgpio()");
g_nest = 0;
}
@@ -133,7 +131,6 @@ void up_ledon(int led)
case LED_STACKCREATED:
led_dumpgpio("up_ledon: before lm3s_gpiowrite()");
lm3s_gpiowrite(LED_GPIO, false);
lm3s_gpiowrite(LED0_GPIO, false);
led_dumpgpio("up_ledon: after lm3s_gpiowrite()");
break;
}
@@ -162,7 +159,6 @@ void up_ledoff(int led)
{
led_dumpgpio("up_ledoff: before lm3s_gpiowrite()");
lm3s_gpiowrite(LED_GPIO, true);
lm3s_gpiowrite(LED0_GPIO, true);
led_dumpgpio("up_ledoff: after lm3s_gpiowrite()");
}
break;
configs/ekk-lm3s9b96/src/up_nsh.c
-3
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@@ -45,9 +45,6 @@
#include <debug.h>
#include <errno.h>
#include <nuttx/spi.h>
#include <nuttx/mmcsd.h>
/****************************************************************************
* Pre-Processor Definitions
****************************************************************************/
configs/ekk-lm3s9b96/src/up_ssi.c
+1 -1
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@@ -107,7 +107,7 @@ void weak_function lm3s_ssiinitialize(void)
{
/* Configure the SPI CS GPIO */
#if 0
ssi_dumpgpio("lm3s_ssiinitialize() Entry)");
ssi_dumpgpio("lm3s_ssiinitialize() Entry");
ssi_dumpgpio("lm3s_ssiinitialize() Exit");
#endif
}