From c118b9c8a794cfca662dd4004ac5ebcfaa328959 Mon Sep 17 00:00:00 2001 From: Piyush Patle Date: Wed, 1 Apr 2026 03:39:43 +0530 Subject: [PATCH] Documentation/sam4cmp-db: port README.txt to rst --- .../arm/sam34/boards/sam4cmp-db/README.txt | 25 ------------------ .../arm/sam34/boards/sam4cmp-db/index.rst | 26 +++++++++++++++++-- Documentation/platforms/arm/sam34/index.rst | 6 ++--- 3 files changed, 27 insertions(+), 30 deletions(-) delete mode 100644 Documentation/platforms/arm/sam34/boards/sam4cmp-db/README.txt diff --git a/Documentation/platforms/arm/sam34/boards/sam4cmp-db/README.txt b/Documentation/platforms/arm/sam34/boards/sam4cmp-db/README.txt deleted file mode 100644 index e8dc3e1c2a8..00000000000 --- a/Documentation/platforms/arm/sam34/boards/sam4cmp-db/README.txt +++ /dev/null @@ -1,25 +0,0 @@ -README -^^^^^^ - -README for NuttX port to the SAM4CMP-DB board. - - http://www.atmel.com/tools/SAM4CMP-DB.aspx - -The board is intended to test NuttX SMP features for dual Cortex-M4. - -Settings -^^^^^^^^ -1. Both CPUs are running at 92.160MHz with PLLB. -2. Serial console can be used via on-board USB-UART (115200/8/N/1) -3. Interrupt handlers such as timer and UART are handled on CPU0 -4. Both CPUs share internal SRAM0 (128KB) -5. SRAM1 is used to boot CPU1. -6. Cache controllers are disabled because of no snooping features. - -Status -^^^^^^ -Currently SMP freature works on the board but is not stable. - -1. "nsh> sleep 1 &" works without crash. -2. "nsh> smp " sometimes works but some assertions might happen. -3. "nsh> ostest " causes deadlocks during the test. diff --git a/Documentation/platforms/arm/sam34/boards/sam4cmp-db/index.rst b/Documentation/platforms/arm/sam34/boards/sam4cmp-db/index.rst index 3858b62106a..c3e9ff73621 100644 --- a/Documentation/platforms/arm/sam34/boards/sam4cmp-db/index.rst +++ b/Documentation/platforms/arm/sam34/boards/sam4cmp-db/index.rst @@ -2,5 +2,27 @@ sam4cmp-db ========== -.. include:: README.txt - :literal: +README for the NuttX port to the SAM4CMP-DB board. + +The `SAM4CMP-DB `_ board is used +to exercise NuttX SMP support for dual Cortex-M4 systems. + +Settings +======== + +1. Both CPUs run at 92.160 MHz using PLLB. +2. The serial console is available via the on-board USB-to-UART interface at + 115200 8N1. +3. Interrupt handlers such as the timer and UART run on CPU0. +4. Both CPUs share internal SRAM0 (128 KB). +5. SRAM1 is used to boot CPU1. +6. Cache controllers are disabled because the device has no snooping support. + +Status +====== + +The SMP feature works on the board, but it is not yet stable. + +1. ``nsh> sleep 1 &`` works without crashing. +2. ``nsh> smp`` sometimes works, but assertions may occur. +3. ``nsh> ostest`` causes deadlocks during the test. diff --git a/Documentation/platforms/arm/sam34/index.rst b/Documentation/platforms/arm/sam34/index.rst index 25782bf6788..7bd515d21f7 100644 --- a/Documentation/platforms/arm/sam34/index.rst +++ b/Documentation/platforms/arm/sam34/index.rst @@ -90,9 +90,9 @@ was contributed in part by Max Neklyudov. to NuttX by Masayuki Ishikawa in NuttX-7.19. The SAM4CM is a dual-CPU part and SMP was included for the ARMv7-M and SAM3/4 families. The SAM4CMP-DB board support includes an NSH configuration that operates in -an SMP configuration. Refer to the NuttX board -`README `__ -file for further information. +an SMP configuration. Refer to the +:doc:`board documentation ` for further +information. Microchip SAM4E ---------------